JP2001125071A - Optoelectronic device and driving method therefor, liquid crystal display device and driving method therefor, driving circuit for optoelectronic device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption at the time an electrooptical device is in a partial display state. SOLUTION: In an optoelectronic device having a function capable of bringing only part of a display screen into a display state and also capable of making another part of the screen into a non-display state, application voltages to scanning electrodes are fixed to non-selection voltages and application voltages to signal electrodes are fixed to the same voltage levels as that of the case that ON display is performed on an entire screen or the case that off display is performed on the entire screen at least for a prescribed period with respect to the non-display area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device having a function of allowing only a part of a display screen to be in a display state and other parts to be in a non-display state, and a driving method thereof. Further, the present invention relates to a driving method of a liquid crystal display device that uses a liquid crystal display device as an electro-optical device and enables a partial display state with low power consumption without discomfort in display and a liquid crystal display device displayed by the method. Further, the present invention relates to a driving circuit suitable for driving the electro-optical device of the present invention.

[0002] Further, the present invention relates to an electronic apparatus using such an electro-optical device and a liquid crystal display device as a display device.

[0003]

2. Description of the Related Art In display devices used in portable electronic devices such as cellular phones, the number of display dots has been increasing year by year so that more information can be displayed. Power consumption has also been increasing. Since the power source of the portable electronic device is generally a battery, the display device is strongly required to have low power consumption so that the battery life can be extended. For this reason, in a display device having a large number of display dots, the entire screen is set to the display state when necessary, but in a normal state, only a partial area of the display panel is set to the display state so that power consumption can be reduced, and other areas are set to the display state. A method for hiding the image is being considered. In addition, since the display device of the portable electronic device also needs low power consumption, a reflective type or a transflective type liquid crystal display panel which emphasizes the appearance in the reflective mode is used as the display panel.

Many conventional liquid crystal display devices have a function of controlling the display / non-display of the entire screen. However, only a part of the entire screen is set to the display state and the other parts are set to the non-display state. Anything that has the function to do so has not yet been put to practical use.
JP-A-6-95621 and JP-A-7-2816 disclose a method of realizing a function of setting only a part of rows of a liquid crystal display panel to a display state and setting other rows to a non-display state.
No. 32 has been proposed. These two proposals are both methods of changing the display duty between partial display and full screen display, and changing the drive voltage and the bias ratio according to each duty.

Referring to FIGS. 19 to 21, FIG.
The driving method of No. 21 will be described below. FIG. 19 is a block diagram of this conventional liquid crystal display device. A block 51 is a liquid crystal display panel (LCD panel) in which a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed are arranged facing each other at intervals of several μm, and liquid crystal is sealed in the gap. Have been. The pixels (dots) are arranged in a matrix by the liquid crystal at the intersection of the scanning electrodes arranged in the row direction and the signal electrodes arranged in the column direction. Block 52 is a scan electrode drive circuit (Y driver) for driving the scan electrodes, and block 53 is a signal electrode drive circuit (X driver) for driving the signal electrodes. A plurality of voltage levels required for driving the liquid crystal are formed by a driving voltage forming circuit of a block 54 and applied to the liquid crystal display panel 51 via an X driver 53 and a Y driver 52. Block 57 is a scanning control circuit for controlling the number of scanning electrodes to be scanned. A block 55 is a controller for supplying necessary signals to these circuits. FRM is a frame start signal, CLY is a scanning signal transfer clock, CLX is a data transfer clock,
“ata” is display data, “LP” is a data latch signal, and “PD” is a partial display control signal. Block 56 is the power supply for the above circuit.

In this conventional example, the case where the partial display is the left half screen and the case where the partial display corresponds to the upper half screen is described here. The case where the minute line is set to the non-display state will be described. The number of scanning electrodes is 400. The controller 55 sets the partial display control signal PD to the “H” level so that the lower half screen is not displayed. When the control signal PD is at the "L" level, the entire screen is displayed by scanning all the scanning electrodes at 1/400 duty. When the control signal PD is at the "H" level, the upper half of the panel is scanned. By scanning only the electrodes at a duty of 1/200, a partial display state is achieved in which the upper half screen is displayed and the remaining lower half screen is not displayed. The switching to 1/200 duty is performed by doubling the period of the scanning signal transfer clock CLY and halving the number of clocks in one frame period. Although the details of the method of stopping scanning of the scanning electrodes in the lower half screen in the partial display state are not described, judging from the internal circuit diagram of the scanning control circuit block 57, when the control signal PD is set to “H” level, the Y driver The data to be transferred from the 200th stage to the 201st stage of the shift register is fixed at “L” level.
201th to Yth driver supplied to the scan electrodes
The 400th output keeps the non-select voltage level.

FIG. 20 shows an example of a driving voltage waveform when a horizontal line is displayed every other scanning electrode in the partial display state of the conventional example. A is a voltage waveform applied to one pixel in the upper half screen, and B is a voltage waveform applied to all pixels in the lower half screen. In the waveforms A and B in the figure, the thick lines indicate the scanning electrode driving waveform, and the thin lines indicate the signal electrode driving waveform.

The selection voltage V0 (or V5) is applied to the scanning electrodes of the upper half screen one row at a time in each selection period (one horizontal scanning period: 1H), and the non-selection voltage V4 is applied to the scanning electrodes of the other rows. (Or V1) is applied. On / off information of each pixel in the selected row is sequentially applied to the signal electrode in synchronization with the horizontal scanning period. More specifically, while the voltage applied to the scanning electrode in the selected row is V0, V5 is applied to the signal electrode of the ON pixel in the selected row and V3 is applied to the signal electrode of the OFF pixel. While the voltage applied to the scanning electrodes in the selected row is V5, V0 is applied to the signal electrodes of ON pixels in the selected row and V2 is applied to the signal electrodes of OFF pixels in the selected row. The voltage applied to the liquid crystal of each pixel is a difference voltage between the scanning voltage (selection voltage and non-selection voltage) applied to the scanning electrode and the signal voltage (on voltage and off voltage) applied to the signal electrode. , A pixel having a high effective voltage of the difference voltage is turned on, and a pixel having a low effective voltage is turned off.

On the other hand, the effective voltage of the pixel in the lower half screen is shown in FIG.
Since the selection voltage is not applied at all to the scan electrodes as shown at B of 0, the effective voltage applied to the off pixels of the upper half screen is considerably smaller, and as a result, the lower half screen is completely in a non-display state.

As shown by the liquid crystal AC drive signal M, FIG.
Is a diagram in which the signal polarity of the drive voltage is switched every selection period for 13 rows. In the case of high-duty driving in order to reduce flicker and crosstalk, it is necessary to switch the signal polarity of the driving voltage every ten or more rows of the selection period. Although the lower half screen is not displayed, the voltage applied to the scanning electrodes and the signal electrodes in the non-display area is lower than B in FIG.
Therefore, even when the display mode is changed to the partial display state, the circuits such as the driver operate and the liquid crystal of the pixel is charged and discharged, so that there is a disadvantage that the power consumption is not reduced so much.

In the simple matrix type liquid crystal display panel, when the display duty is switched, it is necessary to change the setting of the drive voltage. Hereinafter, this point will be described with reference to FIG. 21 which is an internal circuit of the drive voltage forming block 54.

First, the configuration and function of FIG. 21 will be described.
To drive a liquid crystal display panel with a duty higher than about 1/30 duty, six levels of voltages V0 to V5 are required. The maximum voltage applied to the liquid crystal is V0-V5, and the input power supply voltage of +5 V is used as it is for V0.
Variable resistor RV1 for contrast adjustment and transistor Q
By means of 1, a voltage V5 at which the contrast is optimal is extracted from the 0V and -24V input power supplies. The voltages of V0-V5 are divided by the resistors R1 through R5 to form intermediate voltages, and the driving capabilities of the intermediate voltages are increased by operational amplifiers OP1 through OP4 to output V1 through V4. The switches S2a and S2b are interlock switches, and one of R3a and R3b is connected in series with R2 and R4 according to the level of the signal PD. By making the resistance values of R3a and R3b different, V0 to V5 having different voltage division ratios can be formed according to the level of PD.

V0-V1 = V1-V between V0 and V5
2 = V3−V4 = V4−V5, and the voltage division ratio (V0−V1) / (V0−V5) is called a bias ratio. When the duty is 1 / N, the preferable bias ratio is 1 / (1 + ΔN).
No. 8 discloses this. Therefore, if the resistance values of R3a and R3b are set for 1/400 duty and 1/200 duty, respectively, it is possible to drive with a preferable bias ratio in each duty.

When switching the duty, not only the switching of the bias ratio but also the driving voltage (V0-V
The change in 5) is also necessary. If the duty is switched from 1/400 to 1/200 while the drive voltage is fixed, even if the bias ratio is switched to a preferable value, the display will be extremely poor in contrast. This is because the effective voltage applied to the liquid crystal becomes too high because the time during which the selection voltage is applied to the liquid crystal is doubled. In the conventional example, the necessity of switching the bias ratio and the means for realizing it are described in detail, but the necessity of switching the drive voltage and the means for realizing it are not described in detail.

Specifically, when the duty is 1 / N,
When N >> 1, it is necessary to adjust (V0-V5) substantially in proportion to ΔN. For example, if the optimum (V0−V5) in the case of 1/400 duty is 28V, then 1
In case of / 200 duty, (V0-V5) is 28V
/ √2 ≒ 20V must be adjusted. This voltage adjustment is performed by the device user adjusting the contrast adjustment variable resistor RV1 each time the device is switched between the full screen display state and the upper half screen display state, but this is very inconvenient for the device user. It is. Although it is necessary to add a drive voltage automatic setting means, it is not as easy as the bias ratio switching means, and the drive voltage forming circuit is greatly complicated. In this conventional publication, it is described that the power consumption can be further reduced in a half-screen display because the driving voltage is small. However, a reduced voltage of 8 V causes a considerable portion of heat generation of the contrast adjustment transistor Q1. Is consumed, so that the power consumption does not decrease so much.

If the partial display is quite small, about ten rows to about twenty rows, and the duty ratio is changed accordingly, the preferable bias ratio becomes 1/3 or 1/4. The voltage required for driving the liquid crystal is not 6 levels but 5 levels in the case of 1/4 bias and 4 levels in the case of 1/3 bias. If a five-level voltage is required, the resistors R3a and R3a
It is sufficient to set the resistance value of the side connected to the partial display of 3b to 0Ω. However, when a voltage of four levels is required, the resistors R2 and R4 are set to 0Ω instead of the resistance R3a or R3b.
Means is required. Japanese Unexamined Patent Application Publication No. 7-281632 describes a bias ratio switching unit and a driving voltage switching unit in such a case, but further description of the configuration is omitted here.

According to the method proposed so far, only a part of the rows of the liquid crystal display panel is set to the display state,
The function of setting other rows to the non-display state itself becomes possible, and the power consumption can be reduced to some extent. However, there are problems that the drive voltage forming circuit is considerably complicated, the number of rows that can be partially displayed is limited in terms of hardware, and low power consumption is still insufficient.

The former JP-A-6-95621 relates to a transmissive liquid crystal display panel, and the latter JP-A-7-281632 only describes a partial display method, and discloses a display form. I haven't. But,
When importance is placed on high contrast in a liquid crystal display device of a transmission type or a reflection type, a normally black type display panel has conventionally been adopted. The reason is as follows. In the case of the normally white type, the gap between the dots to which no voltage is applied becomes white, so the white display portion in the screen is sufficiently white, but the black display portion is not sufficiently black, whereas the normally black portion is not fully black. In the case of the type, since the gap between dots to which no voltage is applied becomes black, the black display portion becomes sufficiently black, but the white display portion does not become sufficiently white. Since the display is higher in contrast when the black display portion is sufficiently black than when the white display portion is sufficiently white, a higher contrast is obtained when a normally black display panel is employed. .

In the normally black type, when the effective voltage applied to the liquid crystal is an off-voltage lower than the threshold value of the liquid crystal, the display becomes black. When the applied voltage is increased, an on-voltage higher than the threshold value of the liquid crystal is applied. Then, the mode is a white display mode. On the other hand, a normally white type is a white display when the effective voltage applied to the liquid crystal is an off voltage lower than the liquid crystal threshold, and a black display when the effective voltage is increased and an on voltage higher than the liquid crystal threshold is applied. This is the mode in which
For example, when a twisted nematic liquid crystal having a twist of approximately 90 degrees is used, the liquid crystal display panel has a pair of polarizing plates on both sides of the panel, and when the transmission axes of the pair of polarizing plates are arranged substantially in parallel, normally. A black type and a normally white type when arranged substantially orthogonally.

FIG. 18 is a diagram showing a partial display state when a normally black liquid crystal display panel 107 is used. Since an off voltage or an effective voltage lower than that is applied to the liquid crystal in the non-display area, the non-display area displays black as shown in the figure. On the other hand, in a reflective liquid crystal display panel,
In order to reflect the incident light and make the display bright and easy to see, it is necessary to display the characters in black and the background in white. However, in a normally black reflective liquid crystal display panel, the non-display area is black, while the background of the display area is white, resulting in an uncomfortable partial display state. Furthermore, in the display dots located at the boundary between the display area and the non-display area on the display screen, the black display of the dots constituting the characters in the display area and the black display of the dots in the non-display area are adjacent dots. Therefore, there is also a problem that the characters displayed on the display dots at the boundary between the display area and the non-display area are very difficult to read because they are connected in visual recognition. It is necessary to apply an on-voltage to the liquid crystal in the non-display area in order to make the non-display area white display so as not to give a feeling of strangeness. However, basically, the area to be non-display cannot be said to be the non-display state. . If the non-display area is to be displayed in white, not only can the power consumption of the circuit for realizing it be reduced, but also the liquid crystal molecules are arranged in the horizontal direction in the off state like a nematic liquid crystal and turned on. In the case where the liquid crystal is turned on, the permittivity of the liquid crystal in the on state is two to three times as large as the permittivity of the liquid crystal in the off state. , The power consumption of the entire display device is not so much reduced as compared with the case of the full-screen display state, or conversely increases.

As described above, if a normally black display panel is simply employed to improve the contrast, a non-display area in a partial display state has a strange feeling of black. In addition, if the non-display area is to be displayed in white without a sense of incongruity, it cannot be said that the partial display function is basically realized, and the purpose of reducing power consumption cannot be fulfilled.

Accordingly, an object of the present invention is to solve the above-mentioned problems in the prior art and to provide an electro-optical device in which power consumption is greatly reduced during partial display. It is another object of the present invention to provide a highly versatile electro-optical device in which the size and position of the partial display can be set by software without complicating the drive voltage forming circuit for the partial display function.

Another object of the present invention is to provide a liquid crystal display device capable of realizing a display without a sense of incongruity in a partial display state and significantly reducing power consumption when a liquid crystal display device is used as the electro-optical device. I do.

It is another object of the present invention to provide a configuration of a driving circuit suitable for driving the electro-optical device of the present invention.

It is another object of the present invention to provide an electronic device with low power consumption by using an electro-optical device or a liquid crystal display device having these partial display functions for a display device.

[0026]

According to the present invention, there is provided a method for driving an electro-optical device having a plurality of scanning electrodes and a plurality of signal electrodes intersectingly arranged and having a function of partially setting a display screen as a display area. In the above, the scanning electrodes in the display area include:
A selection voltage is applied during the selection period, a non-selection voltage is applied during the non-selection period, and during periods other than the selection period of the scanning electrodes in the display area, the voltages applied to all the scanning electrodes are fixed and all the scanning electrodes are fixed. The display screen is set to a partial display state by fixing a voltage applied to the signal electrode for at least a predetermined period. According to the present invention, in the case of partial display in which only a partial region is a display region, the potentials of all scan electrodes and all signal electrodes are fixed for at least a predetermined period, so that the liquid crystal layer or the electrode which is an electro-optical material is used. A period during which charging and discharging are not performed in the drive circuit or the like occurs, and power consumption is reduced accordingly.

Further, in the driving method of the electro-optical device according to the present invention, it is preferable that the voltage of the scanning electrode during the period in which the voltage applied to all the scanning electrodes is fixed is the non-selection voltage. Since the voltage of the scanning electrode fixed in the case of the partial display is a non-selection voltage, the driving circuit can be configured with a simple circuit.

Further, in the method of driving an electro-optical device according to the present invention, it is preferable that the non-selection voltage is at one level. During the access period of the non-display area, the non-selection voltage can be fixed at one level, so that there is no voltage change and low power consumption can be achieved.

Further, in the driving method of the electro-optical device according to the present invention, the driving voltage forming circuit applied to the scanning electrodes and the signal electrodes may include a driving voltage applied to all the scanning electrodes and all the signal electrodes. It is preferable to stop the operation during the fixed period. More specifically,
The drive voltage forming circuit has a charge pump circuit that switches a connection of a plurality of capacitors according to a clock to generate a boosted voltage or a stepped-down voltage, and the charge pump circuit includes all scan electrodes and all signals. It is preferable that the operation be stopped during a period in which the respective applied voltages to the electrodes are fixed. By doing so, power consumption in the drive voltage forming circuit can be reduced during the partial display state. When a charge pump circuit is used for voltage step-up / step-down, useless power consumption can be reduced by stopping a timing clock for switching a capacitor.

According to the present invention, one of the driving methods of the simple matrix type liquid crystal display device in which the non-selection voltage is only one level is based on the MLS in which the scanning electrodes of a plurality of rows are simultaneously selected.
(Multi-Line-Selection) driving, and the other is SA (Sm) in which scanning electrodes are selected line by line.
art-Addressing) is a method called driving. International Patent Publication WO96 / 21880 has proposed that the power consumption of a liquid crystal display device can be significantly reduced by combining such a driving method with a driving voltage forming circuit constituted by a charge pump circuit. The present invention relates to WO9
Based on the method of No. 6/21880, it has been developed so as to be compatible with the partial display function, thereby further reducing power consumption.

The period other than the selection period of the scanning electrodes in the display area is a period other than the period in which the selection voltage is applied to the display row (hereinafter, this period is referred to as a non-display row access period). At this time, by fixing the potentials of all the scanning electrodes and all the signal electrodes, the power consumption of the driving circuit during this period can be extremely reduced, and the power consumption of the electro-optical device is reduced. Furthermore, if the operation of the charge pump circuit of the drive voltage forming circuit is stopped during this period, the charging and discharging of the capacitor there is eliminated and the power consumption is further reduced.
During this period, since the power consumption of the drive circuit is extremely small, the capacitor holding the drive voltage is hardly discharged, and even if the operation of the charge pump circuit is stopped, the change in the drive voltage is practically negligible.

Further, in the method of driving an electro-optical device according to the present invention, a first display mode in which the entire display screen is in a display state, a partial area of the display screen in a display state, and other areas in a display state. A second display mode for setting a non-display state, wherein a time for applying a selection voltage to each scanning electrode in the display area does not change between the first display mode and the second display mode. Is preferred. According to the present invention, the time for applying the selection voltage to the scan electrodes in the display area is the same, that is, the duty is the same in the case of full screen display and the case of partial display. Therefore, it is not necessary to change the bias ratio or the drive voltage during the partial display, and the drive circuit and the drive voltage forming circuit do not need to be complicated.

Further, in the driving method of the electro-optical device according to the present invention, the voltage is applied to the liquid crystal of the pixel in the display area in the display state in the first display mode and in the second display mode. So that the effective voltage is the same
It is preferable to set a potential to be applied to the signal electrode during a period other than the selection period of the scanning electrode in the display area. According to the present invention, the potential of the signal electrode is set so that the effective voltage applied to the liquid crystal, which is the electro-optical material in the display area, is the same in the case of full screen display and in the case of partial screen display. Therefore, the contrast of the display area can be kept unchanged.

Further, in the driving method of the electro-optical device according to the present invention, the potential applied to the signal electrode during a period other than the selection period of the scanning electrode in the display area may be set to the ON display or the first display mode. It is preferable to set the same voltage as the voltage applied to the signal electrode in the case of the OFF display. Since the signal voltage in the full screen display state is used as it is, the driving circuit and the driving control are simplified.

Further, in the driving method of the electro-optical device according to the present invention, the plurality of scanning electrodes are driven so as to be simultaneously selected for every predetermined number of units and sequentially selected for every predetermined number of units. The voltage applied to the signal electrode in the case of the ON display or the OFF display in the display mode is the first voltage.
It is preferable that the same voltage is applied to the signal electrode in the case of full screen on display or full screen off display in the display mode. By doing so, in the MLS driving method, the effective voltage applied to the liquid crystal in the display area of the display area can be made equal between the case of full screen display and the case of partial screen display, and the image quality in the case of partial screen display Can be kept good. The increase in circuit size is very small.

Further, in the driving method of the electro-optical device according to the present invention, the potential applied to the signal electrode during a period other than the selection period of the scanning electrode in the display area is set to be equal to the total potential at every predetermined period for scanning one screen. It is preferable that the applied potential for ON display and the applied potential for OFF display are alternately switched and set in the screen display state. Further, in the electro-optical device driving method according to the present invention, the polarity of the voltage difference between the scan electrode and the signal electrode during a period other than the selection period of the scan electrode in the display area in the second display mode is Preferably, it is inverted every frame. By doing so, power consumption during the non-display row access period can be significantly reduced. When the number of partial display rows is small (for example, about 60 rows or less), the image quality of the entire screen does not deteriorate even if the liquid crystal drive voltage of the pixels in the non-display rows is fixed.

The present invention also relates to a method for driving an electro-optical device, comprising a plurality of scanning electrodes and a plurality of signal electrodes arranged in a crossed manner and having a function of partially using a display screen as a display area. To the scanning electrodes in the region, a selection voltage is applied during a selection period and a non-selection voltage is applied during a non-selection period, and the scanning electrodes in other regions of the display screen are applied without applying the selection voltage. A non-selection voltage is applied, and for all signal electrodes, the display screen is partially displayed by fixing the applied voltage for at least a period longer than the same polarity drive period in the polarity inversion drive in the full screen display state. It is characterized by being in a state. According to the present invention, in the case of partial display in which only a partial region is a display region, since the potentials of all the scanning electrodes and all the signal electrodes are fixed for a predetermined period, the liquid crystal layer or the electrode which is an electro-optical material is fixed. There is a period during which charging and discharging are not performed in the drive circuit, etc.
Low power consumption.

Further, in the driving method of the electro-optical device according to the present invention, the voltage applied to the signal electrode is set to be at least for every period longer than the same polarity driving period in the polarity inversion driving in the full-screen display state. It is preferable to alternately switch between the potential for ON display and the potential for OFF display in the full screen display state. Even during the non-display row access period, the polarity of the drive voltage is periodically inverted, so that application of a DC voltage to the liquid crystal and crosstalk can be prevented.

The driving method of the electro-optical device described above can be realized by a simple matrix type liquid crystal display device or an active matrix type liquid crystal display device.

Further, the electro-optical device according to the present invention is driven by using the above-described method of driving an electro-optical device, whereby an electro-optical device with low power consumption can be provided.

Further, the electro-optical device according to the present invention is configured such that a plurality of scanning electrodes and a plurality of signal electrodes are arranged so as to intersect with each other.
In an electro-optical device having a function of partially setting a display screen as a display region, a scan electrode driving circuit that applies a selection voltage to the plurality of scan electrodes during a selection period and applies a non-selection voltage to a non-selection period. A signal electrode drive circuit for applying a signal voltage according to display data to the plurality of signal electrodes;
Setting means for setting position information of a partial display area in a display screen; and a partial display control signal for controlling the scan electrode drive circuit and the signal electrode drive circuit based on the position information set in the set means. Control means for outputting
The drive circuit for scan electrodes and the drive circuit for signal electrodes drive the scan electrodes and the signal electrodes in a display area in a display screen according to the partial display control signal so as to perform display according to display data. A non-display state is provided by continuously applying a non-selection voltage to the scanning electrodes in a non-display area in the display screen. According to the present invention, it is not necessary to change the duty, the bias ratio, the liquid crystal drive voltage, and the like in a hardware circuit for partial display, so the number and positions of display rows or non-display rows are controlled by the control circuit. It can be set in a register. By doing so, it is possible to provide a highly versatile electro-optical device in which the number of lines and the position of the partial display can be set by software.

The above electro-optical device can be realized as a simple matrix type liquid crystal display device or an active matrix type liquid crystal display device.

Further, the driving circuit of the electro-optical device according to the present invention is configured such that a plurality of scanning electrodes and a plurality of signal electrodes are arranged so as to intersect, and has a function of partially using a display screen as a display area. A driving circuit for applying a voltage to the plurality of scan electrodes, and a storage circuit for display data, wherein a voltage selected in accordance with the display data read from the plurality of scan electrodes is supplied to the plurality of scan electrodes. Second driving means for applying a voltage to the signal electrodes, wherein the first driving means applies a selection voltage to the scanning electrodes in the display area during a selection period and applies a non-selection voltage to a non-selection period. And a function of applying only the non-selection voltage to the scan electrodes in the other area of the display screen, and the second driving means corresponds to a selection period of the scan electrodes in the display area. During the period, the memory circuit Reading data, the other periods, characterized in that it has a function of fixing the display data read address of the memory circuit. According to the present invention, by stopping the operation of reading display data from the storage circuit built in the signal electrode drive circuit, the current consumption of the signal electrode drive circuit in the non-display row access period is reduced to nearly zero. be able to. At this time, if the read display information is fixed to 1 or 0, the output of the signal electrode drive circuit can be fixed to the same potential as in the case of full screen on display or full screen off display.

Further, in the electro-optical device according to the present invention, it is preferable that the shift operation of the shift register in the first driving means is stopped during a period other than the selection period of the scanning electrodes in the display area. . According to the present invention, since the scan electrode drive circuit does not output the selection voltage during this period, it is not necessary for the shift register inside the scan electrode drive circuit to operate. If the operation of the shift register is stopped by stopping the shift clock, the power consumption of the scan electrode drive circuit during this period can be reduced to almost zero.

Further, the driving circuit of the electro-optical device according to the present invention is configured such that a plurality of scanning electrodes and a plurality of signal electrodes are arranged in an intersecting manner, and has a function of partially using a display screen as a display area. A driving circuit for sequentially applying a selection voltage to the plurality of scanning electrodes according to a shift operation of a shift register, wherein the scanning electrode driving circuit partially displays a display screen. In the case of a region, a selection voltage is applied to a scan electrode in a display region of the display screen during a selection period in accordance with a shift operation of the shift register, and the shift electrode is applied to a scan electrode in another region of the display screen. The shift operation of the register is stopped halfway and only the non-selection voltage is applied, and the scan electrode drive circuit shifts from a state where the display screen is partially set as a display area to a full screen display state. To, and having an initial setting unit for said shift register as an initial state. According to the present invention, at the time of transition from the partial display state to the full screen display state, scanning is not started from a scanning electrode in the middle,
Scanning of the scan electrodes can be started from the first row.

Further, the electro-optical device of the present invention is characterized by having a driving circuit of the above-mentioned electro-optical device, and a scanning electrode and a signal electrode driven by the driving circuit. An electro-optical device with reduced power consumption can be provided.

Further, the electro-optical device according to the present invention is configured such that a plurality of scanning electrodes and a plurality of signal electrodes are arranged so as to intersect with each other.
An electro-optical device having a function of partially using a display screen as a display area, comprising: a first driving unit for applying a voltage to the plurality of scan electrodes; and a display data storage circuit, the display being read from the display unit. Second driving means for applying a voltage selected in accordance with data to the plurality of signal electrodes, wherein the first driving means includes a scanning electrode in a display area of the display screen for a selection period. And a function of applying the non-selection voltage to the scan electrodes in the other area of the display screen, and applying the non-selection voltage only to the scan electrodes in the other area of the display screen. The driving unit applies a voltage based on the display data read from the storage circuit to the plurality of signal electrodes during the selection period of the scan electrode in the display area, and applies the same display data during other periods. Apply voltage based on Characterized in that it has a function. According to the present invention, by stopping the operation of reading display data from the storage circuit built in the signal electrode drive circuit, the current consumption of the signal electrode drive circuit in the non-display row access period is reduced to nearly zero. be able to.

Further, in the electro-optical device according to the present invention, during the period other than the selection period of the scanning electrodes in the display area, the second driving means may have the same polarity in the polarity inversion driving in the full screen display state. It is preferable that the voltage applied to the signal electrode is alternately switched between a potential for on-display and a potential for off-display in a full-screen display state at least every period longer than the drive period. Even during the non-display row access period, the polarity of the drive voltage is periodically inverted, so that application of a DC voltage to the liquid crystal and crosstalk can be prevented.

Further, in the electro-optical device according to the present invention, there is provided a driving voltage forming circuit for forming a voltage applied to the scanning electrode or the signal electrode and supplying the voltage to the driving means.
It is preferable that the drive voltage forming circuit includes a contrast adjustment circuit that adjusts the voltage of the applied voltage, and the operation of the contrast adjustment circuit is stopped during a period other than the selection period of the scan electrode in the display area. . Since the electro-optical device of the present invention consumes very little power in the driving circuit during the non-display row access period, if the driving voltage is held by a capacitor, the fluctuation of the driving voltage during this period is small even if the contrast adjustment circuit is stopped. There is no practical problem. By stopping the contrast adjustment circuit, the power consumption of the driving circuit can be further reduced.

Further, the method of driving a liquid crystal display device according to the present invention is directed to a reflection type liquid crystal display device in which a partial area of the entire screen of the liquid crystal display panel is set to a display state and another area is set to a non-display state. Alternatively, in the method for driving a transflective liquid crystal display device, the liquid crystal display panel is a normally white type, and in the partial display state, an effective voltage equal to or less than an off voltage is applied to the liquid crystal in the non-display region. Features. By employing the normally white type, the non-display area becomes white in the partial display state, so that a display without a sense of incongruity can be realized. In addition, as a circuit means for applying an effective voltage equal to or lower than the off-voltage to the liquid crystal in the non-display area, a simple means with low power consumption can be used,
Furthermore, since the dielectric constant of the liquid crystal in the non-display area is small, the charge / discharge current associated with the AC driving of the liquid crystal is reduced, and the power consumption of the entire display device can be significantly reduced compared to when the entire screen is in the display state. Becomes

Further, in the driving method of the liquid crystal display device, the liquid crystal display panel is a simple matrix type liquid crystal panel, and in the partial display state, only a non-selection voltage is applied to the scanning electrodes in the non-display area. preferable. Further, it is preferable that the liquid crystal display panel is a simple matrix type liquid crystal panel, and that only a voltage for turning off the signal is applied to the signal electrode in the non-display area in the partial display state.

Further, in the above-mentioned method for driving a liquid crystal display device, the liquid crystal display panel is an active matrix type liquid crystal panel, and the liquid crystal of the pixels in the non-display area is provided at least in the first frame when the display mode is shifted to the partial display state. It is preferable that a voltage equal to or lower than the off-voltage is applied, and only a non-selection voltage is applied to the scan electrodes in the non-display area from a subsequent frame. Further, the liquid crystal display panel is an active matrix type liquid crystal panel, and applies a voltage equal to or less than an off voltage to the liquid crystal of the pixels in the non-display area in at least the first frame when shifting to the partial display state. In the access period of the non-display area, it is preferable that only a voltage equal to or lower than an off voltage is applied to the signal electrode.

In this way, partial display areas can be provided in the row direction and the column direction of the display screen, and the other areas can be hidden. In addition, since the liquid crystal display panel is a normally white liquid crystal display panel, the non-display area has a white display so that the display does not have a sense of discomfort. Can be.

Further, the liquid crystal display device of the present invention is characterized by being driven by using the above-described method of driving a liquid crystal display device. A liquid crystal display device can be provided.

Further, the electronic apparatus of the present invention can provide an electro-optical device using the above-described electro-optical device of the present invention or the above-described liquid crystal display device as a display device. In particular, when the electronic device uses a battery as a power source, the power consumption of the display device is reduced, so that the battery life can be significantly extended.

[0056]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a liquid crystal display device as an example of an embodiment of an electro-optical device according to the present invention. First, the configuration will be described. Block 1 is a simple matrix type liquid crystal display panel (LCD panel) using super twisted nematic (STN) type liquid crystal.
A substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed are arranged facing each other at intervals of several μm, and the above-mentioned liquid crystal is sealed in the gap. Pixels (dots) are arranged in a matrix by the liquid crystal at the intersection of the plurality of scanning electrodes and the plurality of signal electrodes. Further, a polarizing element such as a retardation plate or a polarizing plate is arranged on the outer surface side of the substrate as necessary.

The liquid crystal is STN used in this embodiment.
In addition, various types such as a type in which liquid crystal molecules are twisted (TN type), a type in which homeotropic alignment is performed, a type in which vertical alignment is performed, and a memory type such as ferroelectric can be used. Further, a light scattering liquid crystal such as a polymer dispersed liquid crystal may be used. The liquid crystal display panel may be of a transmissive type, a reflective type or a transflective type, but is preferably of a reflective type or a transflective type for low power consumption. When the liquid crystal display panel 1 is colored, a color filter is formed on the inner surface of the substrate, and three colors emitted by the lighting device are switched in time series.
Such methods are conceivable.

Block 2 is a scan electrode drive circuit (Y driver) for driving the scan electrodes of the liquid crystal display panel, and block 3 is a signal electrode drive circuit (X driver) for driving the signal electrodes of the liquid crystal display panel. . A plurality of voltage levels required for driving the liquid crystal are formed by a driving voltage forming circuit of the block 4 and applied to the liquid crystal display panel 1 via the X driver 3 and the Y driver 2. Block 5 is a controller for supplying necessary signals to those circuits. PD is a partial display control signal, FRM is a frame start signal, CLX is a data transfer clock, and Data is display data.
LP is a data latch signal, which also serves as a scanning signal transfer clock and a drive voltage forming circuit clock. Block 6 is the power supply for the above circuit.

Controller 5, drive voltage forming circuit 4, X
Although the driver 3 and the Y driver 2 are shown as separate blocks, they do not need to be separate ICs, and the controller 5 is connected to the Y driver 2 or the X driver 3.
, The drive voltage forming circuit may be built in the Y driver 2 or the X driver 3, the X and Y drivers may be formed as one-chip ICs, and all of these circuits may be formed as one. They may be combined in a chip IC. These circuit blocks are used for the liquid crystal display panel 1.
Alternatively, it may be placed on a separate substrate, may be placed as an IC on a substrate constituting the liquid crystal display panel 1, or may be placed with a circuit formed on the substrate.

Since the liquid crystal display device of the present invention is of a simple matrix type, the voltage applied to the scanning electrodes in the non-selected rows is one.
Since the driving method using only the level is used, the driving circuit is simplified and the power consumption can be reduced. The non-selection voltage may be prepared in two voltage levels corresponding to the polarity of the voltage applied to the liquid crystal, and a driving method of alternately selecting the non-selection voltage according to the polarity inversion may be adopted. In particular, such a driving method is conventionally used in an active matrix liquid crystal display device having a two-terminal type non-linear element described later in a pixel.

The driving voltage forming circuit block 4 shown in FIG.
Is composed of a charge pump circuit whose main part raises or lowers the voltage. However, a step-up / step-down circuit other than the charge pump circuit may be used.

As an example, the liquid crystal display panel 1 has a total of 200 rows (the number of scanning electrodes), and the entire screen is in a display state (full screen display mode) when necessary.
Only 40 lines out of 0 lines are displayed, and the remaining 160 lines are displayed.
The line goes into a non-display state (partial display mode). A specific driving method will be described in the following individual embodiments.

(First Embodiment) Here, referring to FIGS. 2 to 4, a drive method in which four rows of scan electrodes are simultaneously selected and simultaneously selected in units of four rows of scan electrodes sequentially (hereinafter, 4MLS). (Indicated as Multi-Line-Selection driving method)
An example of a case where partial display is performed using is described. First, an example of the driving voltage forming circuit 4 for 4MLS driving will be described with reference to FIG.

In the MLS driving method, the non-selection voltage VC, the positive-side selection voltage VH (the positive-side voltage based on VC), and the negative-side selection voltage VL (the VC are the scanning signal voltages (the scanning voltage output from the Y driver 2)). Three voltage levels (reference negative voltage) are required. Here, VH and VL are symmetric about VC. In the 4MLS driving method, ± V2, ± V1, and V are used as signal voltages (signal voltages output from the X driver 3).
Five voltage levels of C are required, and the corresponding voltages ± V2 and ± V1 are respectively symmetric about VC. The circuit shown in FIG. 2 outputs the above voltage using (Vcc-GND) as an input power supply voltage and the data latch signal LP as a clock source of a charge pump circuit. Hereinafter, unless otherwise specified, the description is made on the assumption that GND is a reference (0 V) and Vcc = 3 V. GND and Vcc are used as they are for VC and V2 of the liquid crystal drive voltage, respectively.

The block 7 is a step-up / step-down clock forming circuit which forms a two-phase clock having a narrow time interval for operating the charge pump circuit from the data latch signal LP. The block 8 is a negative-direction six-fold booster circuit, which uses (Vcc-GND) as an input power supply voltage and V which is six times the input power supply voltage in the negative direction with respect to Vcc.
EE ≒ −15V is formed. Hereinafter, the negative direction indicates the direction of the negative voltage with reference to a predetermined voltage, and the positive direction indicates the direction of the positive voltage similarly. The block 13 is a contrast adjustment circuit for extracting a necessary negative-side selection voltage VL (for example, -11 V) from VEE, and is composed of a bipolar transistor and a resistor. Block 9 is a double booster circuit for forming the positive-side selection voltage VH.
With ND-VL) as an input voltage, VH (for example, 11 V) which is twice the input voltage is formed in the positive direction with respect to VL.

The block 10 is a negative-direction double booster circuit, which uses (Vcc-GND) as an input power supply voltage and has a voltage -V2 which is twice the input power supply voltage in the negative direction with respect to Vcc.
≒ -3V is formed. The block 11 is a 1/2 step-down circuit, which uses (Vcc-GND) as an input power supply voltage and forms V1 ≒ 1.5 V, which is a voltage that is stepped down to 1/2. The block 12 is also a 1/2 step-down circuit, and [GND-
(-V2)] as an input power supply voltage, and -V1 ≒ −1.5 V, which is a voltage reduced by half, is formed.

As described above, a voltage required for the 4MLS driving method can be formed. Each of blocks 8 to 12 is a charge pump type step-up / step-down circuit. Such a drive voltage forming circuit using a charge pump type step-up / step-down circuit has high power supply efficiency, so that the liquid crystal display device can be driven with low power consumption by the 4MLS driving method. Each of the charge pump circuits in the blocks 8 to 12 has a well-known configuration. In the case of a booster circuit, as an example, N capacitors are connected in parallel to charge an input voltage.
If N capacitors are connected in series, a boosted voltage N times the input voltage can be obtained.
If N capacitors are connected in parallel, a 1 / N step-down voltage can be obtained. The two-phase clock formed by the clock forming circuit 7 is a control clock for a switch that switches and connects these capacitors in series and in parallel.

All or some of the circuit blocks 8 to 12 in the drive voltage forming circuit 4 may be replaced with a well-known switching regulator using a coil and a capacitor instead of a charge pump circuit. I do not care.

FIG. 3 is an example of a timing chart of the liquid crystal display device shown in FIGS. 1 and 2 including a liquid crystal driving voltage waveform.
FIG. 4 is a diagram for explaining an example of a liquid crystal drive voltage waveform.
FIG. 3 shows that the whole screen has 200 scanning electrodes, of which 40
This is an example in which only the rows are in the display state, and a horizontal line is displayed every other scanning electrode in the display state area. The interval between the pulses of the frame start signal FRM is one frame period for scanning one screen, and its length is 200H.
(1H is one selection period or one horizontal scanning period).

CA is a field start signal, and one frame is divided into four fields f1 to f4 of 50H each. The cycle of the data latch signal LP is 1H and the signal L
Four rows of scan electrodes are simultaneously selected for each P clock. The selection voltage VH or VL is applied to the scanning electrodes of the selected row, and the non-selection voltage VC is applied to the scanning electrodes of the other rows. Y1 to Y40, Y41 to Y2
A waveform 00 indicates a scanning voltage driving waveform applied to the scanning electrodes of rows 1 to 200. Y1 at the first clock of signal LP
To Y4, Y5 to Y8 at the second clock,..., And Y37 to Y40 at the tenth clock are sequentially selected.
In between, the selection of 40 rows goes round. The partial display control signal PD is at the "H" level while four of the 40 rows are selected, and during the selection period of the 40 rows, 10H
Keeps the "H" level at the PD. When the selection of the 40 rows is completed, the PD becomes the “L” level, and the remaining period 40H of one field 50H continues the “L” level. Usually Y
The driver 2 has a control terminal for fixing all outputs to a non-selection voltage VC asynchronously by input of a control signal.
By inputting the partial display control signal PD to such a control terminal of the Y driver 2, the non-display row access period 40H in 50H of one field f in which the signal PD is in the "L" period is a full scan of 200 rows. The electrodes are fixed at the non-selection level VC.

Note that M is a liquid crystal AC drive signal,
The polarity of the driving voltage (the difference between the scanning voltage and the signal voltage) applied to the liquid crystal of the pixel is switched between the “H” level and the “L” level. Also, Xn is a display state of only 1 to 40 lines,
A signal electrode driving waveform applied to the n-th signal electrode is shown in a case where a horizontal line is displayed every other scanning electrode in a display state portion in a non-display state in rows 200 to 200.

Although the above operation is repeated in each field, the manner of applying the selection voltages VH and VL to be applied to the selected four rows of scanning electrodes differs in each of the fields f1 to f4. This is shown in FIG. 4A. The selection voltage to be applied to the selected four rows of scan electrodes is the field f
In the case of No. 1, VH, VL, V
H and VH, but in the field f2, VH, VH, VL, and VH are in order from the first row to the fourth row. The combination of the selection voltages in each field is referred to as a Com pattern. FIG. 4A shows that VH is 1 and VL is −
The Com pattern follows a certain orthonormal matrix.

The signal voltage is determined by the display pattern and the Com pattern. When the display pattern is represented by a determinant of 4 rows and 1 column as shown in FIG.
The scanning electrodes Y4n + 1 to Y4n + 4 of the signal electrodes Xn
The signal voltage applied to the pixels in the row can be represented by the product of the Com pattern matrix and the display pattern matrix as shown in FIG. 4C. Each row of the product matrix is a signal voltage to be applied to the signal electrode in accordance with the display of the four rows of pixels. For example, according to FIG. 4C, the field f1 is applied to the signal electrode Xn.
In (2), a signal voltage based on the calculation result of (d1-d2 + d3 + d4) is applied. In field f2, (d1 + d2-
d3 + d4), a signal voltage based on the calculation result is applied,
In fields f3 and f4, the signal voltage is determined based on the calculation result shown in FIG. 4C. In the calculation result, 0 is V
C, ± 2 means ± V1, ± 4 means ± V2.

More specifically, for example, when the entire screen is on display (d1 to d4 are all -1), the operation result is -2 for all rows, so that the signal voltage is -V1 in any field.
In the case where the entire screen is off (all d1 to d4 are 1), the calculation result is 2 for all rows, and the signal voltage is V1 for all fields. When a horizontal line is displayed every other scanning electrode (d1 = d3 = -1, d2 = d4 = 1), the operation result is -2 in the fields f1 and f4, so that the signal voltage is -V1, and the fields f2 and f3 Is 2, the signal voltage becomes V1.

In FIG. 3, while the selection voltage is being applied to the scanning electrodes in the display area, the driving voltage selected as a result of the calculation according to the display pattern is applied to the signal electrodes Xn as described above. You. Hidden row access period 4
It is not preferable to fix the signal voltage of 0H to VC.
The signal voltage of the non-display row access period 40H is set so that the contrast of the displayed area 1 to 40 rows does not change when switching between the full screen display state and the partial display state.
This is because it is necessary that the effective voltage applied to the liquid crystal in the display area be the same in the two states. Therefore, here, the signal voltages during that period are applied to the last four rows (Y37 to Y37)
The voltage -V1 at the time when the scanning electrode of (40) is selected is continued as it is. The signal voltage in the non-display row access period 40H is fixed to a constant voltage in one field, but is not always the same in each field. The drive voltage of the signal electrode Xn is -V1, V1, V1, -V during the non-display row access period for each field.
It changes to 1. Thus, the non-display row access period 40
The H signal voltage does not need to be fixed to the same voltage in each field, and changes with the polarity inversion of the liquid crystal driving voltage described below.

M is a liquid crystal AC drive signal, and FIG. 3 shows a case where the polarity of the liquid crystal drive voltage is inverted for each frame. When the level of the liquid crystal AC drive signal M is inverted, the polarity of the Com pattern in FIG.
Is inverted to -1), and accordingly, the polarity of the selection voltage applied to the scanning electrode and the signal electrode and the polarity of the signal voltage with respect to VC are also inverted. In the full screen display state, the liquid crystal AC drive signal M is inverted every 11H, and the polarity of the selection voltage applied to the liquid crystal is inverted every 11H, thereby reducing the occurrence of display crosstalk. On the other hand, in the partial display state, the display area D
For the same period (11
H), the polarity inversion drive is performed every time.
During a period longer than 1H, the voltage applied to the liquid crystal is inverted. If the partial display area is small, the non-display row access period becomes long, and the potentials of the signal electrodes and the scanning electrodes are fixed for a long period after the display area D is driven at a high duty, and the polarity inversion is performed for each frame. However, as a result of the experiment, there was no problem in image quality. Further, the liquid crystal driving voltage is fixed during the non-display access period, so that the liquid crystal layer, the Y driver 2 and the X driver 3, the controller 5
And the like, power consumption due to charge / discharge current or through current generated due to a voltage change is greatly reduced, which is also preferable in terms of low power consumption. The larger the non-display area, the longer the non-display access period and the longer the fixed period of the scanning voltage and the signal voltage, so that the charge and discharge of the liquid crystal and the circuit can be suppressed, and the power consumption can be further reduced.

By the above method, the partial display function in the case of the 4MLS driving method can be realized. By such a method, the power consumption in the partial display state can be reduced to a level almost proportional to the number of display rows.

When the liquid crystal display panel 1 is in the full-screen display state, the control signal PD is always at "H" level, the data latch signal LP is continuously supplied, and the scan electrodes Y1 to Y20
0 is simultaneously selected for every four rows and sequentially selected for every four rows.
Also, in the full screen display state, the polarity inversion of the liquid crystal drive voltage is
It is necessary to perform it every predetermined period. For example, it is necessary to switch the polarity of the selection voltage and the signal voltage every 11H to perform the polarity inversion. In addition, the polarity of the liquid crystal drive electrode may be inverted every frame period, or in addition, the polarity may be inverted every predetermined period in the frame.

The time and voltage for applying the selection voltage to each scanning electrode in the display area are the same in the case of full-screen display and the case of partial display in only some rows. Therefore, there is no element that needs to be added to the drive voltage forming circuit 4 for the partial display function.

In the above embodiment, the MLS driving method in the case of simultaneous selection of four lines has been described. However, the number of simultaneously selected lines is not limited to four. It does not matter if it is a choice. If the number of simultaneously selected lines is different, the period of one field is different. Also, the case where the application of the selection voltage is evenly dispersed within one frame has been described. The method is also applicable to a method in which selections are grouped in a frame so that the selection is performed continuously. Further, in the embodiment, the entire screen is 200 lines and the number of partial display lines is 40 lines. However, the present invention is not limited to this, and the position of partial display is not limited to this.

Furthermore, in the above embodiment, the number of clocks of the data latch signal LP for each field is described as (the number of display rows / the number of simultaneously selected lines). The case of adding a little before and after is also included in the gist of the present invention.

(Second Embodiment) Next, this embodiment will be described with reference to FIGS. FIG. 5 is a circuit diagram showing a part of the controller 5 in FIG. 1, and is a circuit block for controlling a partial display state. FIG. 6 is a timing chart for explaining the operation of the circuit of FIG. 5, and is a view obtained by enlarging and adding a part of the timing chart of FIG. 3 of the first embodiment. The configuration and operation of the liquid crystal display device according to the present invention
This is the same as the description in the embodiment. Therefore, the description of the same parts as in the first embodiment will be omitted.

First, the configuration of the circuit shown in FIG. 5 will be described. 14
Is a register of about 8 bits, in which information as to whether or not a partial display state is set and information corresponding to the number of rows to be partially displayed are set. If the number of rows is set with 7 bits, partial display of up to 2 ⁷ = 128 rows can be set in units of one row in a line-sequentially driven panel of one row at a time, and four-row simultaneous selection drive (4MLS drive method)
In this panel, partial display up to 2 ⁷ × 4 = 512 lines can be set in units of 4 lines.

Reference numeral 15 denotes a circuit block mainly composed of a counter, which includes a field start signal CA and a data latch signal LPI.
The timing signals PD and CNT for controlling the partial display are formed based on the timing signals described above and the set value of the register 14. LPI is a signal on which LP is based, and as shown in FIG. 6, is a signal in which a clock having a constant cycle exists even in a non-display row access period in which PD is at “L” level. 16 is an AND gate.

FIG. 6 shows the partial display control signal forming block 15.
As shown in (1), the signal CNT that is 1H ahead of the partial display control signal PD is first formed based on the field start signal CA, the data latch signal LPI, and the register set value. The circuit block 15 can form CNTs by, for example, switching the level of CNTs by detecting coincidence between a counter that counts the number of rows by inputting the LPI and a row value obtained by the set value of the register 14. . The AND output between CNT and LPI becomes LP. PD
Is formed by delaying CNT by 1H with LPI. In the full screen display state, the CNT is constantly at the “H” level, the AND gate 16 remains open, and the LP
The same signal as PI is sent out as is. This allows
All the scanning electrodes of 200 rows are selected in units of a predetermined number of rows.

In the case of partial display, the PD indicating the partial display period in one field period is set to the “H” level during the period specified by the set value, according to the set value of the shift register 14. The PD is a CNT having an “H” level having a length corresponding to the “H” level period, and by controlling the output of LP, the data latch signal LP is output only during the period when the CNT is “H”. Become like

According to the above method, a value corresponding to the number of partial display lines can be set in the register 14 of the control circuit, and the number of partial display lines can be varied by adjusting the PD (CNT) according to the set value. Become. In order to realize the partial display function, there is no need to provide a means having a hardware limitation such as a change in the LP cycle, a change in the bias ratio, and a change in the selection voltage. Thus, a liquid crystal display device having a versatile partial display function that can be set in software.

In the above example, a case has been described in which a predetermined number of lines are partially displayed from the top of the panel.
By preparing two sets of registers of the setting means and setting values corresponding to the start row and the end row of the partial display area in each register,
In addition to the number of rows, the position of the partial display area can be made variable. In this case, the circuit block 15 compares the count value of the counter with the start row set in the first register, sets CNT to “H” by coincidence, and sets the counter count value and the end set in the second register. Control is performed so that the CNT is set to “L” by comparing with the row and matching.

(Third Embodiment) The present embodiment differs from the first embodiment only in that the potential of the signal electrode during the non-display row access period is fixed at the same level as in the case of full screen off display. It is an example in the case of being different. Co of FIG. 4A
The adoption of the 4MLS driving method of the uniform distribution of the selection voltage by the m pattern and the driving voltage forming circuit 4 as shown in FIG. 2 mainly using the charge pump circuit, and there are 200 scanning electrodes on the entire screen, of which In which only 40 rows are in the display state, the example in which a horizontal line is displayed every other scanning electrode in the display state part, the point that the length of one frame period is 200H, As in the first embodiment, the voltage applied to the scan electrodes during the display row access period is fixed to the non-selection voltage VC, and the polarity of the liquid crystal drive voltage is inverted for each frame. Therefore, the description of the same parts as in the first embodiment will be omitted.

FIG. 7 is a timing chart in the present embodiment, and differs from FIG. 3 described in the first embodiment only in the voltage waveform applied to the signal electrode Xn.
Since the voltage waveforms applied to the scan electrodes Y1 to Y200 are the same as those in FIG. 3, the description in FIG. 7 is omitted.

In the present embodiment, the signal electrodes X are not applied during the non-display row access period (the period of 40H in each field f).
The potential applied to n is fixed at the same level ± V1 as in the case of full screen off display. That is, the signal voltage in the non-display row access period is fixed at V1 when the liquid crystal AC drive signal M is "L", and is fixed at -V1 when M is "H".
It is inverted every frame.

By such a method, the effective voltage applied to the liquid crystal in the display area can be made the same between the full screen display state and the partial display state, and the two states of full screen display and partial display are switched. Sometimes, the contrast of the display area does not change. It is possible to fix the signal voltage in the non-display row access period to the same voltage as in the case of full screen off display by adding a slight change to the X driver 3. For one example of the method, see Chapter 6.
The embodiment will be described.

The signal voltage during the non-display row access period is changed to the first
Instead of the method of continuing the voltage when the scanning electrodes (Y37 to Y40) of the last four rows of the display area are selected as in the embodiment, the full screen off display or the full screen is used as in this embodiment. A method in which the signal voltage is set to the same level as the signal voltage in the case of the screen-on display is preferable in that the occurrence of flicker can be suppressed.

The reason will be described below. If the display pattern of the last four lines of the partial display area is three lines on display and one remaining line is off display, or conversely, three lines are off display and one remaining line is on display In the first embodiment, the signal voltage is VC in three of the four fields, and the remaining one is -V2 or V2 depending on the number of ON rows of the last four rows of the partial display area.
Accordingly, the signal voltage in the non-display row access period is VC in three of the four fields, and the remaining one is -V in accordance with the number of ON rows of the last four rows in the partial display area.
2 or V2.

On the other hand, in the case of the present embodiment, as described above, in all four fields,-
V1 (signal electrode voltage for all pixels ON display) or V1
(Signal electrode voltage for all-pixel off display). Since the voltage of ± V2 in the first embodiment is twice as large as ± V1, the liquid crystal easily responds and causes flicker. Therefore,
It is preferable in terms of image quality that the signal voltage in the non-display row access period be set to the same voltage as in the full screen off display or the full screen on display.

(Fourth Embodiment) Here, SA (Smart-
Addressing) An example of a case where partial display is performed using a driving method will be described. The configuration of the liquid crystal display device is the same as that of FIG. 1 described above. The SA driving method is different from the driving method of FIG. 20 in which the liquid crystal AC driving signal M is “H” in FIG. The potential is set to (V1-V
This is a driving method in which the non-selection voltage is set to one level by lowering only 4), and the scanning electrodes are sequentially selected one row at a time as in the conventional driving. First, an example of a drive voltage forming circuit for SA driving corresponding to the block 4 in FIG. 1 will be described with reference to a block diagram of FIG.

In the SA driving method, similarly to the MLS driving method, three voltage levels of a non-selection voltage VC, a positive-side selection voltage VH, and a negative-side selection voltage VL are required as scanning signal voltages. Here, VH and VL are symmetric about VC. VH in the case of the SA driving method is considerably higher than VH in the case of the MLS driving method. Two voltage levels of ± VX are required as signal voltages, and these voltages are also symmetric about VC. The circuit shown in FIG. 8 uses (Vcc-GND) as the input power supply voltage and outputs the above voltage using the data latch signal LP as the clock source of the charge pump circuit. Hereinafter, unless otherwise specified, GND is used as a reference (0 V) and Vc
Description will be made assuming that c = 3V.

As the signal voltages -VX and VX, GND and Vcc are used as they are. Block 17 is a step-up / step-down clock forming circuit that charges and converts the input signal LP.
A two-phase clock having a narrow time interval for operating the pump circuits 18 to 20 is formed. Block 19 is 1/2
The step-down circuit forms VC 、 1.5 V, which is a voltage obtained by stepping down the input power supply voltage Vcc to １ ／. Block 18
Is a negative direction eight-fold booster circuit, which forms VEE ≒ -21V, which is eight times the input power supply voltage in the negative direction with respect to Vcc, using (Vcc-GND) as the input power supply voltage. The block 21 supplies the necessary negative selection voltage VL (for example, -17
V) is a contrast adjustment circuit for extracting V) from VEE. The block 20 forms the positive selection voltage VH2.
This is a double booster circuit, and when (VC-VL) is an input voltage and V
VH which is twice the input voltage in the positive direction with respect to L
(For example, 20 V).

As described above, a voltage required for SA driving can be formed. Each of the blocks 18 to 20 is a charge pump type step-up / step-down circuit. The charge pump circuit is configured by series-parallel switching of a plurality of capacitors using a two-phase clock as described above. Such a charge pump type driving voltage generation circuit using a step-up / step-down circuit has high power supply efficiency, so that a liquid crystal display device using the SA driving method can be driven with low power consumption.

FIG. 9 is an example of a timing diagram including the liquid crystal drive voltage waveform. There are 200 scanning electrodes on the entire screen, only 40 of which are in the display state, and the scanning is performed in the display state. This is an example in which a horizontal line is displayed every other electrode.

The length of one frame period is 200H.
The cycle of the data latch signal LP is 1H,
One row of scan electrodes is sequentially selected for each clock. The selection voltage VH or VL is applied to the scanning electrodes of the selected row, and the non-selection voltage VC is applied to the scanning electrodes of the other rows. Waveforms of Y1 to Y40 and Y41 to Y200 indicate scan voltage driving waveforms applied to the scan electrodes of rows 1 to 200. The scanning electrodes of Y1 are sequentially selected at the first clock of the LP, Y2 at the second clock,...,... While the 40 rows are selected, the partial display control signal PD keeps the “H” level. PD after selecting 40 lines
Is at the "L" level, and the remaining period 160H is maintained at the "L" level. Normally, the Y driver 2 has a control terminal for asynchronously fixing all outputs to the non-selection voltage VC. P
By inputting D to such a control terminal of the Y driver 2, during the non-display row access period 160H during which the PD is at "L", all the scanning electrodes are fixed at the non-selection level.

Note that M is a liquid crystal AC drive signal,
The polarity of the driving voltage (the difference between the scanning voltage and the signal voltage) applied to the liquid crystal of the pixel is switched between the “H” level and the “L” level. Also, Xn is a display state of only 1 to 40 lines,
A signal electrode driving waveform applied to the n-th signal electrode is shown in a case where a horizontal line is displayed every other scanning electrode in a display state portion in a non-display state in rows 200 to 200.

FIG. 9 shows that the polarity inversion of the liquid crystal driving voltage is 1
This is an example in the case of inverting every frame. The selection voltage applied to the scanning electrode is V when the liquid crystal AC drive signal M is "L".
When it is H or "H", it is VL. When M is “L”, the signal voltage is −VX for an ON pixel, VX for an OFF pixel, and M
Is "H", the ON pixel is VX, and the OFF pixel is -VX.
It is. As described in the previous embodiment, when the number of rows to be partially displayed is small and the non-display area is large, the signal electrodes and the scanning are performed during a relatively long non-display row access period after the display area is driven at a high duty. Although the potential of the electrode was fixed and the polarity inversion was performed for each frame, as a result of the experiment, there was no problem in the image quality. Further, since the liquid crystal driving voltage is fixed during the non-display access period, the power consumption due to the charge / discharge current and the through current generated in the liquid crystal layer, the Y driver 2 and the X driver 3, the controller 5, and the like due to the voltage change. Is significantly reduced, which is also preferable in terms of reducing power consumption. The power consumption increases as the non-display area increases.
Since the non-display access period is lengthened and the fixed period of the scanning voltage and the signal voltage is lengthened, charge and discharge of the liquid crystal and the circuit are suppressed and can be further reduced.

As the voltage applied to the signal electrode Xn during the non-display row access period, the voltage (VX in FIG. 9) when the scanning electrode of the last row (Y40) of the display area is selected is continued. . The signal voltage during the non-display row access period is 1
The voltage is fixed at a constant value in a frame, but is switched between VX and -VX every frame. As described above, the signal voltage in the non-display row access period does not need to be the same in each frame. In this manner, when switching between the full screen display state and the partial display state, the signal voltage in the non-display row access period is symmetric with respect to the non-selection voltage VC so that the contrast of the displayed area does not change. By alternately repeating the two potentials, the effective voltage applied to the liquid crystal in the display area can be fixed at the same voltage. In this embodiment, VX or -VX
Corresponds to the signal electrode voltage in the case of full display off or full display of the display, so that the potential of the signal electrode is set to full on display or full display in the non-display row access period as in the above-described embodiment. This means that the level is fixed to the same level as in the case of the off display.

It is to be noted that a circuit similar to that shown in FIG. 5 may be used for forming the signals PD and LP. The timing chart in this case may be modified as follows in FIG. That is, CA is set to FRM, and the length of fn is set to one frame period (200H).
The number of LPI clocks in one frame period to 200,
The period when CNT is “H” is from the falling edge of the 200th LPI clock to the falling edge of the 40th clock, the LP clock is from the 1st LPI clock to the 40th clock, and the period when PD is “H” is the 1st LPI clock. What is necessary is just to change from the fall to the fall of the 41st clock.

By the above method, a partial display function in the case of the SA driving method can be realized. Even by such a method, the power consumption in the partial display state can be reduced to a level almost proportional to the number of display rows.

In the full screen display state, the control signal PD is always "H", LP is continuously supplied, and Y1 to Y200 are sequentially selected. In addition, in the full screen display state, it is necessary to invert the polarity of the liquid crystal drive voltage every predetermined period.
For example, it is necessary to reverse the polarity by switching the polarity of the selection voltage and the signal voltage every 13H. In addition, the polarity of the liquid crystal drive electrode may be inverted every frame period, or in addition, the polarity may be inverted every predetermined period in the frame.

The time and voltage for applying the selection voltage to each scanning electrode in the display area are the same in the case of full screen display and the case of partial display in only some rows. Therefore, there is no element that needs to be added to the drive voltage forming circuit for the partial display function, and the number of rows to be partially displayed can be set by software using a circuit as shown in FIG.

(Fifth Embodiment) In the present embodiment, the liquid crystal AC drive signal M during the period when the selection voltage is applied to the display row is used.
Is different from the fourth embodiment in that the timing is the same in the case of full-screen display and in the case of partial display on only some of the rows. A drive voltage forming circuit 4 such as that shown in FIG. 8 mainly comprising an SA drive method and a charge pump circuit is employed, and there are 200 scanning electrodes on the entire screen, and only 40 of them are in a display state. This is an example in which a horizontal line is displayed every other scanning electrode in the display state, the point that the length of one frame period is 200H,
The voltage applied to the scanning electrodes during the non-display row access period is fixed at the non-selection voltage VC, and the voltage applied to the signal electrodes is fixed at VX or -VX symmetrical to VC. The selected voltage is VH when the liquid crystal AC drive signal M = “L”, VL when M = “H”,
When the signal voltage is M = “L”, the voltage is −VX for the ON pixel, VX for the OFF pixel, and V when the signal voltage is M = “H”.
The point of −VX in the X and off pixels is the same as in the fourth embodiment. Therefore, the description of the same parts as in the fourth embodiment will be omitted.

FIG. 10 is a timing chart according to the present embodiment, in which the polarity of the liquid crystal drive voltage is switched every 13H (selection period of the scanning electrodes of 13 rows). Thus, the cycle of the liquid crystal AC drive signal M becomes 26H. 20
Since 0H is not divisible by 26H, the frame start signal F
The timing of the liquid crystal AC drive signal M is shifted by 8H per frame with respect to RM, and returns to the start timing of FIG.

In order to form a signal M having a fixed cycle in the partial display state, the frequency of the continuous clock signal LPI shown in FIGS. The frequency should be divided by two. Although not shown in the case of full-screen display, it is assumed that the polarity of the liquid crystal drive voltage is similarly switched every 13H. In this manner, the timing of inverting the polarity of the voltage applied to the liquid crystal of the portion displayed in the partial display state can be made the same as that in the full screen display state.

By doing so, the image quality of the part displayed in the partial display state can be made the same as that in the full screen display state. If LP is used instead of the continuous clock signal LPI to form the liquid crystal AC drive signal M, flicker may occur in the partial display state due to the relationship between the polarity inversion cycle of the drive voltage and the number of partial display rows. The image quality may be degraded by applying a DC voltage.

(Sixth Embodiment) FIG. 11 is an example of a partial block diagram of the signal electrode drive circuit (X driver 3) in FIG. It corresponds to the 4MLS driving method, and the number of output terminals for driving the liquid crystal is set to 160 as an example. Hereinafter, the configuration of FIG. 11 and the function of each block will be described.

Block 25 is an RA for storing display data.
M, and is constituted by the number of bits (160 × 240 pixels) that can correspond to a liquid crystal display panel of up to 240 rows in binary display (display of only on / off without gradation display).
The block 22 is connected to the RAM 2 according to the data latch signal LP.
5 is a circuit for generating a signal for precharging 5. A block 23 is a row address generation circuit that specifies which four rows of display data are to be read from the RAM 25. The addresses sequentially specified in accordance with the frame start signal FRM and the data latch signal LP are the scanning electrodes of the four rows that are simultaneously selected. , The addresses of the four rows are sequentially incremented so as to collectively output the display data of the pixels of four rows × 160 columns according to the LP.

The display data of four rows specified by the row address generation circuit 23 is read from the RAM 25 and
It is sent to the read-out display data control circuit of the block 26 composed of D gates. The partial display control signal PD is “H”
During the level period, the same content as the display data is sent to the next block 27 via the block 26, but the PD becomes “L”.
During the level period, display data from the RAM is ignored, and data (0) of all pixels off is sent to the block 27. Here, while the PD is at the “L” level, the block 26 may be changed so that all the pixels input ON-display data (1) to the block 27.

The block 24 is a circuit for generating a Com pattern as shown in FIG. 4A in accordance with the polarity of a frame, a field, or a liquid crystal drive voltage. Addressed by the signal CA, the liquid crystal AC drive signal M, etc., the Com pattern (M
(The pattern is inverted / non-inverted depending on the level). A block 27 is an MLS decoder for the X driver for forming a drive voltage selection signal from the Com pattern and the display data for four rows passing through the block 26. ML
The S decoder 27 outputs five drive voltage selection signals for 160 pixels for one pixel. The drive voltage selection signal is a set of five signals indicating which voltage is to be selected from five voltages of VC, ± V1, and ± V2. Don
Is a display control signal for setting the entire screen to a non-display state. When Don is set to the "L" level, only a signal instructing selection of VC among five selection signals becomes active.
When Don goes to the “H” level, based on the display data and the Com pattern displayed on the pixels of four rows in the column direction, FIG.
A signal voltage determined according to the determinant of C is selected from among five voltages.

The block 28 is a level shifter for expanding the voltage amplitude of the drive voltage selection signal from the logic voltage (Vcc-GND) to the liquid crystal drive voltage level (V2-[-V2]). Block 29 is a voltage selector for actually selecting one voltage from five voltages of VC, ± V1, ± V2, and is connected to five voltage supply lines by a drive voltage selection signal whose voltage amplitude level is amplified. One of the switches is closed to output the selected voltage to each of the signal electrodes X1 to X160. The above is the configuration of the block diagram in FIG. 11 and the function of each block.

In the non-display row address period of the partial display state, if the clock of the LP signal is stopped and input to the LP terminal of the X driver 3 of the present embodiment as shown in FIG. The generation circuit and the row address generation circuit of the block 23 are stopped.
5 can be stopped. At this time, since the LP is not input to the row address generation circuit 23 and the address is not incremented, the RAM 25 continues to output the display data of the last four rows of the display area.

Therefore, when the block 26 is omitted,
As in the first embodiment, the signal voltage in the non-display row access period is the same as the voltage when the scan electrodes in the last four rows of the display area are selected. However, FIG.
As in the first embodiment, the presence of the block 26 allows the signal PD which becomes “L” to be input to the PD terminal of the X driver 3 in the non-display row access period as shown in FIG. 3 as in the fourth embodiment. The signal voltage in the non-display row access period maintains the same voltage (V1 or -V1) as the signal voltage in the full screen off display or the full screen on display.

RAM for storing data to be displayed on the entire screen
A built-in driver is used because it is effective in reducing the power consumption of a liquid crystal display device. Further, in the MLS driving method of the uniform distribution of selection voltages as described in the first embodiment, the configuration of the liquid crystal display device becomes easier by using a driver with a built-in RAM. For these reasons, liquid crystal display devices aiming at both improvement in image quality and low power consumption include MLS.
A driver with a built-in RAM corresponding to the driving method has begun to be adopted. In such a liquid crystal display device, power consumption accompanying a precharge (refresh) operation when reading display data from the RAM occupies a considerable part of the total power consumption. Therefore, in order to pursue low power consumption by the partial display function, it is necessary to stop the read operation of the RAM during the non-display row access period using the X driver as in the present embodiment.

In the above embodiment, the MLS driving method in the case of simultaneous selection of four lines has been described. However, the number of simultaneously selected lines is not limited to four, but may be two or seven. In addition, although the case where the application of the selection voltage is uniformly dispersed in one frame has been described, the present invention can be applied to a case where the application of the selection voltage is not uniformly dispersed (a case where a selection period in a frame for one scanning electrode is continuous). In FIG. 11, V
The two terminals and the VC terminal are independent of the logic part power supply voltage terminals Vcc and GND, but need not be independent. A liquid crystal display device capable of gradation display instead of binary display, in which the display data RAM has a storage capacity corresponding to the number of gradation bits, or the display data RA for a plurality of screens.
The present invention can also be applied to a liquid crystal display device capable of switching and displaying a screen by incorporating M.

(Seventh Embodiment) FIG. 12 is an example of a block diagram of the scan electrode drive circuit (Y driver 2) of the present invention in FIG. 1, and the 4MLS drive method is used similarly to the sixth embodiment. Yes, it is. The number of output terminals for driving the liquid crystal was 240 as an example. Hereinafter, the configuration of FIG. 12 and the function of each block will be described.

The block 32 is a shift register for sequentially transferring the field start signal CA bit by bit using the data latch signal LP as a clock. It consists of 60 bits and specifies which of the 240 rows to apply the selection voltage to. Block 30 is an initial setting signal generating circuit which sets the first bit of the shift register 32 to 1 at the falling timing of the data latch signal LP when the frame start signal FRM or the field start signal CA is at "H" level, A signal is generated for clearing the 59th bit to 0. The block 31 is a circuit for generating a Com pattern according to the field and the polarity of the liquid crystal drive voltage, as in the case of the Com pattern generation circuit 24 in FIG.
om pattern is stored in the frame start signal FR.
M, a field start signal CA, a liquid crystal AC drive signal M, and the like.
The m patterns are selectively output. The Com pattern generation circuit of the X driver 3 and the Y driver 2 may be shared.
A block 33 is an MLS decoder for a Y driver that forms three drive voltage selection signals from the 60-bit selected row information specified by the shift register 32 and the Com pattern. The MLS decoder 33 outputs three drive voltage selection signals for 240 rows per row. The drive voltage selection signal is a set of three signals indicating which voltage is selected from the three voltages VH, VC, and VL.

Don is a display control signal for bringing the entire screen into a non-display state. When Don is set to the “L” level, 3
Only the signal instructing the selection of VC among the book selection signals becomes active. When Don becomes “H” level, the scanning signal voltage determined according to the matrix of FIG. 4A based on the selected row and the Com pattern is selected from the three voltages.

The block 34 changes the voltage amplitude of the drive voltage selection signal from the logic voltage (Vcc-GND) to (VH-V
L) is a level shifter that expands to L). Block 35 is V
This is a voltage selector that actually selects one voltage from three voltages of H, VC, and VL. One of the switches connected to the three voltage supply lines is closed by the drive voltage selection signal having the amplified voltage amplitude level, and the selected voltage is output to each of the scan electrodes Y1 to Y240. The above is the configuration of the block diagram in FIG. 12 and the function of each block.

In the non-display row address period in the partial display state, if the data latch signal LP whose clock is stopped as shown in FIG. 3 is input to the LP terminal of the Y driver 2 of the present embodiment, Operation can be stopped. Although the power consumption of the Y driver 2 is relatively small, it is preferable to stop the operation of the shift register 32 during the non-display row address period in the partial display state pursuing low power consumption.

The reason why the initialization signal generation circuit of the block 30 is provided is to prevent an abnormal display at the time of shifting from the partial display state to the full screen display state. If the block 30 does not exist, in the partial display state, for example, when operated at the timing of FIG. 3 or FIG. 7, the "H" level is written in the shift register 32 every 10 bits. Even in such a case, the signal P remains in the partial display state.
There is no problem because the bits after 10 bits are ignored by D. However, when shifting from this state to the full screen display state, the selection voltage is simultaneously applied to 4 lines every 40 lines and to 20 lines out of 200 lines in the full screen. It will be applied, and an abnormal display will occur instantaneously. Instead of providing the block 30, an initial setting circuit for clearing the shift register 32 when the PD is "L" is added so that the bit in the shift register 32 is initialized when shifting from the partial display state to the full screen display state. The state may be set. As described above, the shift register 32 requires a means for initializing the shift register when shifting from the partial display state to the full screen display state.

(Eighth Embodiment) FIG. 13 is a view similar to FIG.
3 is an example of a circuit diagram of the contrast adjustment circuit 13 of the present invention. Here, RV is a variable resistor, Qb is a bipolar transistor, and Qn is an n-channel MOS transistor. The signal PDH input to the gate of Qn is a signal obtained by expanding the voltage amplitude of the signal PD from the logic voltage (Vcc-GND) to (Vcc-VEE) by the level shifter. The resistance value of the transistor Qn in the on state is assumed to be negligibly small as compared with the resistance value of RV. In the figure, for example, -V2 is -3V, VEE is -15V, and VL is -10V.

If there is no transistor Qn, it is basically the same as the conventional contrast adjusting circuit shown in FIG. In the full screen display state, the PDH is always at the "H" level, that is, Qn is always on, and the presence of Qn can be ignored in terms of resistance value and functions in the same manner as the conventional contrast adjustment circuit. A voltage obtained by dividing the voltage between -V2 and VEE by the variable resistor is extracted and supplied to the base of Qb, and Qb supplies a voltage about 0.5 V higher than the voltage supplied to the base as VL from the emitter. Adjustment of the variable resistor RV selects the selection voltage V that provides the optimum contrast.
L is obtained. PDH is "H" even in partial display state
The same applies to the level period, that is, the period in which the selection voltage is applied to the display row.

In the partial display state, during the period when the PDH is at the “L” level, that is, during the non-display row access period, Qn is turned off and the function of the contrast adjustment circuit 13 stops. During this period, the base and the collector of Qb have the same potential as -V2, and Qb is completely turned off. During this period, the charge pump circuit of the drive voltage forming circuit 4 is in an operation stop state, and the application of the selection voltage is also stopped. Therefore, the current consumption of the VL system is 0. There is no problem because is retained. By stopping the contrast adjustment circuit 4 during the non-display row access period as described above, the power consumption by the contrast adjustment circuit during this period can be reduced to 0, and the power consumption of the liquid crystal display device can be reduced.

In the above embodiment, an example in which a signal PDH obtained by level-shifting the PD is required has been described. However, if the configuration of the drive voltage forming circuit is devised, the partial display control signal PD is directly output instead of the level-shifted signal PDH. Can be used to stop the contrast adjustment circuit.

As described above, according to the first to eighth embodiments, the driving voltage forming circuit is not complicated, and
It is possible to provide a highly versatile electro-optical device in which the number of lines and the position of the partial display can be set by software. Also,
It is possible to provide an electro-optical device in which power consumption during partial display is significantly reduced.

In each of the above embodiments, the signal voltage during the non-display row access period is fixed within one field or is fixed at a predetermined period shorter than one frame. The power consumption can be reduced if the voltage is fixed for at least a period longer than the drive period of the same polarity (half cycle of the polarity inversion drive cycle) in the polarity inversion drive cycle of the liquid crystal drive at the time of (1). During the period, the signal may be inverted with the signal voltage at the time of full-screen ON display and OFF display according to the predetermined cycle. For example,
The polarity reversal of the liquid crystal drive in the full screen display state is 1 in the simple matrix type liquid crystal display device shown in the above embodiment.
The polarity reversal drive cycle is 2 since it is performed every 1H or 13H.
The polarity inversion driving cycle is 2H or 2 dot periods because the polarity is inverted every 1H or dot period (= 1H / the number of horizontal pixels) in an active matrix type liquid crystal display device to be described later. The polarity inversion drive cycle of the liquid crystal drive in the non-display area in the partial display state is longer than those in the full screen display state, and in the simple matrix type liquid crystal display device, the applied voltage is fixed at least for a period longer than 11H or 13H. In the active matrix type liquid crystal display device, if the applied voltage is fixed for at least 1H or a period longer than the dot period, the driving frequency is reduced and the power consumption is reduced.

The first to eighth embodiments relating to the above description have been described on the assumption that the liquid crystal display device is a simple matrix type. However, the first to eighth embodiments are similar to those of an active type liquid crystal display device having a two-terminal nonlinear element in a pixel. The present invention can be applied to an electro-optical device. FIG. 22 is a diagram showing an equivalent circuit diagram of such an active matrix type liquid crystal display device 1, in which 112 indicates a scanning electrode, 113 indicates a signal electrode, 116 indicates a pixel, 3 indicates an X driver, and 2 indicates a Y driver. . Each pixel 116 includes a two-terminal nonlinear element 115 electrically connected in series between the scanning electrode 112 and the signal electrode 113 and a liquid crystal layer 114. In the two-terminal nonlinear element 115, the order of connection with the liquid crystal layer 114 may be opposite to that in the drawing, but in any case, the current characteristic has non-linearity according to the applied voltage between the two terminals like a thin film diode. It is used as a switching element utilizing this. As a configuration of the liquid crystal display panel, a two-terminal non-linear element and a pixel electrode and one of a scanning or signal electrode are formed on one substrate, and a wide scanning or scanning electrode is formed on the other substrate so as to overlap the pixel electrode. The other of the signal electrodes is formed, and a liquid crystal layer is sandwiched between a pair of substrates. Also in such an active matrix type liquid crystal display panel, partial display can be performed by the same driving method as in the above embodiments. In the case of an active matrix type liquid crystal display panel, since a driving method in which a switching element is arranged in each pixel and a voltage is held is used, when shifting from the full screen display state to the partial display state, as described later. It is preferable to write the off-display voltage to the pixels in the non-display area at the time of transition and then transition to the partial display state.

(Ninth Embodiment) This embodiment realizes a display without a sense of incongruity in a partial display state. FIG. 14 is a view for explaining a partial display state in the liquid crystal display device of the present invention. Reference numeral 1 denotes a normally white liquid crystal display panel, for example, 240 rows × 320
It is assumed that pixels (dots) in a column can be displayed. When necessary, the entire screen can be displayed, but during standby, a part of the entire screen (for example, as shown in FIG.
(Only the row) can be set to the display state (display area D), and the remaining area can be set to the non-display state (non-display area). Since it is a normally white type, the non-display area is displayed in white.

The structure of the liquid crystal display panel is the same as that of the first to eighth embodiments. Liquid crystal is sandwiched between a pair of substrates.
An electrode for applying a voltage to the liquid crystal layer is provided on the inner surface of the substrate, and a polarizing element is arranged on the outer surface of the substrate as necessary. The setting of the transmission axis of the polarizing element differs depending on the type of liquid crystal. As is well known, white light is displayed when the effective voltage applied to the liquid crystal is lower than the threshold voltage of the liquid crystal. The polarizing element is not limited to a polarizing plate, and may be any polarizing element such as a beam splitter that transmits light having a specific polarization axis. As the liquid crystal, various types such as a type in which liquid crystal molecules are twisted (TN type, STN type, etc.), a type in which homeotropic alignment is performed, a type in which vertical alignment is performed, and a memory type such as ferroelectric can be used. Further, a light-scattering type liquid crystal such as a polymer-dispersed liquid crystal may be used. In such a case, the polarizing element is eliminated and the alignment of the liquid crystal molecules is set to be a normally white type. Further, when a contrast equal to or higher than that of a normally black liquid crystal display panel is required, a light shielding layer (a light shielding frame between openings of adjacent pixels) is provided between dots on one inner surface of a pair of substrates. ) May be provided.

In the case where the liquid crystal display panel 1 is of a reflection type, a reflection member such as disposing a reflection plate outside one substrate or forming a reflection electrode or a reflection layer on the inner surface of one substrate is used. The alignment axis of the liquid crystal molecules and the transmission axis of the polarizing element are set so that the reflective member reflects incident light when the effective voltage applied to the liquid crystal is equal to or lower than the off-voltage lower than the threshold voltage. I just need. In the case of a liquid crystal display panel using STN liquid crystal, a retardation plate is often disposed between the liquid crystal display panel and the polarizing element. In this case, the transmission axis is set in consideration of the retardation plate. In the case of the transflective type, a lighting device for illuminating the liquid crystal display panel is provided, and the liquid crystal display panel 1 is used as a transmissive type when the lighting device is turned on, and as a reflective type when the lighting device is not turned on. There are various possible configurations for the transflective type.However, a semi-transmissive plate is arranged outside one of the substrates, or light having a predetermined polarization axis component is transmitted and light having a polarization axis component substantially orthogonal thereto is transmitted. A method of arranging a reflective polarizer that reflects the light, a method of forming an electrode formed on the inner surface of one of the substrates to have a structure that semi-transmits light (for example, making a hole), and the like can be considered.

Further, when the liquid crystal display panel 1 is colored, a color filter is formed on the inner surface of the substrate in the case of a reflection type or a transflective type, or in the case of a transflective type, the three colors emitted by the lighting device are used. A method of switching in a time series is conceivable.

When the liquid crystal display panel 1 is in the partial display state, an effective voltage equal to or lower than an off voltage set lower than the threshold voltage is applied to the liquid crystal in the non-display area. As described above, since the liquid crystal display panel 1 is a normally white type,
As a result, the non-display area becomes a white display as shown in the figure, and in the display area D, an image of a half tone display or a black display according to the display content is displayed on the background of the white display, so that the partial display without a sense of discomfort Screen.

The structure of the liquid crystal display panel 1 is, in addition to the above structure, an active matrix type liquid crystal display panel in which two-terminal non-linear elements as shown in FIG. 22 are arranged in pixels, or a structure as shown in FIG. Alternatively, an active matrix type liquid crystal display panel in which both scanning electrodes and signal electrodes are formed in a matrix on one substrate and transistors are formed for each pixel may be used.

A method for applying an effective voltage equal to or less than the off voltage to the liquid crystal in the non-display area will be described below.

FIG. 15 shows a configuration example of a liquid crystal display device according to the present invention. Reference numeral 1 denotes a normally white liquid crystal display panel, in which a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed are opposed to each other at an interval of several μm. Liquid crystal like
A display screen is formed by applying an electric field according to display data to liquid crystals of pixels (dots) arranged in a matrix in accordance with the intersection of a scanning electrode and a signal electrode. As an example, dots of 240 rows × 320 columns can be displayed on the entire screen. For example, an area where 40 rows × 160 columns of a hatched portion D at the upper left are partially displayed, and the other areas are in a non-display state. Shall be. A selection voltage is applied to the scan electrodes during the selection period, and an on-voltage or an off-voltage (and, if necessary, an intermediate voltage) applied to a signal electrode intersecting the scan electrode is applied to the liquid crystal at the intersection. , The alignment state of the liquid crystal molecules in that portion changes with the applied on-voltage and off-voltage,
Thereby, a display is made. Note that a non-selection voltage is applied to the scan electrodes during the non-selection period.

Next, a block 2 is a Y driver that selectively applies a selection voltage or a non-selection voltage to a plurality of scanning electrodes, and a block 3 is a signal voltage (an on-voltage or an off-voltage, furthermore, a voltage corresponding to display data Dn). Is an X driver for applying the intermediate voltage to the signal electrode. The drive voltage forming circuit of the block 4 forms a plurality of voltage levels necessary for driving the liquid crystal, and supplies the plurality of voltage levels to the X driver 3 and the Y driver 2. Each driver selects a predetermined voltage level from the supplied voltage levels according to a timing signal and display data, and applies the selected voltage level to signal electrodes and scanning electrodes of the liquid crystal display panel 1. A block 5 is an LCD controller that forms timing signals CLY, FRM, CLX, LP, display data Dn, and a control signal PD necessary for these circuits, and is connected to a system bus of an electronic device including the present liquid crystal display device. ing. A block 6 is a power supply outside the liquid crystal display device and supplying power to the liquid crystal display device.

The circuit blocks of the liquid crystal display panel according to this embodiment are substantially the same as those of the first to eighth embodiments. In particular, when a simple matrix type liquid crystal display panel is used, the first to eighth circuit blocks are used. The partial display can be performed by the same driving method as that of the eighth embodiment.

In the following description of the driving method, the driving method for selecting the scanning electrodes for each row as described with reference to FIGS. 9 and 10 will be used as an example. A plurality of lines may be selected simultaneously by the MLS driving method as described above.

FIG. 16 is an example of a timing chart in a partial display state of the liquid crystal display device of FIG. 15, and is directed to a simple matrix type liquid crystal display panel. Dn is display data transferred from the controller 5 to the X driver 3, and a period during which the display data is transferred is indicated by a shaded block. The display data Dn for one display row (scanning electrode) is transferred at high speed from the controller 5 to the X driver 3 in the shaded block. CLX is a transfer clock for controlling transfer of the display data Dn from the controller 5 to the X driver 3. The X driver 3 has a built-in shift register, operates the shift register in synchronization with the clock CLX, and temporarily takes in the display data Dn for one display row into the shift register and the latch circuit sequentially. X driver 3
Is a driver with a built-in RAM as shown in FIG.
The display data Dn is stored in the RAM 25.

Next, LP is a data latch signal for latching one row of the display data Dn from the shift register or the latch circuit into the next-stage latch circuit of the X driver 3 at a time. The number attached to LP is the row (scanning line) number of the display data Dn taken into the latch circuit of the X driver 3. That is, during the selection period before outputting the signal voltage corresponding to the display data Dn to the X driver 3,
The display data Dn is transferred from the controller 5 in advance. For example, the display data on the 40th line is 40
Since it is latched at the first time, it is transferred according to the clock CLX before that. Based on the display data Dn latched by the latch circuit, the X driver 3 outputs a plurality of voltage levels (on-voltage and off-voltage,
A voltage level selected from the intermediate voltage (if necessary) is output to the signal electrode.

Next, CLY is a scanning signal transfer clock for each scanning line selection period, and FRM is a screen scanning start signal for each frame period. The Y driver 2 has a built-in shift register.
RM is input, and FRM is sequentially transferred according to the clock CLY. The Y driver 2 sequentially outputs a selection voltage (VS or MVS) to the scanning electrodes according to this transfer. The number given to CLY indicates the number of the scan electrode to which the selection voltage is applied. For example, when the 40th CLY is input,
From the Y driver 2, CLY is applied to the scan electrodes on the 40th row.
The selection voltage is applied during a period of one cycle. PD is Y
This is a partial display control signal for controlling the driver 2. While the control signal PD is at the “H” level, the selection voltage (VS or MVS) is sequentially output from the Y driver 2 to the scan electrodes. However, when the control signal PD is at the “L” level, the non-selection voltage ( VC) is output. Such control is performed by PD
Prohibits the output of the selection voltage from the Y driver 2 according to
By providing a gate for setting all outputs to the non-selection voltage in the Y driver 2, the configuration can be easily achieved.

As an example, the scanning electrode in the third row is Y3, the scanning electrode in the 43rd row is Y43, the signal electrode in the 80th column is X80,
The signal applied to the signal electrode in the 240th column is indicated as X240 in the figure. Y43 and X240 are a scanning electrode and a signal electrode in the non-display area, respectively. Note that the pixels in the 80th column of the display area are all turned on for 40 rows.
Here, VS and MVS are positive-side and negative-side selection voltages, respectively, and VX and MVX are positive-side and negative-side signal voltages, respectively.
VS and MVS are symmetric to each other with VC as the central potential, and so are VX and MVX. MVX is applied to the signal electrodes of the ON pixels in the row to which the selection voltage VS is applied, and VX is applied to the signal electrodes of the OFF pixels. Also,
VX is applied to the signal electrode of the ON pixel in the row to which the selection voltage MVS is applied, and MVX is applied to the signal electrode of the OFF pixel.
Is applied.

PD is at "H" level during a period when 40 rows of display area D are selected, and at "L" level during other periods.
Level. While the PD is at the “H” level, the Y driver 2 drives the scan electrodes by generating a voltage VS (MVS) for sequentially selecting the first row to the 40th row one by one. The output of the VS and the MVS is switched to the scanning electrode for each unit of the plurality of scanning electrodes, and the scanning electrode is driven by line inversion. The non-selection voltage VC is applied to the scanning electrodes other than the selected one row. While the PD is at the “L” level, all outputs of the Y driver 2 are at the non-selection voltage level. No selection voltage is applied 4
Since the effective voltage applied to the liquid crystal in the first to 240th rows is considerably smaller than the effective voltage applied to the liquid crystal in the off pixels in the display area, the 41st to 240th rows are completely in a non-display state. During the non-display area selection period, a non-selection voltage level is applied to the scan electrodes, but to the signal electrodes, based on a predetermined voltage level according to the PD from the X driver 3 or display data stored in the X driver 3. The applied voltage level continues to be applied. However, it is preferable that the signal voltage in the non-display row access period of the non-display area is applied while periodically inverting with reference to VC. For example, it is preferable to invert the polarity of the signal voltage every frame period, or to invert the polarity periodically in units of a shorter period longer than the selection period.

In the present embodiment, Dn,
As shown in CLX and LP, the data transfer corresponding to the non-display row access period is performed for the display data transfer to the X driver 3 for the display in the first to 40th rows, and the 41st to 240th rows. Since the data transfer for the amount displayed on the eyes is unnecessary, it is stopped. Here, in the case of the matrix type liquid crystal display panel, it is necessary to transfer the display data of the next selected row while the X driver 3 outputs the signal voltage corresponding to the display of the selected row. Therefore, the data transfer period precedes the PD by one scanning line selection period.

The data transfer for 320 dots in the first line includes the display data transfer for the first half 160 dots and the transfer of the OFF display data for the second half 160 dots. The data transfer in the second to 40th lines is stopped because only the display data for the first half 160 dots is transferred, and the transfer of the OFF display data for the second half 160 dots is unnecessary. Since the X driver 3 has a built-in latch circuit (storage circuit) for storing one row of display data, the right half of the X driver 3 is transferred first even if there is no data transfer for 160 dots in the latter half. The right half of the X driver 3 continues to output a signal voltage for turning off the display. This is the top 4
An effective voltage for turning off the display is applied to the liquid crystal of the right half screen in the 0th row.

In the present embodiment, for the sake of simplicity, line-sequential driving in which the scanning electrodes are sequentially selected row by row is adopted, and the polarity of the liquid crystal driving voltage is determined by using the central potential VC as a non-selection voltage. The driving method in which the inversion cycle is set to one frame period has been described. However, as described in the previous embodiments, a plurality of scanning electrodes such as two or four are simultaneously selected as a unit and sequentially selected for each unit, and the same scanning electrode is selected a plurality of times during one frame period. That is, a so-called MLS driving method may be used.

As described above, in order to apply an effective voltage equal to or less than the off-state voltage to the liquid crystal in the non-display area in the simple matrix type liquid crystal display device, the non-display area corresponds to a part of the scanning electrodes. A non-selection voltage only needs to be constantly applied to the scanning electrodes in the area to be set to the non-display state. When the non-display area corresponds to some signal electrodes, the signal electrodes in the area to be set to the non-display state are turned off. What is necessary is just to always apply the voltage used as a display.

(Tenth Embodiment) As described above, in the ninth embodiment, the structure of the liquid crystal display panel 1 is not limited to the simple matrix structure described above, but may be an active matrix type liquid crystal display device. Can be used. In the present embodiment, the same driving as in the ninth embodiment is performed on the liquid crystal display panel 1 as an active matrix type liquid crystal panel.

As the active matrix type liquid crystal display panel, an active matrix type liquid crystal display panel in which a switching element composed of a two-terminal type non-linear element such as a thin film diode called an MIM is arranged in each pixel as described in FIG. Can be used. In this case, one of the scanning electrode 112 or the signal electrode 113 is provided on the element substrate,
An element 115 connected to the element 115 and a pixel electrode connected to the element 115 are formed, and the other electrode is formed on the other opposite substrate, so that a two-terminal type is provided between the scanning electrode 112 and the signal electrode 113. Nonlinear element 115 and liquid crystal layer 1
14 are electrically connected in series.
As a driving method, a selection voltage as shown by Y3 in FIG. 16 is applied to the scanning electrode 112 to make the element 115 conductive, and the signal voltage output to the signal electrode 113 is applied to the liquid crystal layer 11.
Write to 4. When a non-selection voltage is applied to the scan electrode 112, the resistance value of the element 115 increases and the element becomes non-conductive,
The voltage applied to the liquid crystal layer 114 is held.

In addition, as shown in the equivalent circuit diagram of FIG.
An active matrix type liquid crystal display panel having transistors in pixels may be used as the liquid crystal display panel 1.
In this panel, both of a plurality of scanning electrodes 112 and a plurality of signal electrodes 113 are formed in a matrix on one substrate (element substrate) of a pair of substrates constituting the panel.
A switching element including a transistor 117 is formed for each pixel near the intersection of the scanning electrode 112 and the signal electrode 113, and a pixel electrode connected to the switching element is formed for each pixel. A common electrode connected to the common potential 118 is arranged as necessary (the common electrode may be formed on the element substrate) on the other substrate arranged opposite to this substrate at a predetermined interval. You. In a liquid crystal layer sandwiched between a pair of substrates, a portion sandwiched between a pixel electrode and a common electrode is driven as a liquid crystal layer 114 of each pixel for each pixel.
As is well known, a transistor 11 arranged for each pixel
7, the gate is connected to the scanning electrode 112, and the source is connected to the signal electrode 11.
Third, the drain is connected to the pixel electrode. The transistor is turned on in accordance with the selection voltage applied in the selection period, and a data signal is supplied to the pixel electrode through the turned on transistor 117. When a non-selection voltage is applied to the scan electrode 112, the transistor 117 is turned off. A storage capacitor connected to the pixel electrode is connected to the element substrate as needed, and stores and holds the applied voltage. Note that the transistor 117 is a thin film transistor when the element substrate is an insulating substrate such as a glass substrate, and a MOS transistor when the element substrate is a semiconductor substrate.

In such an active matrix type liquid crystal display device, a method of applying an effective voltage equal to or less than the off voltage to the liquid crystal of a pixel located in a non-display area defined in the display screen is as follows.

As shown in FIG. 17, in the transition period in which the full-screen display state is switched to the partial display state, at least one frame period (1F) applies at least a voltage lower than the off voltage to the liquid crystal of the pixels in the non-display area. To write. That is, a voltage lower than the off-state voltage is written to the pixel 116 that is to be in the non-display state in the first frame (period T in the drawing) after the transition to the partial display state. In this case, as shown in the figure, the partial control signal PD is set to the “H” level also during the non-display row access period of the non-display area in the first frame, and a selection voltage is applied to the scan electrode 112 in the non-display area to apply When the switching elements 115 and 117 of the pixel are turned on and a voltage lower than the liquid crystal off voltage is applied from the X driver 3 to all the signal electrodes 113, a voltage lower than the off voltage is written to the liquid crystal layer 114 of the pixel in the non-display area. Can be.

When the liquid crystal is a memory liquid crystal, the control signal PD is switched to the “H” level only during the non-display row access period during the period T instead of scanning all the scanning electrodes, and A selection voltage is applied only to the scan electrodes of the non-display area, and only the scan electrodes 112 corresponding to the non-display area are sequentially selected to turn on the switching elements of the pixels. The voltage may be written. In this case, during the period T, a non-selection voltage is applied to the scan electrode 112 corresponding to the display region D, and the voltage of the liquid crystal layer of the pixel is not rewritten.

In the second and subsequent frames, a non-selection voltage is constantly applied to the scanning electrodes 112 in the non-display area, and the switching elements 115 and 117 of the pixels in the non-display area are always kept in a non-conductive state and applied to the pixel electrodes. The applied voltage may be maintained at a voltage equal to or lower than the off-state voltage written to the pixel 116 in the first frame (period T) which is a transition period for transition to the partial display state. In an active matrix display panel, such a procedure is necessary because each pixel 116 continues to hold the voltage applied during the selection period by the storage capacitor.

As shown in FIG. 15, in a partial display state, a non-display area (a non-display area on the right side of the display area D in FIG. 15) is provided in the same row as the display area D, or in the vertical direction of the screen. When a non-display area is provided only in the (vertical direction), even if a selection voltage is applied to the scanning electrode, a voltage equal to or lower than the off-voltage for turning off the signal electrode 113 in the area to be set to the non-display state is always applied. What is necessary is just to apply. that way,
Even when the switching elements 115 and 117 are turned on by the selection voltage applied to the scanning electrode 112, a voltage equal to or lower than the off voltage is continuously applied to the pixel electrode, and the pixel electrode becomes a non-display area.

The above-described method of applying an effective voltage equal to or less than the off-voltage to the liquid crystal of the pixel located in the non-display area can be realized by simple circuit means. Also, the partial display area D
When formed in the vertical direction (vertical direction) of the screen, in the partial display state, many parts of the controller 5, the drive voltage forming circuit 4, the X driver 3, and the Y driver 2 are stopped during the non-display row access period. In the case of the normally white type, in the case of off display, a low voltage is applied to the pixels in the non-display area, so that the power consumption of the drive circuit can be significantly reduced.

In the case of a normally white liquid crystal, liquid crystal molecules are horizontally aligned in a non-display region in a liquid crystal of a horizontal alignment type or the like. Since the liquid crystal molecules have a low dielectric constant in the horizontal alignment state, the charge / discharge current of the liquid crystal in the non-display area is also small, which can significantly reduce the power consumption of the entire display device as compared to the full screen display state. it can.

As described above, according to the ninth and tenth embodiments, it is possible to have a partial display state in which only a part of the entire screen is in a display state and other areas are in a non-display state. In a reflective or transflective liquid crystal display device, it is possible to realize a display without a sense of incongruity in the case of a partial display state, and to significantly reduce power consumption.

The first to tenth embodiments are applied not only to liquid crystal display devices but also to other electro-optical devices in which scanning electrodes and signal electrodes are arranged in a matrix to form pixels. be able to. For example, plasma display panel (PDP), electroluminescence (EL), field emission device (FED)
And so on.

(Embodiment of Electronic Apparatus) FIG. 24 is a view showing the appearance of an electronic apparatus according to the present invention. A portable information device 221 has a built-in mobile phone function and uses a battery as a power supply. Reference numeral 221 denotes a display device using the matrix-type electro-optical device or the liquid crystal display device according to any of the embodiments described above. The display device 221 is in a full-screen display state as shown in FIG. In such a standby state, only the display area of 221D which is a part of the display device 221 is partially displayed. Reference numeral 230 denotes a pen serving as an input unit. Since a touch panel is arranged on the front of the display device 221, a switch input can be performed by pressing the display portion with the pen 230 while viewing the screen of the display device 221.

FIG. 25 is an example of a partial circuit block diagram of an electronic apparatus according to the present invention. 222 is a μPU (microprocessor unit) for controlling the entire electronic device, 223
Is a memory for storing various programs, information, display data, and the like, and 224 is a crystal oscillator serving as a time standard source.
The μPU 222 is changed by the crystal unit 224 to the electronic device 22.
An operation clock signal within 0 is generated and supplied to each circuit block. These circuit blocks are connected to each other via a system bus 225, and are also connected to other blocks such as an input / output device. Power is supplied to these circuit blocks from a battery power supply 6. The display device 221 includes, for example, the liquid crystal display panel 1, the Y driver 2, the X driver 3, the drive voltage generation circuit 4, and the controller 5 as shown in FIG. Μ of controller 5 function
The PU 222 may also be used.

Here, by using the electro-optical device or the liquid crystal display device according to the above-described embodiment as the display device 221, the power consumption of the entire electronic device during standby is reduced, and the screen in the partial display state is interesting or original. It can have sex.

Furthermore, when the display device is a reflection type display device, or when the display device has a light source for backlight illumination, but does not use the light source, the display device is a reflection type display. It is preferable to use a transflective display device which is a transmissive display since power consumption can be further reduced and battery life can be extended. Furthermore, in the electronic device of the present invention, when the device is not operated and in a standby state after a lapse of a predetermined time, the display device is in a partial display state, and power consumption due to driving of the display device by a driver or a controller is suppressed. The battery life can be further extended.

(Industrial Applicability) According to the present invention, in an electronic apparatus having a long standby time, such as a mobile phone, the display device in standby mode is set to a partial display state in which only necessary parts are displayed. Accordingly, the power consumption of the electronic device can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a drive voltage forming circuit used in the embodiment of the present invention.

FIG. 3 is a timing chart in the embodiment of the present invention.

4A and 4B are diagrams for explaining a liquid crystal driving voltage waveform in the embodiment of the present invention, wherein A is a diagram showing a selection voltage VS field (Com pattern), b is a diagram showing a display pattern, and C is a signal electrode. It is a figure showing a drive voltage VS display pattern. In FIG. 3A, Y4n + 1 to Y4n + 4 mean the selected first to fourth rows (n = 0, 1, 1).
2, ..., 49). 1 means VH and -1 means VL. A
Are obtained when the liquid crystal AC drive signal M is “L”, and M
Is “H”, ± is reversed. In B in the figure, d
1 to d4 indicate the on / off states of the pixels on the selected first to fourth rows. An ON pixel is represented by -1, and an OFF pixel is represented by 1. In the figure C, 0 in the calculation result is VC, ±
2 means ± V1, and ± 4 means ± V2. The matrix of C is when the liquid crystal AC drive signal M is “L”, and when M is “H”, ± is reversed.

FIG. 5 is a partial view of a control circuit according to the embodiment of the present invention.

6 is a timing chart showing the operation of the circuit of FIG.

FIG. 7 is a timing chart according to another embodiment of the present invention.

FIG. 8 is a block diagram of a liquid crystal drive voltage forming circuit used in another embodiment of the present invention.

FIG. 9 is a timing chart according to another embodiment of the present invention.

FIG. 10 is a timing chart in another embodiment of the present invention.

FIG. 11 is a partial block diagram of a signal electrode drive circuit according to the embodiment of the present invention.

FIG. 12 is a block diagram of a scan electrode drive circuit according to an embodiment of the present invention.

FIG. 13 is a circuit diagram of a contrast adjustment circuit according to the embodiment of the present invention.

FIG. 14 is a diagram illustrating a partial display state in the liquid crystal display device of the present invention.

FIG. 15 is a diagram showing a configuration example of a liquid crystal display device of the present invention.

FIG. 16 is a timing chart showing the operation of the liquid crystal display device of FIG.

FIG. 17 is a view for explaining a transition from a full-screen display state to a partial display state in the liquid crystal display device of FIG. 15;

FIG. 18 is a diagram illustrating a partial display state in a conventional liquid crystal display device.

FIG. 19 is a block diagram of a conventional liquid crystal display device having a partial display function.

20 is a drive voltage waveform diagram of the liquid crystal display device of FIG.

FIG. 21 is a detailed circuit diagram of a drive voltage generation circuit in FIG. 19;

FIG. 22 is an equivalent circuit diagram of a pixel of an active matrix liquid crystal display panel having a two-terminal nonlinear element in the pixel.

FIG. 23 is an equivalent circuit diagram of a pixel in an active matrix liquid crystal display panel including a transistor in the pixel.

FIG. 24 is a schematic view of an electronic apparatus using the electro-optical device or the liquid crystal display device of the invention as a display device.

FIG. 25 is a circuit block diagram of an electronic device of the invention.

[Explanation of symbols]

 1, 51: Liquid crystal display panel 2, 52: Scan electrode drive circuit (Y driver) 3, 53: Signal electrode drive circuit (X driver) 4, 54: Liquid crystal drive voltage forming circuit 5, 55: LCD controller 6, 56 Power supply 7, 17 Step-up / step-down clock forming circuit 8 Negative 6-fold step-up circuit 9, 20 Double-step-up circuit 10 Negative direction double-step-up circuit 11, 12, 19 ... 1/2 step-down circuit 13 , 21 ... contrast adjustment circuit 14 ... register 15 ... partial display control signal forming unit 16 ... AND gate 18 ... negative direction 8 times booster circuit 22 ... precharge signal generation circuit 23 ... row address generation circuit 24, 31 ... Com pattern generation circuit 25 display data RAM 26 read display data control circuit 27 MLS decoder for X driver 28, 34 Bell shifters 29, 35 Voltage selector 30 Initial setting signal generation circuit 32 Shift register 33 MLS decoder for Y driver 57 Scan control circuit 107 Normally black liquid crystal display panel FRM Frame start signal (screen scan start signal) CA: Field start signal CLY: Scan signal transfer clock CLX: Data transfer clock Data, Dn: Display data LP, LPI: Data latch signal PD, CNT, PDH: Partial display control signal Don: Display control signal Vcc: Input Power supply voltage GND… Ground potential VEE… Negative high voltage VH… Positive selection voltage VL… Negative selection voltage VC… Non-selection voltage (center potential) ± V1, ± V2, ± VX (, VC)… Signal voltage V0 V5: liquid crystal drive voltage f1 to f4: feel Classification symbol M: liquid crystal AC drive signal Xn: signal electrode Y1 to Y200, Y4n + 1 to Y4n + 4: scan electrode RV, RV1: variable resistor Qb, Q1: bipolar transistor Qn: n-channel MOS transistor R1, R2, R3a, R3b, R4 , R5 ... resistance S2a, S2b ... switches OP1 to OP4 ... operational amplifier D ... partial display area VS ... positive selection voltage MVS ... negative selection voltage VX ... positive signal voltage MVX ... negative signal voltage

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/36 G09G 3/36 F term (Reference) 2H093 NA07 NA16 NA18 NA32 NA33 NA43 NC04 NC05 NC21 NC22 NC29 NC34 NC38 NC49 NC59 ND39 NF04 NF05 NF13 NH12 NH14 5C006 AA11 AC11 AC24 AF34 AF42 BB16 BB17 BC03 BF03 FA41 FA47 5C080 AA10 BB05 DD01 DD26 EE25 EE26 EE29 FF11 GG02 JJ01 JJ02 JJ04

Claims (33)

[Claims] 1. A method of driving an electro-optical device having a plurality of scanning electrodes and a plurality of signal electrodes arranged in an intersecting manner and having a function of partially using a display screen as a display area, wherein: In this method, a selection voltage is applied during the selection period and a non-selection voltage is applied during the non-selection period, and the voltages applied to all the scanning electrodes are fixed during a period other than the selection period of the scanning electrodes in the display area. And a method for driving the electro-optical device, wherein the display screen is set to a partial display state by fixing voltages applied to all signal electrodes for at least a predetermined period. 2. The driving method of an electro-optical device according to claim 1, wherein a voltage of the scanning electrode during a period in which a voltage applied to all the scanning electrodes is fixed is set to the non-selection voltage. 3. The method according to claim 2, wherein the non-selection voltage is 1
A method for driving an electro-optical device, the method comprising: 4. The circuit according to claim 1, wherein the driving voltage forming circuit applied to the scanning electrodes and the signal electrodes includes a driving voltage generating circuit for each of the scanning electrodes and the signal electrodes. A method for driving an electro-optical device, wherein operation is stopped during a fixed period. 5. The charge pump circuit according to claim 4, wherein the drive voltage forming circuit has a charge pump circuit that switches connection of a plurality of capacitors according to a clock to generate a boosted voltage or a stepped-down voltage. The method according to claim 1, wherein the operation is stopped during a period in which the applied voltages to all the scanning electrodes and all the signal electrodes are fixed. 6. The display mode according to claim 1, wherein a first display mode is used to display the entire display screen, a partial area of the display screen is displayed, and other areas are displayed. A second display mode in which a non-display state is set, and a time for applying a selection voltage to each scanning electrode in the display area is not changed between the first display mode and the second display mode. A method for driving an electro-optical device, comprising: 7. The display device according to claim 6, wherein an effective voltage applied to a liquid crystal of a pixel in the display region in a display state is the same in the first display mode and the second display mode. And setting a potential to be applied to the signal electrode during a period other than a selection period of the scanning electrode in the display area. 8. The signal according to claim 7, wherein the potential applied to the signal electrode during a period other than the selection period of the scanning electrode in the display area is the signal in the case of the ON display or the OFF display in the first display mode. A method for driving an electro-optical device, wherein the same voltage is set as an applied voltage to an electrode. 9. The display device according to claim 8, wherein the plurality of scan electrodes are driven so as to simultaneously select every predetermined number of units and sequentially select every predetermined number of units. The voltage applied to the signal electrode in the case of off display is the same as the voltage applied to the signal electrode in the case of full screen on display or full screen off display in the first display mode. Driving method of optical device. 10. The potential according to claim 1, wherein the potential applied to the signal electrode during a period other than the selection period of the scanning electrode in the display area is set to a predetermined value for each predetermined period of one-screen scanning. A driving method for an electro-optical device, characterized in that an applied potential for ON display and an applied potential for OFF display are alternately switched and set in a screen display state. 11. The voltage difference between the scan electrode and the signal electrode during a period other than the scan electrode selection period in the display area in the second display mode according to claim 6, Wherein the polarity is inverted for each frame. 12. A driving method for an electro-optical device having a plurality of scanning electrodes and a plurality of signal electrodes arranged to intersect and having a function of partially setting a display screen as a display area. Applying a selection voltage during the selection period and applying a non-selection voltage during the non-selection period, and applying the non-selection voltage to the scanning electrodes in other areas of the display screen without applying the selection voltage. Applying and fixing the applied voltage for all the signal electrodes for at least a period longer than the same polarity driving period in the polarity inversion driving in the full screen display state, thereby setting the display screen to the partial display state. A method for driving an electro-optical device, comprising: 13. The display device according to claim 12, wherein the voltage applied to the signal electrode is turned on in the full-screen display state at least every period longer than the same polarity driving period in the polarity inversion drive in the full-screen display state. A method for driving an electro-optical device, wherein the potential is alternately switched between a potential when the display is turned on and a potential when the display is turned off. 14. An electro-optical device driving method according to claim 1, wherein the electro-optical device is a simple matrix liquid crystal display device. 15. The method of driving an electro-optical device according to claim 1, wherein the electro-optical device is an active matrix type liquid crystal display device. 16. An electro-optical device driven by the electro-optical device driving method according to claim 1. Description: 17. An electro-optical device having a configuration in which a plurality of scanning electrodes and a plurality of signal electrodes are arranged to intersect and have a function of partially using a display screen as a display area. Apply a selection voltage to
A scan electrode drive circuit that applies a non-selection voltage during a non-selection period; a signal electrode drive circuit that applies a signal voltage according to display data to the plurality of signal electrodes; and a position of a partial display area in a display screen. Setting means for setting information, and control means for outputting a partial display control signal for controlling the scan electrode driving circuit and the signal electrode driving circuit based on the position information set in the setting means, The drive circuit for scan electrodes and the drive circuit for signal electrodes drive the scan electrodes and the signal electrodes in a display area in a display screen according to the partial display control signal so as to perform display according to display data. The electro-optical device is characterized in that a non-selection voltage is continuously applied to the scanning electrodes in a non-display area in a display screen to make a non-display state. 18. The electro-optical device according to claim 17,
An electro-optical device, which is a simple matrix liquid crystal display device. 19. The electro-optical device according to claim 17,
An electro-optical device, which is an active matrix liquid crystal display device. 20. A driving circuit for an electro-optical device having a plurality of scanning electrodes and a plurality of signal electrodes arranged to intersect and having a function of partially setting a display screen as a display region, wherein: First driving means for applying a voltage,
A second driver for applying a voltage selected according to the display data read from the display data to the plurality of signal electrodes, comprising: a display data storage circuit; The means includes: a scanning electrode in the display area;
A function of applying a selection voltage during a selection period, applying a non-selection voltage during a non-selection period, and applying only the non-selection voltage to scan electrodes in other areas of the display screen; Has a function of reading display data from the storage circuit during a period corresponding to the selection period of the scan electrode in the display region, and fixing a display data read address of the storage circuit during other periods. A driving circuit for an electro-optical device, comprising: 21. The electro-optical device according to claim 20, wherein a shift operation of a shift register in the first driving means is stopped during a period other than a selection period of a scanning electrode in the display area. The drive circuit of the device. 22. A driving circuit of an electro-optical device having a plurality of scanning electrodes and a plurality of signal electrodes arranged in a crossed manner and having a function of partially using a display screen as a display area. A scanning electrode driving circuit for sequentially applying a selection voltage to the plurality of scanning electrodes, wherein the scanning electrode driving circuit includes a driving circuit for the shift register when a display screen is partially used as a display area. In response to a shift operation, a selection voltage is applied to a scan electrode in a display area of the display screen during a selection period, and a shift operation of the shift register is stopped halfway in a scan electrode in another area of the display screen, Applying only the non-selection voltage, the scan electrode drive circuit, when transitioning from a state where a display screen is partially a display area to a full screen display state, the shift register is brought into an initial state. A driving circuit for an electro-optical device, comprising: 23. An electro-optical device comprising the driving circuit for an electro-optical device according to claim 20, and a scanning electrode and a signal electrode driven by the driving circuit. 24. An electro-optical device having a plurality of scan electrodes and a plurality of signal electrodes arranged in a crossed manner and having a function of partially setting a display screen as a display area, wherein a voltage is applied to the plurality of scan electrodes. First driving means;
A second drive unit comprising a display data storage circuit and applying a voltage selected according to the display data read from the display data to the plurality of signal electrodes, the first drive unit Apply a selection voltage during a selection period and a non-selection voltage during a non-selection period to scan electrodes in a display area of the display screen, and apply the non-selection voltage to the scan electrodes in other areas of the display screen. The second drive unit has a function of applying only a non-selection voltage,
It has a function of applying a voltage based on the display data read from the storage circuit during a selection period of the scanning electrode in the display area, and applying a voltage based on the same display data during other periods. Electro-optical device. 25. The apparatus according to claim 24, wherein during a period other than the selection period of the scanning electrodes in the display area, the second driving means performs the same operation as the same polarity driving period in the polarity inversion driving in the full screen display state. An electro-optical device, characterized in that the voltage applied to the signal electrode is alternately switched between a potential for ON display and a potential for OFF display in a full-screen display state at least every long period. 26. The driving voltage forming circuit according to claim 23, further comprising a driving voltage forming circuit that forms a voltage applied to the scanning electrode or the signal electrode and supplies the voltage to the driving unit. The circuit includes a contrast adjustment circuit that adjusts the voltage of the applied voltage, and the operation of the contrast adjustment circuit is stopped during a period other than the selection period of the scan electrode in the display area. apparatus. 27. A method for driving a reflective or transflective liquid crystal display device capable of partially displaying a part of the entire screen of a liquid crystal display panel in a display state and leaving other areas in a non-display state. 5. The method of driving a liquid crystal display device according to claim 1, wherein the liquid crystal display panel is a normally white type, and an effective voltage equal to or less than an off voltage is applied to the liquid crystal in the non-display area in the partial display state. 28. The liquid crystal display according to claim 27, wherein the liquid crystal display panel is a simple matrix type liquid crystal panel, and applies only a non-selection voltage to the scanning electrodes in the non-display area in the partial display state. A method for driving a display device. 29. The liquid crystal display panel according to claim 27, wherein the liquid crystal display panel is a simple matrix type liquid crystal panel, and applies only a voltage for turning off the signal electrode in the non-display area in the partial display state. Characteristic driving method of a liquid crystal display device. 30. The liquid crystal display panel according to claim 27, wherein the liquid crystal display panel is an active matrix type liquid crystal panel.
Applying a voltage equal to or less than an off-voltage to the liquid crystal of the pixels in the non-display area in at least the first frame in which the transition to the partial display state is performed, and applying only a non-selection voltage to the scan electrodes in the non-display area from the subsequent frame A method for driving a liquid crystal display device, comprising: 31. The liquid crystal display panel according to claim 27, wherein the liquid crystal display panel is an active matrix liquid crystal panel, and an off voltage is applied to the liquid crystal of the pixels in the non-display area in at least the first frame when the display mode shifts to the partial display state. A method for driving a liquid crystal display device, comprising applying the following voltage, and applying only a voltage equal to or less than an off-voltage to the signal electrode during an access period of the non-display area from a subsequent frame. 32. A liquid crystal display device which is displayed by the method for driving a liquid crystal display device according to claim 27. 33. An electronic apparatus using the electro-optical device or the liquid crystal display device according to any one of claims 16 to 19, 23 to 26, and 32 as a display device. .