JP2000101232A - Printed wiring board and its manufacture - Google Patents

Printed wiring board and its manufacture

Info

Publication number
JP2000101232A
JP2000101232A JP26318198A JP26318198A JP2000101232A JP 2000101232 A JP2000101232 A JP 2000101232A JP 26318198 A JP26318198 A JP 26318198A JP 26318198 A JP26318198 A JP 26318198A JP 2000101232 A JP2000101232 A JP 2000101232A
Authority
JP
Japan
Prior art keywords
printed wiring
circuit
wiring board
conductor layer
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26318198A
Other languages
Japanese (ja)
Inventor
Michiaki Miura
道晃 三浦
Riichi Ariga
利一 有我
Masaki Uemae
昌己 上前
Yasuharu Habasaki
康晴 幅崎
Shunichi Yakita
俊一 焼田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCI DENSHI KK
Nippon Carbide Industries Co Inc
Original Assignee
NCI DENSHI KK
Nippon Carbide Industries Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCI DENSHI KK, Nippon Carbide Industries Co Inc filed Critical NCI DENSHI KK
Priority to JP26318198A priority Critical patent/JP2000101232A/en
Publication of JP2000101232A publication Critical patent/JP2000101232A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To manufacture a printed wiring board with high wiring density in which electric resistance is low, connection reliability is high, and a conductor layer generates no unevenness by arranging and laminating a prepreg between the surface side of a conductor circuit of a laminated circuit board and a core base and etching the conductor layer to form a circuit pattern. SOLUTION: This printed wiring board is manufactured by laminating a laminated circuit board 20 composed of resin layer and conductor layer in which a via hole 4 and a condcutor circuit 5 are formed, on a core base 7 in which a through hole, via hole and circuit pattern are formed on a substrate as a base, while the surface on which the conductor circuit 5 is formed is kept facing the core base 7 and prepregs 6 and 6' are in between and by forming a circuit pattern on the surfacial conductor layer. Thus, the reliability of the via hole 4 is high, and the conductor layer and circuit pattern formed on the via hole 4 generates no unevenness. Further, the conductor layer and circuit pattern can be used as a pad for mounting electronic parts, and its wiring density is high and the reliability for printed wiring board is high.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、プリント配線板及びそ
の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for manufacturing the same.

【0002】[0002]

【従来の技術】近年、電子機器の小型化に伴い各種の電
子部品が小型化されている。これら電子部品を搭載する
プリント配線板においてもいっそうの小型化、信頼性が
求められている。また、プリント配線板の小型化のみで
なく、配線回路の微細化がより求められている。即ち、
プリント配線板に搭載される電子部品が小型化、微細化
されるに伴い配線回路が微細化され、搭載して半田固着
するランドにスルホール、ビアホール、等が存在するこ
とが半田付けの半田量のコントロールなどに障害となっ
てきた。これらの解決のために図5に示すように多層プ
リント配線板の最外層を形成するに、穴を形成し、該穴
に導電性の充填材33を充填し、(又はメッキでビアホ
ールを形成し、充填材33で穴を充填し、)導体層32
を形成してビアホールの上に部品搭載用のランドを含む
回路パターンを形成することが提案されたり、また、ラ
ンドから離れた場所にビアホール、スルホールを形成し
てこれらのホールをソルダレジストで覆っていた。
2. Description of the Related Art In recent years, various electronic components have been miniaturized with the miniaturization of electronic devices. Further miniaturization and reliability are required for printed wiring boards on which these electronic components are mounted. Further, not only miniaturization of a printed wiring board but also miniaturization of a wiring circuit are required. That is,
With the miniaturization and miniaturization of electronic components mounted on printed wiring boards, wiring circuits have been miniaturized, and the presence of through holes, via holes, etc. in lands to be mounted and fixed by soldering has reduced the amount of solder used for soldering. It has been an obstacle for control and so on. To solve these problems, as shown in FIG. 5, in order to form the outermost layer of the multilayer printed wiring board, a hole is formed, the hole is filled with a conductive filler 33, and a via hole is formed by plating. , Filling the holes with filler material 33)
It is proposed to form a circuit pattern including lands for component mounting on the via holes, or to form via holes and through holes at locations away from the lands and cover these holes with solder resist. Was.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
ような方法では、充填材の電気抵抗が大きくなる問題、
粒子状物による電気接続のためにノイズの問題、充填し
た表面をフラットにすることが困難であり導体層に凹凸
が発生する問題、離れた場所にホールを設けるために配
線密度が低くなる問題、などが存在している。そこで電
気抵抗が小さく、電気接続の信頼性が高く、導体層に凹
凸が生じない、配線密度が高い、などの問題を解決した
プリント配線板及びその製造方法を提供しようとするも
のである。
However, the conventional method has the problem that the electric resistance of the filler increases.
The problem of noise due to electrical connection by particulate matter, the problem that it is difficult to make the filled surface flat and unevenness occurs in the conductor layer, the problem that the wiring density is low because holes are provided in distant places, And so on. Accordingly, an object of the present invention is to provide a printed wiring board and a method of manufacturing the printed wiring board which have solved the problems such as low electric resistance, high reliability of electric connection, no irregularities in the conductor layer, and high wiring density.

【0004】[0004]

【課題を解決するための手段】本発明は、コア基材、プ
リプレグ及び積層回路板を積層して成るプリント配線板
及びその製造方法において、導体回路及びビアホールが
同一面に形成された樹脂層及び導体層より成る積層回路
板の該導体回路の面側並びにコア基材の間にプリプレグ
を配置して積層し、サブトラクティブ方法にて該導体層
をエッチングして回路パターンを形成することであり、
通常の技術方法を用いた信頼性の高いビアホール、導体
回路を形成した積層回路板を使用して積層し、最外層の
ビアホールの上に部品搭載用パッド、回路パターンを形
成したプリント配線板であり該ビアホールの上の部品搭
載用パッドを半田付け用のパッドとして使用できること
や、そのパッドを小さくできるため電気接続の信頼性が
高く、導体層に凹凸が生じない、配線密度が高い、など
問題を解決したプリント配線板及びその製造方法を提供
するものである。
SUMMARY OF THE INVENTION The present invention relates to a printed wiring board comprising a core substrate, a prepreg, and a laminated circuit board, and a method for manufacturing the same, comprising: a resin layer having conductive circuits and via holes formed on the same surface; A prepreg is arranged and laminated between the surface side of the conductor circuit of the laminated circuit board composed of the conductor layer and the core substrate, and a circuit pattern is formed by etching the conductor layer by a subtractive method.
It is a printed wiring board that is laminated using a laminated circuit board with highly reliable via holes and conductor circuits formed using ordinary technical methods, and component mounting pads and circuit patterns are formed on the outermost via holes. There is a problem that the component mounting pad on the via hole can be used as a soldering pad, and that the pad can be made small, so that the reliability of electric connection is high, the conductive layer does not have unevenness, and the wiring density is high. An object of the present invention is to provide a printed wiring board and a method of manufacturing the same.

【0005】以下、本発明に係るプリント配線板及びそ
の製造方法について詳述する。
Hereinafter, a printed wiring board according to the present invention and a method for manufacturing the same will be described in detail.

【0006】本発明に係るプリント配線板及びその製造
方法は、ベースとなる基板にスルホール、ビアホール、
回路パターンを形成したコア基材7に、樹脂層1、11
及び導体層2、12、12’より成りビアホール4、1
4、導体回路5、15が形成された積層回路板20、2
1を該導体回路が形成された面をコア基材側にしてプリ
プレグ6、6’を挟んで積層して表面の導体層に回路パ
ターンを形成して製作されるものである。
According to the printed wiring board and the method of manufacturing the same according to the present invention, a through hole, a via hole,
The resin layers 1 and 11 are provided on the core substrate 7 on which the circuit pattern is formed.
And via holes 4, 1 made of conductive layers 2, 12, 12 '.
4. Laminated circuit board 20, 2 on which conductor circuits 5, 15 are formed
1 is manufactured by laminating the prepregs 6 and 6 ′ with the surface on which the conductor circuit is formed on the core substrate side and forming a circuit pattern on the conductor layer on the surface.

【0007】ベースとなる基板としては、導体層、樹脂
層から成る基板であり、導体層として銅、アルミニウ
ム、ステンレス、ニッケル、クロム、等が例示でき、樹
脂層としてエポキシ、ポリイミド、ポリエステル、フェ
ノール、ビスマレイミド・トリアジン、等の樹脂をガラ
ス繊維布に含浸したもの/ガラス繊維を含まないものな
どが例示できる。層数を限定するものでなく片面、両
面、より多層なものでよく好ましくは片面銅張基板、両
面銅張基板、より多層の銅張基板、等が例示できる。
The base substrate is a substrate composed of a conductor layer and a resin layer. Examples of the conductor layer include copper, aluminum, stainless steel, nickel, chromium, and the like. The resin layer includes epoxy, polyimide, polyester, phenol, and phenol. Glass fiber cloth impregnated with a resin such as bismaleimide / triazine, etc./glass fiber-free resin may be exemplified. The number of layers is not limited, and may be a single-sided, double-sided, or multi-layered one, preferably a single-sided copper-clad substrate, a double-sided copper-clad substrate, or a multilayered copper-clad substrate.

【0008】コア基材7へのスルホール、ビアホール、
回路パターン、などの形成方法は、特に限定するもので
なく通常の技術による方法でよい。
[0008] Through holes, via holes to the core substrate 7,
The method for forming the circuit pattern and the like is not particularly limited, and may be a method based on ordinary techniques.

【0009】積層回路板20、21としては、導体回路
5、15、ビアホール4、14が同一面側に形成された
樹脂層1、11、導体層2、12より成るものである。
樹脂層としては前記の基板と同様な樹脂をガラス繊維布
に含浸したもの/ガラス繊維を含まないもの、該樹脂が
熱硬化性及び/又は光硬化性である、等が例示できる。
導体層としては前記の基板と同様な例示ができる。導体
回路、スルホール、等の形成方法は、特に限定されるも
のではないが好ましくは、レーザによる穴開けによる微
細なビアホールの形成である。
The laminated circuit boards 20 and 21 are composed of resin layers 1 and 11 and conductor layers 2 and 12 having conductor circuits 5 and 15 and via holes 4 and 14 formed on the same surface.
Examples of the resin layer include a material obtained by impregnating a glass fiber cloth with a resin similar to that of the substrate described above, a material containing no glass fiber, and a resin having a thermosetting property and / or a photosetting property.
Examples of the conductor layer include the same examples as the above-described substrate. The method of forming the conductor circuit, the through hole, and the like is not particularly limited, but preferably, a fine via hole is formed by laser drilling.

【0010】積層方法は、コア基材7、プリプレグ6、
6’及び積層回路板20、21を積層するに当たり該積
層回路板の導体回路、ビアホールを形成した面側がコア
基材側に向くようにプリプレグを介して配置し積層する
ものである。積層の向き、配置以外は、特に限定するも
のでなく通常の技術による方法でよい。
[0010] The laminating method includes a core substrate 7, a prepreg 6,
When laminating 6 ′ and the laminated circuit boards 20 and 21, they are arranged and laminated via a prepreg such that the surface of the laminated circuit board on which the conductor circuits and via holes are formed faces the core substrate side. Other than the direction and arrangement of the lamination, there is no particular limitation, and a method according to a usual technique may be used.

【0011】積層後の導体層に回路パターンを形成する
方法は、所望によりスルホール用の穴開け、ビアホール
用の穴開け、電気接続のためのメッキ、導体層のエッチ
ング、など特に限定するものではなく、通常の技術によ
る方法でよい。
The method for forming a circuit pattern on the conductor layer after lamination is not particularly limited, if desired, such as drilling for a through hole, drilling for a via hole, plating for electrical connection, etching of the conductor layer, and the like. The method may be a conventional technique.

【0012】更に、一般的には半田付けする部分以外は
ソルダレジストを通常の技術による方法で塗布する。
Further, generally, a solder resist is applied to a portion other than a portion to be soldered by an ordinary technique.

【0013】これらのようにして製作されたプリント配
線板は、最外層に形成されたビアホールの信頼性が高
く、該ビアホールの上に形成された導体層・回路パター
ンが電子部品搭載、固定、電気接続のパッドとして使用
でき、配線密度が高密度である。
In the printed wiring board manufactured as described above, the reliability of the via hole formed in the outermost layer is high, and the conductive layer / circuit pattern formed on the via hole is used for mounting, fixing, and fixing the electronic component. It can be used as a connection pad and has a high wiring density.

【0014】[0014]

【実施例】以下、本発明に係るプリント配線板及びその
製造方法の実施例を説明する。尚、本発明に係るプリン
ト配線板及びその製造方法は以下の実施例に限られるも
のではない。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the printed wiring board according to the present invention and a method for manufacturing the same will be described below. The printed wiring board and the method for manufacturing the same according to the present invention are not limited to the following embodiments.

【0015】(実施例1)ガラス繊維布にエポキシ樹脂
を主成分とする樹脂を含浸した厚さが約100μmの絶
縁材料に厚さが約18μmの銅箔を両面に張り付けた銅
張両面基板を用い、一般に用いられる方法(ドリルによ
る穴開け、スミア処理、銅メッキ、フォトレジストによ
るサブトラクティブ方法で回路パターンの形成、該回路
パターンの銅表面の黒化処理、化学還元処理、等)で表
面に回路パターンを有するコア基材7を形成した。
(Example 1) A copper-clad double-sided board in which a glass fiber cloth impregnated with a resin containing an epoxy resin as a main component and a copper foil having a thickness of about 18 µm was attached to both sides of an insulating material having a thickness of about 100 µm was used. Used and commonly used methods (drilling, smearing, copper plating, forming a circuit pattern by subtractive method using photoresist, blackening the copper surface of the circuit pattern, chemical reduction treatment, etc.) A core substrate 7 having a circuit pattern was formed.

【0016】ガラス繊維布にエポキシ樹脂を主成分とす
る樹脂を含浸した厚さが約60μmの樹脂層11に厚さ
が約12μmの導体層(銅箔)12、12’を両面に張
り付けた銅張両面基板を用い、該銅張両面基板の片面の
該銅箔12’にエッチング方法により窓を開け(ビアホ
ール形成所望位置にフォトドライフィルムをラミネート
し、フォトマスクパターンで紫外線露光し、現像し、該
銅箔12’をエッチングし、ドライフィルムを剥離す
る。)、炭酸ガスレーザ装置の加工テーブルに配置して
該窓より小径のレーザ(パルス幅200μS、周波数1
00Hz、2.5mJ、6ショット)を照射して該窓の
部分の樹脂層11の樹脂を気化、分解しガラス繊維を溶
融し反対面の銅箔12が露出する穴を形成し、過マンガ
ン酸カリウム方法で該穴の内面のスミア処理を行い、通
常のメッキ方法(無電解銅メッキ、電解銅メッキ)で該
穴を介して両面の該銅箔12、12’を電気接続し、通
常のサブトラクティブ方法(フォトドライフィルムをラ
ミネートし、フォトマスクパターンで紫外線露光し、現
像し、導体層12’をエッチングし、ドライフィルムを
剥離する。)で片面に導体回路15及びビアホール14
を有する積層回路板21を形成した。(図3(b))
A copper fiber comprising a resin layer 11 having a thickness of about 60 μm and a conductor layer (copper foil) 12, 12 ′ having a thickness of about 12 μm adhered to both sides of a glass fiber cloth impregnated with a resin mainly composed of epoxy resin. A window is opened in the copper foil 12 'on one side of the copper-clad double-sided substrate by an etching method using a laminated double-sided substrate (a photo-dry film is laminated at a desired position for forming a via hole, exposed to ultraviolet rays in a photomask pattern, and developed, The copper foil 12 ′ is etched and the dry film is peeled off.) A laser having a smaller diameter than the window (pulse width 200 μS, frequency 1) placed on a processing table of a carbon dioxide laser device
(2.5 Hz, 2.5 Hz, 6 shots) to vaporize and decompose the resin of the resin layer 11 in the window portion, melt the glass fiber, and form a hole where the copper foil 12 on the opposite side is exposed. The inner surface of the hole is smeared by a potassium method, and the copper foils 12 and 12 'on both surfaces are electrically connected to each other through the hole by a normal plating method (electroless copper plating, electrolytic copper plating). The conductive circuit 15 and the via hole 14 are formed on one side by an active method (lamination of a photo-dry film, exposure to ultraviolet rays with a photomask pattern, development, etching of the conductor layer 12 ', and stripping of the dry film).
Was formed. (FIG. 3 (b))

【0017】該コア基材7の両側にプリプレグ6、6’
を配置し、更に両側に該積層回路板を該積層回路板21
の導体回路15及びビアホール14を形成した面がコア
基材側に面するように配置し(図4に類似)、真空チャ
ンバーを用いて積層して(加熱180度120分、加圧
25Kg)積層基板を形成した。
The prepregs 6, 6 'are provided on both sides of the core base material 7.
Are further disposed on both sides of the laminated circuit board.
Are arranged so that the surface on which the conductor circuit 15 and the via hole 14 are formed faces the core base material side (similar to FIG. 4), and are laminated using a vacuum chamber (heating 180 degrees for 120 minutes, pressure 25 kg). A substrate was formed.

【0018】該積層基板にドリルを用いてスルホール用
の穴を開け、スミア処理を行い、銅メッキを行い、最外
層に位置する導体層をサブトラクティブ方法でエッチン
グして回路パターンを形成し、所望位置にソルダーレジ
ストを塗布して6層のプリント配線板を製作した。
A hole for a through hole is drilled in the laminated substrate using a drill, smearing is performed, copper plating is performed, and the outermost conductor layer is etched by a subtractive method to form a circuit pattern. Solder resist was applied to the positions to produce a six-layer printed wiring board.

【0019】このように製作されたプリント配線板は、
ビアホールの信頼性が高く、ビアホールの上に形成され
た導体層・回路パターンを電子部品の搭載用パッドとし
て使用して信頼性の高い半田付けができた。
The printed wiring board thus manufactured is
The reliability of the via hole was high, and highly reliable soldering was achieved using the conductor layer and circuit pattern formed on the via hole as mounting pads for electronic components.

【0020】(実施例2)ガラス繊維布にエポキシ樹脂
を主成分とする樹脂を含浸した厚さが約100μmの絶
縁材料に厚さが約18μmの銅箔を両面に張り付けた銅
張両面基板を用い、一般に用いられる方法(ドリルによ
る穴開け、スミア処理、銅メッキ、フォトレジストによ
るサブトラクティブ方法で回路パターンの形成、該回路
パターンの銅表面の黒化処理、化学還元処理、等)で表
面に回路パターンを有するコア基材7を形成した。
Example 2 A copper-clad double-sided board in which a glass foil cloth impregnated with a resin containing an epoxy resin as a main component and a copper foil having a thickness of about 18 μm was adhered to both sides of an insulating material having a thickness of about 100 μm was used. Used and commonly used methods (drilling, smearing, copper plating, forming a circuit pattern by subtractive method using photoresist, blackening the copper surface of the circuit pattern, chemical reduction treatment, etc.) A core substrate 7 having a circuit pattern was formed.

【0021】厚さが約12μmの導体層(銅箔)2の片
面にガラス繊維布にエポキシ樹脂を主成分とする樹脂を
含浸した厚さが約60μmの樹脂層1をラミネートした
銅張片面基板を用い、該銅張片面基板を炭酸ガスレーザ
装置の加工テーブルに配置して該銅張片面基板の該樹脂
層側からレーザ(パルス幅200μS、周波数100H
z、2.5mJ、6ショット)を照射して該樹脂層1の
ビアホール所望位置の樹脂を気化、分解しガラス繊維を
溶融して穴3を形成し(図2(a))、過マンガン酸カ
リウム方法で該穴の内部をスミア処理し、通常のアディ
ティブ方法(メッキレジストパターンを形成し、無電解
メッキを施し)で銅箔2と電気接続するビアホール4及
び導体回路5が該銅箔2とは反対面に有する積層回路板
20を形成した。(図2(b))
A copper-clad single-sided board in which a resin layer 1 having a thickness of about 60 μm, in which a resin containing an epoxy resin as a main component is impregnated into a glass fiber cloth, is laminated on one side of a conductor layer (copper foil) 2 having a thickness of about 12 μm. The copper-clad single-sided substrate is placed on a processing table of a carbon dioxide gas laser apparatus, and a laser (pulse width 200 μS, frequency 100H) is applied from the resin layer side of the copper-clad single-sided substrate.
z, 2.5 mJ, 6 shots) to vaporize and decompose the resin at the desired position of the via hole in the resin layer 1 to melt the glass fiber to form a hole 3 (FIG. 2A), The inside of the hole is smeared by a potassium method, and a via hole 4 and a conductive circuit 5 electrically connected to the copper foil 2 by a usual additive method (forming a plating resist pattern and performing electroless plating) are connected to the copper foil 2. Formed a laminated circuit board 20 having the opposite surface. (FIG. 2 (b))

【0022】該コア基材7の両側にプリプレグ6、6’
を各々配置し、該積層回路板20、20’の導体回路5
及びビアホール4を形成した面がコア基材側に面するよ
うにして更に両側に該積層回路板を各々配置し(図
4)、真空チャンバーを用いて積層して(加熱180度
120分、加圧25Kg)積層基板を形成した。
The prepregs 6, 6 'are provided on both sides of the core base material 7.
And the conductor circuits 5 of the laminated circuit boards 20, 20 '
The laminated circuit boards are further arranged on both sides such that the surface on which the via hole 4 is formed faces the core base material side (FIG. 4), and laminated using a vacuum chamber (heating at 180 ° C. for 120 minutes, Pressure 25 Kg) A laminated substrate was formed.

【0023】該積層基板にドリルを用いてスルホール用
の穴を開け、スミア処理を行い、銅メッキを行い、サブ
トラクティブ方法で回路パターンを形成し、所望位置に
ソルダーレジストを塗布してスルホール8を有する6層
のプリント配線板(図1、ソルダーレジストは図示せ
ず。)を製作した。
A hole for a through hole is formed in the laminated substrate using a drill, a smearing process is performed, copper plating is performed, a circuit pattern is formed by a subtractive method, a solder resist is applied to a desired position, and a through hole 8 is formed. A printed wiring board having six layers (FIG. 1, solder resist is not shown) was manufactured.

【0024】このように製作されたプリント配線板は、
ビアホールの信頼性が高く、該ビアホールの上に形成さ
れた導体層・回路パターンを電子部品の搭載用パッドと
して使用して信頼性の高い半田付けができた。
The printed wiring board thus manufactured is
The reliability of the via hole was high, and highly reliable soldering could be performed using the conductor layer / circuit pattern formed on the via hole as a mounting pad for electronic components.

【0025】[0025]

【発明の効果】本発明に係るプリント配線板及びその製
造方法で製作されたプリント配線板は、ビアホールの信
頼性が高く、該ビアホールの上に形成された導体層・回
路パターンが凹凸が少なく、該導体層・該回路パターン
が電子部品の搭載用パッドとして使用できるため配線密
度を高めることができると共にプリント配線板としての
信頼性が高い。
According to the printed wiring board of the present invention and the printed wiring board manufactured by the method for manufacturing the same, the reliability of the via hole is high, and the conductor layer / circuit pattern formed on the via hole has few irregularities. Since the conductor layer and the circuit pattern can be used as mounting pads for electronic components, the wiring density can be increased and the reliability as a printed wiring board is high.

【0026】[0026]

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るプリント配線板及びその製造方法
の一実施態様を示す断面図である。
FIG. 1 is a sectional view showing one embodiment of a printed wiring board and a method of manufacturing the same according to the present invention.

【図2】本発明に係るプリント配線板及びその製造方法
の積層回路板の一実施態様を示す断面図であり、(a)
は樹脂層に穴を形成した断面図、(b)はビアホールと
導体回路を形成した断面図である。
FIG. 2 is a cross-sectional view showing one embodiment of a printed wiring board according to the present invention and a laminated circuit board of a method for manufacturing the printed wiring board, and FIG.
2 is a cross-sectional view in which a hole is formed in a resin layer, and FIG. 2B is a cross-sectional view in which a via hole and a conductive circuit are formed.

【図3】本発明に係るプリント配線板及びその製造方法
の積層回路板の一実施態様を示す断面図であり、(a)
は樹脂層の両面に導体層を積層した断面図、(b)はビ
アホールと導体回路を形成した断面図である。
FIG. 3 is a cross-sectional view showing one embodiment of a printed wiring board according to the present invention and a laminated circuit board of a method for manufacturing the printed wiring board, and FIG.
FIG. 2 is a cross-sectional view in which a conductor layer is laminated on both surfaces of a resin layer, and FIG. 2B is a cross-sectional view in which a via hole and a conductor circuit are formed.

【図4】本発明に係るプリント配線板及びその製造方法
の一実施態様を示す積層配置の断面図である。
FIG. 4 is a cross-sectional view of a stacked arrangement showing one embodiment of a printed wiring board and a method of manufacturing the same according to the present invention.

【図5】従来技術によるプリント配線板及びその製造方
法。
FIG. 5 shows a conventional printed wiring board and a method of manufacturing the same.

【0027】[0027]

【符号の説明】[Explanation of symbols]

1、11 樹脂層 2、12、12’、32 導体層 3 穴 4、14 ビアホール 5、15 導体回路 6、6’ プリプレグ 7 コア基材 8 スルホール 20、20’、21 積層回路板 33 充填材 DESCRIPTION OF SYMBOLS 1, 11 Resin layer 2, 12, 12 ', 32 Conductive layer 3 Hole 4, 14 Via hole 5, 15 Conductor circuit 6, 6' Prepreg 7 Core base material 8 Through hole 20, 20 ', 21 Laminated circuit board 33 Filler

───────────────────────────────────────────────────── フロントページの続き (72)発明者 幅崎 康晴 福島県須賀川市芹沢町66−26 (72)発明者 焼田 俊一 福島県須賀川市大字西川字坂の上15 Fターム(参考) 5E346 AA43 DD32 EE09 FF07 FF13 GG15 GG22 GG28  ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yasuharu Nagasaki 66-26, Serizawa-cho, Sukagawa-shi, Fukushima Prefecture (72) Inventor Shun-ichi Sakagami, Fukushima-shi, Fukushima-shi, Fukushima 15th F-term (reference) 5E346 AA43 DD32 EE09 FF07 FF13 GG15 GG22 GG28

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】コア基材、プリプレグ及び積層回路板を積
層して成るプリント配線板及びその製造方法において、
導体回路及びビアホールが同一面に形成された樹脂層及
び導体層より成る積層回路板の該導体回路の面側並びに
コア基材の間にプリプレグを配置して積層し、サブトラ
クティブ方法にて該導体層をエッチングして回路パター
ンを形成することを特徴とするプリント配線板及びその
製造方法。
1. A printed wiring board comprising a core substrate, a prepreg and a laminated circuit board laminated, and a method for producing the same.
A prepreg is arranged and laminated between the surface side of the conductor circuit and the core substrate of a laminated circuit board comprising a resin layer and a conductor layer in which the conductor circuit and the via hole are formed on the same surface, and the conductor is formed by a subtractive method. A printed wiring board and a method of manufacturing the same, characterized in that a circuit pattern is formed by etching a layer.
JP26318198A 1998-09-17 1998-09-17 Printed wiring board and its manufacture Pending JP2000101232A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26318198A JP2000101232A (en) 1998-09-17 1998-09-17 Printed wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26318198A JP2000101232A (en) 1998-09-17 1998-09-17 Printed wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JP2000101232A true JP2000101232A (en) 2000-04-07

Family

ID=17385902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26318198A Pending JP2000101232A (en) 1998-09-17 1998-09-17 Printed wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JP2000101232A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102014590A (en) * 2010-12-18 2011-04-13 广东生益科技股份有限公司 Production method of multi-layer printed circuit board and multi-layer printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102014590A (en) * 2010-12-18 2011-04-13 广东生益科技股份有限公司 Production method of multi-layer printed circuit board and multi-layer printed circuit board

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