JP2000089736A - Display device and its driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve the miniaturization of a whole display device and to reduce power consumption of a D/A circuit by reducing a circuit scale of and reducing an occupied area of an incorporated D/A converter and the like in a display device to which digital video data can be directly inputted. SOLUTION: This device has a decoder 1 and a selector 2 each consisting of CMOS circuits of p-SiTFT, and a digital driver consisting of signal sources 31, 32, 33, 34. Input digital data DATA1, DATA2, are decoded by the decoder 1, and control signals DC1, DC2, DC3, DC4 are sent to the selector 2. The selector 2 selects a signal of which amplitude is different from signal sources 31. 32, 33, 34 and sends it to a video line 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a display device and a driving circuit thereof.

[0002]

2. Description of the Related Art Flat panel displays such as a liquid crystal display (LCD), an organic electroluminescence (EL) display, and a plasma display have been actively developed. Among them, LCDs are excellent in terms of thinness and low power consumption, and are the mainstream of monitor displays in the fields of AV equipment and OA equipment.

An LCD is formed by sealing liquid crystal between a pair of opposed substrates. A large number of electrodes for applying an electric field to the liquid crystal and driving the liquid crystal are formed on the opposing inner surfaces of the substrates, and display pixels are configured as capacitors using the liquid crystal as a dielectric layer.

In recent years, with the development of digital technology, LCDs have been used as monitors for digital devices. On the other hand, by using a technique for forming a polycrystalline semiconductor, particularly polysilicon (p-Si) on a substrate at a low temperature equal to or lower than the allowable temperature limit of the substrate, a high-speed semiconductor element can be formed on an insulating substrate. Can be. As a result, not only the switching element of the display pixel portion but also a driver circuit for driving the same is integrally formed on the same substrate.
D is produced.

[0005] Generally, LCDs are driven by analog signals. Under such circumstances, LCDs with built-in digital drivers are being developed.

FIG. 5 shows a configuration of a conventional LCD incorporating a digital driver. The lower part of the figure is a display pixel section, in which gate lines 71 and drain lines 81, 82,... Are arranged in an intersecting manner. At each intersection, a pixel TFT 90 and a liquid crystal connected in parallel to the pixel TFT 90 are provided. A capacitance 91 and an auxiliary capacitance 92 are formed.

Around the display pixel portion on the same substrate as the display pixel portion, a gate driver portion (not shown) for supplying a scanning signal to the gate of the pixel TFT 90 and a digital drain for supplying a pixel signal to the drain of the pixel TFT 90 A driver section (above the display pixel section in the figure) is formed.

The digital drain driver section is composed of circuit elements for transmitting analog pixel signals corresponding to drain lines 81, 82,... From input digital data DATA1 and DATA2.

The digital drain driver section includes horizontal shift registers 101, 102,..., Video lines 111, 112, and first to fourth signal sources 161 to 164 (signal levels V1 to V4) having different voltage levels, respectively, as common elements. V4). In the example of FIG. 1, since the input digital data DATA1 and DATA2 have two bits and four gradations, each bit of the two-bit input digital data DATA1 and DATA2 is assigned to the two video lines 111 and 112.

In the digital drain driver section, sampling switches 121 and 122 and a first data holding capacitor 1 are provided for each drain line 81.
31, the data transfer control line 140, the transfer switches 141 and 142, and the second data holding capacitor 14
3, a decoder 150 for converting digital data into four types of control signals, and a selector 170 for selecting a signal source according to the control signals and outputting the selected signal source to the drain line 81.

With this configuration, the horizontal shift registers 101,
.. Start with a start pulse (not shown), and the shift operation is controlled according to a shift clock (not shown). Horizontal shift registers 101, 102,
… Is started and at the same time, each video line 131,
132, digital video data DATA1, DATA2
Is supplied. First, in the first column, two sampling switches 12 are output by the sampling pulse SP1 output from the output stage S / R of the horizontal shift register 101.
1, 122 are turned on.

At this time, the digital video data D corresponding to the pixel to be lit is displayed on the video lines 111 and 112.
ATA1 and DATA2 are supplied, and the digital data is written to the capacitor 131 via the selected sampling switches 121 and 122. Are sequentially output from the horizontal shift registers 101 and 102 during one horizontal period.
Digital data DATA1 and DATA2 are sampled by the corresponding sampling switches 121 and 122, and written to the first data holding capacitor 131 (C1). During one horizontal period, digital input video data DATA1 corresponding to all the drain lines 81, 82,.
When the sampling of DATA2 is completed, the transfer signal WR is supplied to the transfer control line 140. In response to the transfer signal WR, all the transfer switches 141 and 142 are turned on, and the second data holding capacitors 143 connected to the switches 141 and 142 respectively hold the corresponding first holding capacitors 131. Digital data is written.

A decoder 150 provided for each drain line 81 includes an inverter, a NAND gate, an N
An OR gate is provided, and based on a combination (high, low) of DATA1 and DATA2 held in the second data holding capacitor 144, the control signals DC1 to DC4
To the selector 170 connected to the signal source 160.

The selector 170 includes control signals DC1 to DC
^The 2 ⁿ in accordance with the 4; a selector switch 181 to 184 of (here = 2 4), each switch 181-18
4 has first voltage levels (V1 to V4) different from each other.
To the fourth signal sources 161 to 164 are connected correspondingly. For example, when the decoder 150 decodes DATA1 and DATA2 and outputs the control signal DC1, that is, outputs the high-level control signal DC1, the selector 170 turns on the selector switch 181 by the high-level control signal DC1. Then, the voltage signal V1 from the corresponding first signal source is output to the drain line 81 via the selector switch 181.

With the circuit configuration as described above, L in FIG.
The CD is driven by a so-called line-sequential driving method,
Analog pixel signals corresponding to digital input data DATA1 and DATA2 are simultaneously output to all the drain lines arranged in the horizontal direction, and each pixel TFT connected to the gate line 71 selected at this time.
90 is turned on, and pixel capacitances 91,
The pixel signals supplied to the drain lines 81, 82,...

The circuit elements of the above digital drain driver section are constituted by p-Si TFT elements formed on the same substrate as the pixel TFT 90.

In the LCD shown in FIG. 5, as described above, the digital input video data DATA1 and DATA2 are at L level.
The data is converted into an analog pixel signal for each drain line by a digital drain driver unit built in the CD substrate, and the display is performed in each display pixel by the analog pixel signal.

Therefore, a display signal transmitted in a digital format or a display signal processed by a digital signal can be directly supplied to the LCD, so that a D / A converter is not required on the display signal output device side. Thus, the circuit scale of the external part of the LCD is reduced, and the cost is greatly reduced. Also, since the size of the module is reduced, a display that can be used in a portable digital product such as a digital still camera is obtained.

[0019]

However, in the LCD shown in FIG. 5, the D / D signal is provided for each column (for each drain line).
The decoder 150 and the selector 170 having the A-conversion function are required, and many circuit elements must be formed on the LCD substrate. The circuit scale increases as the number of drain lines increases. Therefore, for a high resolution panel with a narrow pitch between drain lines, FIG.
It is difficult to adopt a circuit configuration as shown in FIG. Further, as the circuit scale increases, power consumption increases accordingly, so that it cannot be used for a display panel of a portable device or the like that requires low power consumption. These circuits have the same p as the TFT 90 in the display pixel portion.
-Si TFTs are used, but the number of TFT elements increases dramatically. If even one of these TFT elements becomes defective, the entire display device becomes defective.

For this reason, there have been problems such as a decrease in yield and an increase in manufacturing cost.

Further, as the number of bits increases, the D /
Since the circuit scale of the A converter becomes larger, the above-mentioned problem becomes more remarkable.

[0022]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems. In a driving circuit of a display device in which display pixels are arranged in a matrix, n bits (input) are inputted. n is from the digital video data of a natural number), a decoder circuit for creating the 2 ⁿ control signals, provided corresponding to said 2 ⁿ pieces of control signals, the 2 ⁿ pieces of, by a corresponding control signal off is controlled, and has a 2 ⁿ pieces of analog switches connected to different 2 ⁿ kinds signal source, ^the 2 ⁿ analog switches oN control on the basis of digital video data the input And ^outputting a signal from a corresponding signal source among the 2 ⁿ types to the corresponding display pixel.

Further, in the display device of the present invention, a plurality of display pixels arranged and at least a part of a drive circuit for controlling the display pixels and supplying a display signal to the display pixels are formed on the same substrate. a display device formed on the driving circuit, from the digital video data of the input n bits (n is a natural number), a decoder circuit for creating the 2 ⁿ control signals, the 2 ⁿ pieces of control signals each provided corresponding, the 2 ⁿ pieces of, is controlled on and off is by the corresponding control signals, and has a 2 ⁿ pieces of analog switches connected to different 2 ⁿ kinds signal source,
From any of the 2 ⁿ analog switches ON-controlled based on the input digital video data, 2 ⁿ
Among the types, the signal from the corresponding signal source is output to the corresponding display pixel.

As described above, since the input digital video data is D / A converted to generate a video signal, there is no need to provide a D / A converter for each column, and the overall circuit scale is reduced. Further, the circuit area can be reduced by increasing the degree of integration of the decoder portion.

Further, in the drive circuit of the display device according to the present invention, the display pixel has a pixel transistor for switching rewriting of display information, and the decoder and / or the analog switch are on the same substrate as the pixel transistor. And a driving circuit for a display device including transistors having substantially the same structure.

When a pixel and a circuit for driving a pixel are formed on the same substrate, the above-described configuration makes it possible to reduce the circuit scale of the driving circuit portion, thereby reducing the size of the display device, especially In addition, it becomes easy to further narrow the peripheral portion of the display device.

Further, the present invention is a drive circuit for a display device, further comprising a shift circuit for shifting the voltage level of 2 ⁿ control signals output from the decoder circuit.

As a result, the power supply voltage of the decoder section can be lowered to reduce the power consumption.

[0029]

FIG. 1 is a configuration diagram of a digital driver built-in type LCD according to a first embodiment of the present invention. The upper left part of the figure is a decoder 1, and the upper right part is a selector 2 controlled by the decoder 1. The lower part of the figure shows a drain driver composed of horizontal shift registers 41, 42,..., Video line 6 and sampling switches 51, 52,.
, And drain lines 81, 82,..., A pixel TFT 90 formed at the intersection of these, and a display pixel section composed of a liquid crystal capacitor 91 and an auxiliary capacitor 92 connected thereto.

The decoder 1 and the selector 2 constitute a built-in D / A converter according to the present invention.

The decoder 1 includes inverters 11, 12, N
An AND gate 13 and a NOR gate 14 are provided to decode 2-bit input digital data and to output four control signals D
One of C1, DC2, DC3, and DC4 is generated and supplied to the selector 2.

The selector 2 comprises first to fourth analog switches 21, 22, 23 and 24, and control signals DC1, DC2, DC3 and DC3 supplied from the decoder 1, respectively.
On / off is switched by DC4. The analog switches 21, 22, 23, and 24 are provided with four different mutually different signals from first to fourth signal sources 31, 32, 33, and 34 that generate polarity inversion voltages having mutually different amplitudes. Level inversion voltages V1, V4, V
2, V3 (V1 <V2 <V3 <V4). These signal sources 31, 32, 33, 34 are connected to the video line 6 via analog switches 21, 22, 23, 24.

A digital driver section for driving these display pixel sections, that is, a decoder 1, a selector 2, and a drain driver (horizontal shift registers 41, 42,..., Sampling switches 51, 52,. A CMOS circuit using a p-Si TFT element having the same structure as the TFT of the display pixel portion shown in FIG.
(B)).

Pixel-part TFT and p-SiT of driver part
The FT element is formed on the same glass substrate 200 by almost the same process, and mainly includes the gate electrode 210, the gate insulating film 211, and the p-Si film 21.
2 (the channel region 212c, the source region 212s, and the drain region 212d), and in a contact hole formed in the interlayer insulating film 213, a source electrode 214 connected to the source region 212s and a drain electrode 215 connected to the drain region 212d are provided. . Also, the p-Si film 2
Reference numeral 12 denotes a polycrystalline silicon film formed by polycrystallizing an a-Si film by laser annealing. Pixel TFT
For example, a display pixel electrode 217 made of ITO or the like and formed on a planarization insulating film 216 is connected to a source region of a p-Si film, and a TFT in a driver portion is different from a p-channel TFT having a different channel conductivity type. An n-channel TFT and a drain electrode 215 (or drain region)
, And a CMOS circuit is configured. The CM
The potential VSS is applied to each drain electrode 215 of the OS circuit.
And VDD are applied.

The digital driver built-in type LC shown in FIG.
The operation of D will be described with reference to FIG.

The decoder 1 inputs digital data of 2 bits and 4 gradations, DATA1 and DATA2 (FIG. 3).
(See (a)), by decoding this digital data, the decoder 1 generates one of the first to fourth control signals and outputs it to the selector 2. For example, in the example shown in the figure, the input digital data D
In accordance with ATA1 and DATA2, the level of the corresponding one of DC1 to DC4 control signals is different from the other control signals (here, L level). When the input digital data DATA1 and DATA2 are "01", that is, the second gray scale, for example, the decoder 1
The third control signal DC3 output from the CPU becomes L level, and the CMOS to which the third control signal DC3 is supplied is supplied.
The analog switch 23 having the structure is turned on. This allows
The second-level voltage V2 supplied from the second signal source 33 to the analog switch 23 is applied to the video line 6 via the analog switch 23.

As described above, n bits transmitted one after another
(Here, n = 2) digital video data DATA1
And 2 according to DATA2ⁿPieces, here 1st to 1st
4 from one of the signal sources 31, 32, 33, 34
Respond 2ⁿ(Four) analog switches 21, 22,
23 or 24 to video line 6; ⁿ
Outputs any type of voltage signal from level V1 to V4
(See FIG. 3C).

As shown in FIG. 3 (c), the signal output to the video line 6 is an analog video signal, and a D / D signal is output by a built-in driver circuit formed on a substrate in the LCD of the present invention. A conversion has been performed. The voltages V1 to V4 output from the signal sources 31 to 34 are used.
Has a polarity inverted at a predetermined cycle, as described above,
FIG. 3C shows waveforms when the voltages V1 to V4 are positive.

In the digital drain driver according to the present invention of the so-called dot sequential driving method, the horizontal shift register 4 is used.
Sampling pulses S sequentially output from 1, 42,.
The sampling switches 51, 52,... Are sequentially turned on in accordance with P1 and SP2 (see FIG. 3D). For this reason, the analog video signal output to the video line 6 is sampled by the sampling switches 51, 52,.
82 are supplied as pixel signals (see FIG. 3E).

In the display pixel portion, the gate lines 71,
, A scanning signal for turning on all the pixel TFTs 90 connected to the same gate line during one horizontal period (for example, a scanning signal that becomes H level during one horizontal period) is applied. Therefore, the pixel signals sequentially supplied to the drain lines 81, 82,... Are turned on by the scanning signal, and the pixels T connected to the corresponding drain lines
The voltage is supplied to the liquid crystal capacitor 91 and the auxiliary capacitor 92 via the FT, and the capacitors 91 and 92 hold a voltage corresponding to the supplied display signal during one display period of the pixel (FIG. 3).
(E)).

According to the present invention, the analog switch 2 for supplying a current sufficient to directly drive a display pixel is provided.
1, 22, 23, 24 and the analog switch 21,
Control signals DC1, DC2, DC3,
The inverter 12 that supplies the DC4 has a sufficiently large transistor size, and the other transistor sizes of the decoder 1 are made as small as possible for the logic operation. The decoder 1 and the selector 2 are all constituted by CMOS circuits using p-Si TFTs and consume low power. However, by reducing the size of the transistors of the decoder 1, the area occupied by the entire circuit is reduced, and Power consumption can be further reduced.

FIG. 4 is a configuration diagram of a digital driver built-in type LCD according to a second embodiment of the present invention. In the present embodiment, a level shifter 4 is provided between the decoder 1 and the selector 2. The level shifter 4 is the first
To the fourth level shift circuits 41, 42, 43, 44, each of which has a control signal DC output from the decoder 1.
1, DC2, DC3, and DC4 are increased in voltage level. Analog switches 21 to 2 which output large currents of sufficient levels to drive display pixels from signal sources 31 to 34 by the level-shifted control signals DC1 to DC4.
4 can be driven sufficiently. The LCD of the present embodiment operates in the same manner as the waveform shown in FIG. 3 except for the level shift of control signals DC1 to DC4.

Therefore, even when the voltage signals output from the signal sources 31 to 34 require a certain amplitude to drive the display pixels, the power supply voltage of the decoder 1 can be made as low as possible. , The number of bits has increased,
Even if the circuit scale of the decoder 1 becomes large, an increase in power consumption can be suppressed.

Further, in each of the above embodiments, the LCD has been described as an example of the display device, but the same effect can be obtained with a display device of another system.

For example, in an organic EL display device using an organic electroluminescent element as a display pixel, a p-Si film is used as a switch element for driving a pixel on the same substrate as in an LCD having the above-mentioned TFT. TF used as layer
T is formed, and a driver circuit for driving the TFT of the display unit is a p-type transistor having the same structure as that of the display unit TFT.
A configuration in which a SiTFT is formed is employed. Therefore, in such a display device, a decoder circuit for decoding n-bit input digital data and outputting 2 ⁿ control signals is provided, and further, 2 ⁿ kinds of display signals are converted into 2 ⁿ pieces of display signals by the control signals. By employing a configuration for outputting from an analog switch, it is possible to obtain a display device having a digital-to-analog conversion function with a very simple and minimal number of elements.

[0046]

As is apparent from the above description, in a display device to which digital video data can be directly input, the circuit scale of the built-in D / A converter and the like is reduced, and the occupied area is reduced. Therefore, the size of the entire display device can be reduced, and the power consumption of the D / A circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a display device with a built-in digital driver according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the display device of the present invention.

FIG. 3 is a driving waveform diagram showing driving waveforms in each part of the display device of the present invention.

FIG. 4 is a configuration diagram of a display device with a built-in digital driver according to a second embodiment of the present invention.

FIG. 5 is a configuration diagram of a conventional display device with a built-in digital driver.

[Explanation of symbols]

 Reference Signs List 1 decoder 2 selector 4 level shifter 11,12 inverter 13 NAND gate 14 NOR gate 21,22,23,24 analog switch 31,32,33,34 signal source 41,42, ... horizontal shift register 51,52, ... sampling switch 71,... Gate line 81, 82,. Electrode 215 Drain electrode 216 Flattening insulating film 217 Display pixel electrode 218 Injection stopper insulating film

Claims (6)

[Claims] 1. A drive circuit for a display device in which display pixels are arranged in a matrix, comprising: a decoder circuit for generating 2 ⁿ control signals from input n-bit (n is a natural number) digital video data; the 2 respectively provided corresponding to the ⁿ control signals, the 2 ⁿ pieces of,
2 ⁿ analog switches whose on / off are controlled by corresponding control signals and connected to different 2 ⁿ types of signal sources, and which are on-controlled based on the input digital video data. than any of the ⁿ analog switches, 2 ⁿ kinds of driving circuit of a display device and outputs the signal from the corresponding signal source to the display pixels corresponding. 2. The display pixel includes a pixel transistor for switching rewriting of display information, and the decoder and / or the analog switch are formed on the same substrate as the pixel transistor and have substantially the same structure. 2. The driving circuit for a display device according to claim 1, wherein the driving circuit comprises: 3. The driving circuit according to claim 1, further comprising a shift circuit for shifting the voltage level of 2 ⁿ control signals output from the decoder circuit. 4. A display device in which a plurality of display pixels arranged and at least a part of a driving circuit for controlling the display pixels and supplying a display signal to the display pixels are formed over the same substrate. The drive circuit is provided corresponding to the 2 ⁿ control signals, and a decoder circuit for generating 2 ⁿ control signals from input n-bit (n is a natural number) digital video data. , Of the 2 ⁿ ,
2 ⁿ analog switches whose on / off are controlled by corresponding control signals and connected to different 2 ⁿ types of signal sources, and which are on-controlled based on the input digital video data. A display device, wherein a signal from a corresponding signal source among 2 ⁿ types is output to a corresponding display pixel from one of ⁿ analog switches. 5. The display pixel includes a pixel transistor for switching rewriting of display information, and the decoder circuit and / or the analog switch are formed on the same substrate as the pixel transistor and have substantially the same structure. The display device according to claim 4, wherein the display device includes: 6. The display device according to claim 4, further comprising a shift circuit that shifts a voltage level of 2 ⁿ control signals output from said decoder circuit.