JP2000060012A - Voltage monitoring method of auxiliary power source - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of signal lines and cope with increase of batteries by stipulating the turning on/off state of a switch, only by the contents of serial data. SOLUTION: An auxiliary electrode 1 has a CPU substrate 2, control object substrates 31-34 and a battery group 9. Data showing that any switch is designated and turned on out of switches which are arranged in relays 71-74 and connected with the respective batteries of the battery group 9 are transferred as serial data between control object substrate 31-34. As compared with the conventional case where data like the above data are transferred as parallel data, the number of signal lines can be reduced. When the number of batteries is increased, since the number of the control object substrate 31-34 is increased in order to correspond to the batteries, it is not necessary to increase the number of signal lines in the control object substrate 31-34 or to change circuit design as in the conventional cases, so that it is easy to cope with the increase in the number of batteries.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an auxiliary power supply. Regarding improvement.

[0002]

2. Description of the Related Art A general telephone exchange is provided with an auxiliary power supply in addition to a main power supply for generating a power supply voltage of a communication apparatus from an AC voltage supplied from a commercial power supply. The auxiliary power supply is a power supply for supplying a power supply voltage to the communication device instead of the power supply when an abnormality occurs in the power supply of the communication device.

The auxiliary power supply has storage batteries connected in series, and these storage batteries are connected in parallel with the power supply of the communication device. And charge during the operation of the power supply,
It is configured to generate a voltage of the same magnitude as the power supply voltage.

[0004] In such an auxiliary power supply, if the storage battery constituting the auxiliary power supply is deteriorated, a voltage as large as the power supply voltage cannot be supplied to the communication device. Therefore, by measuring the voltage between the positive and negative terminals of each storage battery, it is determined whether each storage battery is correctly generating a predetermined voltage, and if there is a storage battery generating a voltage lower than the predetermined voltage, It is necessary to always supply a voltage of the same magnitude as the power supply voltage to the communication device by replacing the storage battery.

Generally, there are a plurality of storage batteries, and it is wasteful to prepare the same number of voltage measuring devices as the number of storage batteries. Therefore, usually one battery to measure the voltage is specified,
The voltage of the specified storage battery is measured by connecting the specified storage battery and the voltage measuring device as needed. Thereafter, the storage battery to be measured next is specified, the specified storage battery is connected to the voltage measuring device, and the voltage of the newly specified storage battery is measured. By repeating such an operation, the voltages of all the storage batteries are measured by one voltage measuring device.

As described above, the auxiliary voltage capable of measuring the voltage of the storage battery is provided.
An example of the auxiliary power supply is shown by reference numeral 101 in FIG. This auxiliary
The power supply 101 has one CPU board 102 and three control boards.
Target substrate 103₁~ 103_Three, Storage battery group 104, and illustration
Not one voltage measuring instrument. Each control target base
Board 103₁~ 103_ThreeIs connected via the signal line group 110 to the CP
Connected to the U board 102 and from the CPU board 102
Each control target board 103 ₁~ 103_ThreeThe same data is transferred
It is configured to be able to. This signal line group 110 includes
Consists of signal line groups 113 and 114 to be described later, respectively.
Have been.

The storage battery group 104 is formed by connecting a plurality of storage batteries (not shown) in series, and is connected in parallel with the voltage obtained from the exchange power supply, so as to assist the commercial power supply of the exchange. It has become.

The storage battery group 104 includes a signal line group 111₁~ 1
11_ThreeThe control target substrate 103 ₁~ 103_ThreeConnect to
Have been. These control target substrates 103₁~ 103_Threeof
One of the control target substrates 103_ThreeAs an example,
2 (b) is shown in FIG. This control target substrate 103
_ThreeAre a comparator 106, a decoder 107, a driver 10
8, having a relay 109 and a dip switch 120
You. The relay 109 includes a plurality of relays (not shown).
Each switch is composed of a storage battery group 104.
Are connected to the positive and negative terminals of each storage battery.
You.

A total of two switches connected to the positive and negative terminals of each storage battery are turned on / off together, and when turned on, the positive and negative bipolar terminals of each storage battery can be connected to a voltage measuring device (not shown). ing.

When data is input from the CPU board 102 to the decoder 107 via the signal line group 113, the data is input to the decoder 10 of each of the control target boards 103 _{1 to} 103 ₃ .
7 are decoded. When the decoded result is output to the driver 108, each of the control target substrates 103 ₁ to 103 ₁ to
One of the switches in each of the relays 103 ₃ is turned on, and the voltage of the storage battery connected to the turned on switch is transmitted to the voltmeter so that the storage battery is designated. I have.

At this time, the control target substrates 103 ₁ to 103 ₁ to 10
3 to _3, the same data from the signal line group 113 is input, since the control target substrate 103 ₁ to 103 ₃ has the same circuit configuration, all the control target substrate 103 _1-10
About 3 ₃ relays 109 would switch provided at the same position is placed in the on state.

[0012] For all of the control target board 103 ₁ to 103 _3, since the same decoding result is output to the driver 108, the control target substrate 103 ₁ to 103 ₃ for 1
Sets, a total of three sets of switches will be specified, but if there is only one voltmeter, only one storage battery can measure the voltage at a time, and only one switch can be turned on at a time. Limited to one set. Therefore, any _{one of} the control target boards 103 _{1 to} 103 ₃ is selected, and one of the relays 109 provided on the selected control target board is selected.
Only one set of switches needs to be turned on.

In this way, in order to select one control target board, data designating the board of the comparator 106 is input from the CPU board 102 via the signal line group 114. Each of the control target boards 103 _{1 to} 103 ₃ is provided with a DIP switch 120 having the same configuration. However, the settings of the DIP switches 120 are all different for each of the control target boards 103 _{1 to} 103 ₃ . Each control target board 103 ₁
The comparators 106 to 103 ₃ can read the setting.

Each of the comparators 106 is connected to the CPU board 1
The data inputted from 02 is compared with the setting of the dip switch, and it is determined whether or not the user is selected based on the comparison result. Thus, the control target substrates 103 _1-
When 103 ₃ either are selected, from the comparator 106 on the control target substrate selected, the output enable signal is output to the decoder 107.

Then, the 1 connected to the comparator 106
The decoders 107 output the decoding result to the driver 108 via the signal line group 113, and determine the state of the switch in the relay 109. When one set of switches is turned on, the voltage between the positive and negative electrodes of one storage battery connected to the switch is transmitted to a voltage measuring device (not shown), and the voltage is measured.

In the above-described auxiliary power supply 101, the circuit configurations 103 _{1 to} 103 ₃ of the control target substrates can be the same, so that the circuit configurations of the control target substrates can all be the same.
Therefore, the same type of board can be mass-produced, and when the control target board breaks down, the settings of the hand-held board can be replaced according to the faulty board.

[0017] However, in such an auxiliary power source 101, the control target substrate 103 ₁ to 103 ₃ are Chigae all settings of the DIP switches 120 as described above, and an identification of the controlled object substrate 103 ₁ to 103 ₃ Therefore, when the number of batteries increases and the number of control target boards must be increased, the number of DIP switches 120 is increased,
To change the setting, the control target substrate 103
_Since the design of _{1 to} 103 ₃ had to be redone from the beginning, it was not possible to easily add batteries.

Further, the signal lines 11 from the CPU board 102 are provided.
Since the same data is sent to each of the control target boards 103 _{1 to} 103 ₃ in parallel via the “0”, there is a problem that the number of signal lines for data transfer increases.

[0019]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned disadvantages of the prior art, and its object is to reduce the number of signal lines and to easily cope with the addition of batteries. An object of the present invention is to provide a voltage monitoring method for an auxiliary power supply.

[0020]

As described above, the invention according to claim 1 has a plurality of storage batteries connected in series to each other, and the plurality of storage batteries connected in series are supplied from an exchange power supply. In a monitoring method of an auxiliary power supply configured so that each of the storage batteries is discharged according to a load change when connected in parallel to a voltage, the operation of the voltage measurement device, the plurality of control target boards, and the respective control target boards is controlled. A plurality of switches, a driver circuit, a storage circuit, an input terminal, and an output terminal are provided on each of the control target substrates. The switch is
The storage circuit is provided between the measurement terminal of the voltage measuring device and the positive and negative electrodes of each of the storage batteries, and the storage circuit stores the serial data input from the input terminal for a predetermined time, and stores the data having passed the predetermined time. The driver circuit is configured to output from an output terminal, and the driver circuit is configured to be able to change the state of each set of switches according to the storage content of the storage circuit, and each of the control target substrates is connected in series, When the CPU board outputs serial data to the foremost control target board, the serial data is sequentially transmitted from the preceding control board to the subsequent control target board. .

According to a second aspect of the present invention, there is provided the monitoring method of the auxiliary power supply according to the first aspect, wherein the output terminal of the last one of the serially connected control target boards is the CPU board. Is connected to the data input terminal of

According to a third aspect of the present invention, there is provided the auxiliary power supply according to any one of the first and second aspects, wherein the driver circuit has a latch circuit for holding a state of each of the switches. Features.

According to a fourth aspect of the present invention, there is provided the monitoring method of the auxiliary power supply according to the third aspect, wherein a strobe signal is simultaneously input to each of the control target boards from the CPU board. The driver circuit on the control target substrate is configured to reflect the contents of the storage circuit on each control target substrate to each of the latch circuits when the strobe signal is input.

According to the present invention, after the serial data input from the input terminal is stored for a predetermined time in the storage circuit provided on each of the control target boards, data that has passed a predetermined time is output from the output terminal. Serial data is sequentially transmitted from the control target board to the subsequent control target board.

At this time, if only one bit of data at a predetermined position, such as "00... At least one of them stores serial data in which only one bit ("1") is different from the remaining bits ("0").

The driver circuit provided on each control target substrate is configured so that the state of each set of switches can be changed in accordance with the contents stored in the storage circuit. For example, one bit different from the remaining bits By turning on a set of switches corresponding to (“1”) and turning off a set of switches corresponding to the remaining bits (“0”), each control target board performs the same operation with the same circuit configuration. Even if it does, it is possible to turn on only one of the switches in a plurality of sets and turn off the remaining switches.

As described above, since the ON / OFF state of the switch can be defined only by the content of the serial data, the connection relationship of the DIP switches needs to be changed for each board in order to identify the board to be controlled. Unlike the related art, the device can be configured using a control target substrate having the same circuit configuration. Therefore, no matter how much the number of batteries is increased and the number of control target substrates is increased to respond to this,
Unlike the related art, there is no need to increase the number of signal lines in the control target substrate or change the circuit design, so that it is possible to easily cope with an increase in batteries.

Further, in the present invention, since serial data is transferred, the number of signal lines is smaller than in the conventional case where the address of the storage battery is specified using parallel data to specify the address of the storage battery to be measured. Can be reduced.

In the present invention, as described in claim 2, the output terminal of the last control target substrate is connected to the C terminal.
Since it is connected to the data input terminal of the PU board, the serial data sequentially transferred to each control target board is
The input can be made again to the U substrate. Therefore, it can be confirmed on the CPU board side whether or not the serial data has been correctly transferred to the last control target board.

According to the present invention, each driver circuit has a latch circuit for holding a state of each switch. The stored contents of the storage circuit are updated from time to time, and the switch is turned on / off accordingly.
The off state also changes from moment to moment. However, when the state of the switch actually changes, there is a possibility that inconvenience in voltage measurement may occur, for example, the next storage battery is designated before the voltage measurement is completed.

In preparation for such a case, the state at the time of on / off switching of each switch is held by the latch circuit.
After turning on a certain set of switches to measure one battery, before turning on the next switch and measuring another battery, the set of switches connected to the first measured battery is turned on. State can be maintained. By doing so, the next storage battery can be designated after the battery measurement is completed, so that such inconvenience can be prevented.

Further, in the present invention, as described in claim 4, a strobe signal is simultaneously input to each control target board from the CPU board. Each driver circuit is configured to reflect the contents of the storage circuit in each latch circuit when a strobe signal is input.

Even if such a configuration is not adopted, for example, a configuration may be adopted in which the contents of the storage circuit are reflected in the latch circuit when a predetermined time has elapsed from the start of operation in each control target board. With such a configuration, when the number of control target boards is increased, the predetermined time must be simultaneously adjusted for each control target board, so that the number of control target boards can be easily increased in response to the addition of batteries. Therefore, a configuration as described in claim 4 is adopted.

Further, in the present invention, as described in claim 5, the storage circuit is constituted by a shift register capable of outputting overflow data, that is, data which exceeds the storage capacity and which should overflow and be lost. Is also good.

With this configuration, serial data is sequentially transferred in synchronization with a clock pulse, overflow data is input to the shift register of the next control target substrate, and one bit is transmitted between each control target substrate. Serial data can be transferred. At this time, when one set of switches is controlled to be turned on / off by 1-bit data, a shift register having the same number of bits as the number of sets of switches included in each control target board may be provided on each control target board. .

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for monitoring an auxiliary power supply according to this embodiment will be described below. Reference numeral 1 in FIG. 1 indicates a monitoring method of the auxiliary power supply according to the present embodiment.

This auxiliary power supply 1 is a single CPU board 2
When, and four control target substrate 3 ₁ to 3 _4, the battery group 9, and a one voltage measuring device not shown in FIG.
The storage battery group 9 is configured by connecting 16 storage batteries not shown in FIG. 1 in series. This storage battery group 9
Are connected in parallel with the power supply voltage of the communication device generated from the voltage from the commercial power supply.

The CPU substrate 2 has a latch output terminal LS, a serial data output terminal SD, and a shift clock output terminal S
K, and has a serial data input terminal SI, and generates address data to be described later to generate a serial data output terminal S.
D.

The storage battery group 9 includes the signal line group 14₁~
14_FourTo be controlled 3₁~ 3_FourIs connected
Have been. These control target substrates 3₁~ 3_FourEach
And shift register 4₁~ 4_FourAnd the latch circuit 5₁~ 5
_FourAnd driver 6₁~ 6_FourAnd relay 7 ₁~ 7_FourAnd have
I have.

Each of the relays 7 _{1 to} 7 ₄ has two
It is assumed that four sets of switches are provided. FIG. 2 shows a relay 7 which is one of the relays 7 _{1 to} 7 _4.
1 shows a connection relationship between a storage battery group 9 and a voltage measuring device 20 not shown in FIG. Although 16 storage batteries are assumed to be connected in series in the storage battery group 9, FIG.
Shows only four of the battery 9 ₁ to 9 ₄ of the part.

[0041] During the relay 7 _1, eight switches S ₁₁ ~
_S42 is provided. Among them, one end of each of the switches S ₁₁ to S ₄₂ are the storage battery 9 ₁ via the signal line group 14 ₁
Are connected to the 9 ₄ the positive and negative terminals, and the other end is connected to the voltage measuring device 20. Then, switches S ₁₁ and S ₁₂ , switches S ₂₁ and S ₂₂ , switch S ₃₁ ,
Switches and S _32, the switch S _41, S _42, respectively become two in one set, a set of switches, when one turns on, the other is also turned on, among the storage battery 91 _to 93 _4, which is turned on Are connected to the voltage measuring device 20. This has been described only relay _71, but is configured similarly other relay 7 _{2-7 4.}

The switch on / off of the relay 7 _{1-7 4} is controlled by the driver ₆₁ through ₄ connected respectively via a signal line group _131-134 to the relay 7 _{1-7 4} You.

The driver 6 _{1-6 4,} latch circuit 5 ₁ to 5 ₄
With a constitutes a driver circuit 8 _{1-8 4} respectively, signal lines 1 connected respectively to each of the input
When data from the 2 _{1-12 4} is input, based on this data, it generates a control signal for turning on / off the switches of the relay 7 _{1-7 4,} via the signal line group _131-134 and it is configured to output to the relay 7 _{1-7 4} Te.

[0044] The driver ₆₁ through _4, the latch circuit via the signal line group 12 ₁ to 12 ₄ connected to each of the input 51 _to
5 ₄ are connected. These latch circuits 5 ₁
5 ₄ holds 4-bit data input from the signal line group 11 ₁ to 11 ₄ when the strobe signal is input, the driver ₆₁ through ₄ via the signal line group _131-134 It is configured to be able to output to.

[0045] This input side of the latch circuits 5 ₁ to 5 _4, the signal lines 11 ₁ to 11 ₄ via the first to fourth shift registers 41 _{to 4} are connected. First to fourth shift registers ₄₁ to _4, the clock input terminal ck1~ck
4 and data input terminals in1 to in4, respectively.

[0046] Each clock input terminal ck1~ck4 is connected via a signal line 10 ₃ in common to a shift clock output terminal SK, the clock input terminal ck1~ck4
, So that a shift clock can be input simultaneously.

Further, the first shift register 4 ₁ data input terminal in1 is connected to the serial data output terminal SD via the signal line 10 _2, a first shift register address data to be described later from the CPU board 2 It is configured to be output to the 4 _1.

The _first to _fourth shift registers 4 ₁ to 4 ₄
Here, it is assumed that the shift register is a 4-bit shift register. When data is input from each of the data input terminals in1 to in4, the data is transferred to each of the clock input terminals ck1 to ck4.
Can be sequentially transferred one bit at a time in synchronization with a shift clock pulse input from the input terminal H1, and data that overflows due to data transfer is not lost.
To H4.

The first to third shift registers 4 ₁ to 4 ₁ to 4
4 and ₃ of the output terminals H1-H3, and the second to fourth shift register 4 _{2-4 4} input terminals In2～in3, are respectively connected via a signal line 20 ₁ to 20 _3, the first the data output from the output terminal H1~H3 of to third shift registers ₄₁ to _3, and is configured to be transferred to the next stage of the shift register 4 _{2-4 4.}

[0050] Further, the output terminal H4 of the fourth shift register 4 ₄ is connected via a signal line 20 ₄ to serial data input terminal SI, data output from the shift register 4 _fourth output terminal H4 , Can be input to the CPU board 2 again.

The case where the voltages of the individual storage batteries in the storage battery group 9 are measured by the auxiliary power supply 1 having the above-described configuration will be described below. In the above-mentioned auxiliary power supply 1, the CP
It is assumed that no signal is output from the latch output terminal LS, the serial data output terminal SD, and the shift clock output terminal SK of the U substrate 2. In this case, not being any signal output from the output of the latch circuits 5 ₁ to 5 _4, since nothing is signal output from the driver ₆₁ through _4, the switch of the relay 7 _{1-7 4} Are all off.

When measuring the voltage of the storage batteries in the storage battery group 9, first, the CPU substrate 2 generates address data. Then, the shift clock output terminal SK, via the signal line 10 ₃ to the clock input terminal ck1~ck4 of each shift register ₄₁ to _4, the shift clock is input at the same time. Then, the first to fourth shift registers 4 ₁ to 4 ₁ to
All 4 ₄ can transfer data in the same manner in synchronization with the same shift clock.

Here, it is assumed that 16-bit address data has been generated. The 16-bit address data corresponds to the 16 storage batteries described above, one bit at a time. When the first clock pulse is output, the most significant bit of the address data becomes the first shift register 4.
Output to ₁ .

[0054] When the 1-4 th shift clock clock pulses are sequentially taken into the first shift register 4 ₁ shift clock input terminal ck1, address data in synchronism with the clock pulses of the shift clock, bit by bit The upper 4 bits of the transferred address data are transferred to the least significant bit of the _first shift register 41.

[0055] When the subsequent 5 th clock pulse is output, 5 bits of the address data is taken into the first shift register 4 _1, the first shift register 4 ₁ upper 2 bits - of the address data Five bits are retained.
At the same time, the most significant bit of the address data is transferred to the least significant bit of the _second shift register 42.

Subsequently, in synchronization with the output of the clock pulse, the address data is sequentially transferred bit by bit through the first and second shift registers 4 ₁ and 4 ₂ , and when the eighth clock pulse is output, Top 5 to 8 of address data
Bits are sequentially taken into the first shift register 4 _1, the upper 4 bits of the address data overflowed from the first shift register 4 ₁ is taken into the second shift register 4 _2.

Thereafter, the address data is sequentially transferred in the _first to _fourth shift registers 41 to 44 one bit at a time from the preceding stage to the subsequent stage in synchronization with the shift clock. Then, when the 16th clock pulse is output, the upper 4 bits of the address data become the fourth shift register 4 ₄
The upper 5-8 bits in the third shift register 4 _3,
The upper 9-12 bits ₂ second shift register 4, the upper 12 to 16 bits in the first shift register 4 _1, it is transferred, respectively.

[0058] During most significant bit of the address data from the first leading stage bit shift register 4 ₁ to enter the fourth last stage bit shift register 4 _4, the output terminals of the shift register 41 _{to 4} A1 to A4, B1 to B4, C1
-C4, from D1 to D4, but data to be constantly changed in synchronization with the shift clock is output, the strobe signal is not input to the latch circuits 5 ₁ to 5 ₄ During this time, therefore, the latch circuit 5 this data is not captured in the _{1-5 4.}

After the 16th clock pulse is output in this manner, the signal output from the latch output terminal LS to the signal line 10 is output.
Through _1, in the latch circuits 5 ₁ to 5 _4, the strobe signal is input.

[0060] When the strobe signal is input, the output terminals of the shift register ₄₁ to ₄ at that time Al to A4, B
1～B4, C1 -C4, data output from D1~D4 is simultaneously captured in the latch circuits 5 ₁ to 5 _4, from the latch circuits 5 ₁ to 5 _4, the signal line group 12 ₁ to 12 ₄ to the driver ₆₁ through ₄ connected through, and output simultaneously.

[0061] Each driver 6 _{1-6 4,} latch circuits 5 ₁ -
5 ₄ based on the input data from the relay 7 _{1-7 4}
It generates a control signal for specifying ON / OFF state of each switch in the relay 7 _{1-7 4} via the signal line group _131-134
Output to Based on this control signal, the relays 7 _{1 to} 7 ₄
The inside switch operates.

Assuming that only one bit of the 16 bits indicates the ON state, only one set of switches can be turned ON. Therefore, the voltage between the positive and negative electrodes of the storage battery connected to the set of switches that are turned on is transmitted to the voltage measuring device 20, and the voltage can be measured.

At this time, one of the 16 bits is "
"A, other bits are" 1 in the case of using a 0 1000000000000000 "" address data is "is the number of output clock pulse, held in each bit of each shift register 41 _{to 4} relationship between data is as shown in Table 1 below. the Table 1 shows the number of shift clocks, the relationship between the data held in each bit of the shift register ₄₁ to ₄ I have.

[0064]

[Table 1]

[0065] Table 1, each bit of each shift register ₄₁ to _4, serial data "10000000000
00000 "is sequentially transferred bit by bit in synchronization with the clock pulse.

[0066] Using such data, and the driver ₆₁ through _4, the data output from the shift register 41 _{to 4} via the latch circuits 5 ₁ to 5 ₄ are "1", "0 , When the switch set is turned on / off respectively, at the time when the 16th clock pulse is output, as shown in the bottom column of Table 1, the shift register 4 Only the data output from the output terminal D4 of the ₄ most significant bits is "1", and all other data are "0".

[0067] Thus, this time is "1" to turn on only one set of switches provided to the relay 7 ₄ input, all other switches are turned off, which is connected to a pair of switches turned on 1 The voltage of each storage battery can be measured.

After measuring the voltage of one storage battery in this way, new address data is generated in the CPU board 2,
When the new first clock pulse is output, the most significant bit of the new address data is transferred to the _first shift register 41. This time was taken to the most significant bit of the fourth shift register 4 ₄ most significant bits of the original address data overflows from the fourth shift register 4 _4, from the output terminal H4 to the serial data input terminal SI Is entered.

Thereafter, when a new second shift clock is sequentially output, the second bit data from the most significant bit of the new address data is input to the _first shift register 41 and sequentially transferred. together with the signal line 10 ₄ 2 bit of data in the original address data from the output terminal H4
Is input to the serial data input terminal SI.

Thus, the new address data is shifted.
The data is sequentially transferred in synchronization with the clock.
Circuit 5₁~ 5_FourAt the time when the strobe signal is output
Output contents until the next strobe signal is output.
Continue holding. Each driver 6 ₁~ 6_FourConnect to each
Latch circuit 5₁~ 5_FourRelay 7 based on the output of ₁
~ 7_FourSince the ON / OFF state of the middle switch is specified,
16 new clock pulses have been output
Each switch until the clock pulse is output
Are kept on / off.

In this way, the original address data is
Together is fed back to the PU substrate 2, the new address data, and transfers between the respective shift registers ₄₁ to _4, a new 1
6 th shift clock and outputs a new strobe signal after being output, the set of switches of the relay 7 _{1-7 4} is turned on, turned-on measuring the voltage of the connected new battery to the switch I do. By repeating the above measuring operation for the number of batteries, the voltages of all the storage batteries can be measured. When the voltage of the storage battery measured through the above operation is lower than a predetermined voltage, measures such as replacing the storage battery are taken.

As described above, the on / off state of the switch can be specified only by the contents of the serial data. Therefore, unlike the related art in which the control target board is identified by changing the setting of the dip switch 120, the circuit configuration is completely the same. it is possible to configure the auxiliary power supply 1 in the control object substrate 3 ₁ to 3 _4.

Therefore, for example, the number of storage batteries is reduced from 16 to 2
If zero to increase as, along with increasing the number of bits of the address data by the CPU board 1 is generated from 16 bits to 20 bits, the four control target substrate 3 ₁ to 3 _4, the control of the same structure One target board is added, the connection relationship of the signal lines between the control target boards is changed, and the strobe signal previously output with the 16th clock pulse is changed so as to be output with the 20th clock pulse. Can be addressed.

Therefore, even if the number of storage batteries is increased and the number of substrates to be controlled is further increased to cope with this,
It is not necessary to change the circuit design from the beginning by increasing the number of signal lines in the control target substrate as in the related art. For this reason, it is possible to easily cope with an increase or decrease in the number of batteries as compared with the related art.

[0075] Also, since the sequence is transferred to the control target substrate 3 ₁ to 3 ₄ address data as serial data, a signal line for transferring the address data can be reduced than the conventional number.

Furthermore, in the present invention, the last
Control board 3 to which the data was transferred_FourIs transferred
Address data from the output terminal H4 to the signal line 10_FourThrough
And re-input to the CPU board 2,
Data is the last control target board 3 _FourSuccessfully transferred until
Whether or not this can be confirmed on the CPU board 2 side.

In the above embodiment, the number of storage batteries is 16
However, the present invention is not limited to this, and any number of batteries may be used. In addition, the total number of switch sets is set to 16 which is the same as the number of storage batteries.
If the number is larger than the number of storage batteries, the voltages of all the storage batteries can be measured. Therefore, the number of substrates to be controlled may be set so that the total number of switches is larger than the number of storage batteries.

Further, when one voltage measuring device is used, the number of switches to be turned on needs to be limited to one set. However, the present invention is not limited to this, and when a plurality of voltage measuring devices are provided,
You may be comprised so that the switch of only the number of the voltage measuring devices may be turned on.

[0079]

According to the present invention, the number of signal lines required for address data transfer can be reduced. In addition, the circuit configuration of a plurality of control target substrates can be made exactly the same, and even if the number of batteries is increased and the number of substrates is increased to cope with this, the circuit in the control target substrate is correspondingly increased. There is no need to change the design. Further, the CPU board can confirm whether the address data has been correctly transferred to the last control target board.

[Brief description of the drawings]

FIG. 1 illustrates a configuration of an auxiliary power supply according to the present invention.

FIG. 2 shows a voltage measuring device of an auxiliary power supply of the present invention, a relay,
Diagram illustrating the connection relationship with the storage battery

3A is a diagram illustrating a configuration of a conventional auxiliary power supply. FIG. 3B is a diagram illustrating a configuration of a conventional control target board.

[Explanation of symbols]

1 ... auxiliary power 2 ... CPU board 3 ₁ to 3 ₄ ... control target substrate 41 _{to 4:} shift register 5 ₁ to 5 ₄ ... latch circuit ₆₁ through ₄ ... driver 7 _{1-7 4} ... relay 8 ₁ 8 ₄ … Driver circuit 9… Storage battery group (a plurality of storage batteries)
9 _{1 to} 9 ₄ … storage battery

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Masayoshi Murata 10-13 Minamimachi, Hanno City, Saitama Prefecture Inside the Handen Factory of Shindengen Kogyo Co., Ltd. (72) Inventor Toshiyuki Mori 10-13 Minamimachi, Hanno City, Saitama Prefecture New Inside the Hanno Factory of Dengen Kogyo Co., Ltd. (72) Inventor Tetsuro Murao 3-4-1 Shibaura, Minato-ku, Tokyo Inside NTT Facilities Co., Ltd. 4-1 Inside NTT Facilities Co., Ltd. (72) Inventor's book Yes 3-4-1 Shibaura, Minato-ku, Tokyo Inside 72 NTT Co., Ltd. (72) Inventor Yuji Kawagoe Tokyo 3-4-1, Shibaura, Minato-ku F-term in NTT Facilities Inc. (reference) 5G003 AA01 BA03 DA06 DA12 FA08 GC 05 5G015 FA18 HA16 JA34 JA56

Claims (5)

[Claims] 1. A battery having a plurality of storage batteries connected in series to each other, wherein when the plurality of storage batteries connected in series are connected in parallel to a voltage supplied from an exchange power supply, each of the storage batteries is discharged according to a load change. In the voltage monitoring method of the auxiliary power supply configured as described above, a voltage measuring device, a plurality of control target boards, and a CPU board for controlling the operation of each of the control target boards, A set of a predetermined number of switches, a driver circuit, a storage circuit, an input terminal, and an output terminal are provided, and the switches of each set include a measurement terminal of the voltage measuring device and a positive / negative of each of the storage batteries. The storage circuit, which is provided between the two electrodes, stores the serial data input from the input terminal for a predetermined time, and is configured to output the data having passed the predetermined time from the output terminal, The driver circuit according to a storage content of the storage circuit,
Each of the sets of switches is configured to be capable of changing a state of the switch. Each of the control target boards is connected in series. A voltage monitoring method for an auxiliary power supply, wherein the serial data is sequentially transmitted to a control target substrate on a side. 2. The control target substrate connected in series,
2. The voltage monitoring method of an auxiliary power supply according to claim 1, wherein an output terminal of the last control target board is connected to a data input terminal of the CPU board. 3. A voltage monitoring method for an auxiliary power supply according to claim 1, wherein said driver circuit has a latch circuit for holding a state of each of said switches. 4. A control circuit, wherein a strobe signal is simultaneously input from the CPU board to each of the control target boards, and the driver circuit on each of the control target boards receives the strobe signal when the strobe signal is input. 4. The voltage monitoring method of an auxiliary power supply according to claim 3, wherein the contents of the storage circuit on each control target substrate are reflected in the respective latch circuits. 5. The voltage monitoring method for an auxiliary power supply according to claim 1, wherein said storage circuit is constituted by a shift register capable of outputting overflow data.