JP2000058832A - Oxyzirconium nitride and/or hafnium gate dielectrics - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electric field-effect device considering a problem on the thickness of a gate dielectric. SOLUTION: An electric field-effect semiconductor device having a high permittivity oxyzirconium nitride (or hafnium)/gate dielectric and a forming method are provided. The device contains a silicon substrate 20 having a semiconductor channel area 24 formed in it. An oxyzirconium nitride gate dielectric layer 36 is formed on the substrate. Then, a conduction gate 38 continues. The oxyzirconium nitride gate dielectric layer 36 has are relative permittivity which is considerably higher than that of silicon dioxide.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

FIELD OF THE INVENTION The present invention relates generally to semiconductor device structures and methods for forming the same, and more particularly to such structures and methods relating to gate dielectrics of field effect devices formed on integrated circuits. I do.

[0002]

2. Description of the Related Art Semiconductor devices such as field effect transistors are common in the electronics industry. Such devices can be formed with very small dimensions,
Thousands or millions of these devices are formed on a single crystal silicon substrate, or "chip," interconnected,
An integrated circuit such as a microprocessor can perform useful functions.

[0003] Although the design and fabrication of transistors is a very complex task, the overall structure and operation of the transistor is relatively simple. FIG. 1 shows a simplified field effect transistor in cross section. In a field effect transistor, the portion of the substrate (ie, epilayer) near the surface is referred to as a channel 120 during processing. Channel 1
20 is electrically connected to the source 140 and the drain 160 such that current flows through the channel 120 when there is a voltage difference between the source 140 and the drain 160. The semiconducting properties of the channel 120 change so that the resistivity can be controlled by the voltage applied to the gate 190, which is the conductive layer on the channel 120. Thus, by changing the voltage at the gate 190, more or less current can flow through the channel 120. Gate 190 and channel 120
Are separated by a gate dielectric 180. The gate dielectric is insulating and during operation, little or no current flows between gate 190 and channel 120 (although "tunnel" currents are seen with thin dielectrics).
However, the gate dielectric does not allow the gate voltage to
Electric field can be induced, which is the name of the "field effect transistor".

In general, the performance and density of integrated circuits
It can be increased by "scaling", i.e., by reducing the dimensions of the individual semiconductor devices on the chip. Unfortunately, field effect semiconductor devices produce an output signal that is proportional to the channel length, and the output is reduced by scaling. In general, this effect has been compensated for by reducing the thickness of the gate dielectric 180, thereby bringing the gate closer to the channel and increasing the field effect.

[0005] As devices are scaled to smaller dimensions, the thickness of the gate dielectric continues to shrink. Although it is possible to further scale the dimensions of the device, scaling the thickness of the gate dielectric has almost reached a practical limit for the conventional gate dielectric, silicon dioxide. Further scaling the thickness of the silicon dioxide gate dielectric can have many problems, such as high current leakage due to direct tunneling through the oxide. Since such layers are literally formed from only a few atomic layers, stringent process control is required to produce such layers with reproducibility. Coating uniformity is also important because device parameters can vary greatly based on the presence or absence of one single layer of dielectric material. Finally, such thin layers have poor diffusion barriers for impurities.

[0006] With the understanding of the limitations of silicon dioxide, researchers are looking for alternative dielectric materials that have similar field effect performance when formed in a thicker layer than silicon dioxide. This performance is often referred to as "equivalent oxide thickness". Alternative materials, even thicker, have the same effect as a much thinner layer of silicon dioxide (commonly referred to simply as "oxide"). Many of the alternatives that are likely to achieve low equivalent oxide thickness are metal oxides such as, if not most, tantalum pentoxide, titanium dioxide, and barium strontium titanate.

Researchers have found that forming such a metal oxide as a gate dielectric is problematic. At typical metal oxide deposition temperatures, the oxidizing atmosphere or oxygen-containing precursor required to form them has a tendency to oxidize the silicon substrate, causing oxidation at the interface between the substrate and the gate dielectric. A material layer is generated. The presence of this boundary oxide layer increases the actual oxide thickness and reduces its effectiveness as an alternative gate dielectric approach. The presence of an interfacial oxide layer severely limits the performance of alternative dielectric field effect devices.

[0008]

SUMMARY OF THE INVENTION The present invention provides a semiconductor device structure using either zirconium oxynitride or hafnium oxynitride gate dielectric and a method of fabricating the same. The method also includes a gate dielectric formed from an oxynitride of a mixture of Zr and Hf.
In accordance with the present invention, the zirconium oxynitride (or hafnium) gate dielectric has a dielectric constant that is greater than the dielectric constant of either a conventional thermal process silicon dioxide or silicon nitride dielectric. Can be formed. Thus, this metal oxynitride (Zr or Hf) dielectric layer can have an equivalent field effect even though it is substantially thicker than a conventional gate dielectric. Further, the presence of nitrogen in at least a portion of the thickness of the gate dielectric helps to prevent boron from diffusing into the channel region, such as from a boron-doped polysilicon gate electrode.

Previous investigators have attempted to avoid nitrogen-based compounds in the gate dielectric. In addition, researchers manufacturing integrated circuits tend to hesitate to add new materials, especially new material types, to mass-produced integrated circuits before investigating.
Nevertheless, from our investigations, HfO _x N _y and Z
Since rO _x N _y (having a relatively low N level) is the second most stable after Si, there is no reaction to form SiO ₂ (the silicon oxidation reaction is at least minimized to the extent that the dielectric properties are not substantially degraded) To be done).
Combining this, and the ability to achieve high permittivities, with our work to understand the silicon / oxynitride interface, we have developed zirconium oxynitride and hafnium oxynitride gate dielectrics. We can recognize that it is available.

In one embodiment, the dielectric layer has a large oxynitride compound near the silicon interface, while the upper portion of the oxynitride layer has a large zirconium compound so that the oxynitride layer has a large zirconium compound. A zirconium nitride (or hafnium) layer is formed. Such a structure allows first silicon / oxynitride bonding of the silicon interface with an acceptable interface state density. However, zirconium and / or hafnium contained in the oxynitride layer can significantly increase the dielectric constant of the coating. The present invention also provides an amorphous gate dielectric, which has a dense microstructure and avoids many of the problems associated with grain boundaries in polycrystalline dielectrics.

In one aspect of the present invention, there is typically provided a single crystal silicon substrate including a structure such as a channel region, a metal oxynitride gate dielectric layer formed on the substrate,
A method for fabricating a semiconductor device is disclosed that includes forming a conductive gate overlying the gate dielectric layer. The metal may be Zr, hafnium, or a mixture of the two. Suitable underlying layers for metal oxynitride layers include bare silicon, silicon oxynitride, and other passivated Si layers such as hydrogen terminated Si. These other deactivation schemes may require removal of the deactivator prior to formation of the zirconium oxynitride.

One approach based on zirconium is to form zirconium on a substrate and anneal the metal formed in an atmosphere containing oxygen and nitrogen, thus forming a metal oxynitride layer on the substrate. A zirconium oxynitride dielectric layer is formed. In some embodiments, the atmosphere comprises NO or a remote nitrogen / oxygen plasma.

In another zirconium-based approach, zirconium is formed on a substrate and nitrogen or NH in atomic state is
_A zirconium oxynitride dielectric layer is formed by annealing a metal formed in a non-oxidizing atmosphere containing nitrogen, such as _3, and annealing this zirconium nitride layer in oxygen to form a zirconium oxynitride layer. .

In another zirconium-based approach, zirconium or hafnium is deposited on a substrate in an atmosphere containing oxygen and nitrogen, thus forming a metal oxynitride layer on the substrate, thereby forming a zirconium oxynitride (or A hafnium) dielectric layer is formed. In some embodiments, the atmosphere containing NO or N ₂ O.

[0015]

An embodiment of the present invention will be described with reference to the drawings. In this application, examples are described for the case of zirconium oxynitride dielectric. However, because of their chemical similarity, hafnium can be used instead of zirconium in most of these embodiments. Further, a hafnium-zirconium mixture can be used instead. In some embodiments, such a mixture is substantially pure Zr or Hf and contains only small amounts of Hf or Zr. Overall, both zirconium oxynitride and hafnium oxynitride have a high dielectric constant and good chemical stability. In some embodiments, Zr may be preferred due to its availability and low cost. However, hafnium oxynitride has a somewhat higher dielectric constant than zirconium oxynitride and is even more stable. Due to this slight difference in performance,
For some applications, hafnium oxynitride may be preferred.

The preferred embodiment of the present invention can be fabricated on a silicon substrate, as described herein. Although not required to practice the present invention, Si (1
00) It is common to use a substrate. In the description of these embodiments, as shown in FIG. 2, an optional epitaxial Si layer 22 is formed on a substrate 20 and an active channel region is formed in the epitaxial layer 22 (or the substrate 20 when an epi layer is not used). It starts after you hit 24. In this description, it is assumed that a protective or natural silicon oxide region 26 (preferably composed of less than 1 nm of oxide) overlaps the channel 24 within the region of interest. Such a silicon oxide layer has a thickness of -10 ^-3 Torr.
Clean substrate 600-700 in oxygen atmosphere of r
It can be formed by heating to about 30 seconds. All processes that reach this step during manufacture are well known in the prior art, as well as the various equivalent cases in which the present invention can be used.

The particular embodiment used to form the zirconium oxynitride gate dielectric may be used to form a boundary silicon oxynitride layer where a silicon oxide region 26 is left in place. It has been removed or removed so that it can be used to form a dielectric layer directly on the underlying silicon to reduce the interaction of the substrate in the zirconium oxynitride deposition process. Decide whether to replace it with a passivation layer designed to suppress it.

The description that immediately follows relates to the preparation of the substrate for depositing the material forming the oxynitride, which can be used in the particular embodiment described hereinafter. When removing the silicon oxide region 26, the present invention has two preferred starting surfaces. Remove area 26,
Leave a clean, bare upper surface 28 as shown in FIG. 3 or a hydrogen terminated surface 2 as shown in FIG.
Leave 8. If the oxide region 26 is to be removed, then a particular process may be used, for example, in an ultra-high vacuum (less than -10 ^-8 Torr) to a point where exposure to oxygen is acceptable, resulting in a highly reactive bare If the chemical reaction on the Si surface can be prevented, the exposed surface is more preferable than the hydrogen-terminated surface. If not, the bare Si surface should be terminated with a suitable deactivator, such as hydrogen, which inhibits re-oxidation, and can still be easily removed at a suitable point during the process.

It is believed that the method of oxide removal is not critical to the practice of this invention as long as a clean, oxide-free surface 28 can be maintained until the overlying deposition is performed. I have. One preferred method of performing oxide 26 removal is by exposure to wet HF, for example, immersing the substrate in dilute HF for 30 seconds and rinsing with deionized water. This removes the native oxide and terminates the surface with hydrogen. Another preferred method is by exposure to HF vapor. This gives similar results, but can be used, for example, in a cluster tool to further prevent re-oxidation or contamination of the surface. Either of these schemes may use other suitable stripping chemicals, but is preferred as the last step to terminate the HF or NH ₄ F solution.

Several other methods result in an unterminated surface 28, as shown in FIG. One such method that is particularly used for the cluster tool approach is flux desorption with a Si flux.
Lower than 10 ^-8 Torr, at 780 ° C, preferably 1.
It has been found that the use of 5 ° / sec Si flux for about 600 seconds not only removes native oxide, but also creates an atomically smooth step surface that may have advantages as an ultra-thin gate dielectric. Alternative is a simple desorption by heating the substrate to a high temperature in a vacuum or H ₂ atmosphere. However, S
It is considered that an excellent surface structure can be obtained by the i-flux method. In this one manner, until the deposition overlapping therewith completed, and does not keep the substrate in ultra-high vacuum, for example by exposure to hydrogen of the generated atomic state by the hot filament plasma or H ₂ in the atmosphere, the surface 2
8 may be hydrogen terminated.

Surface 28 can also be passivated using an ultra-thin layer such as silicon nitride or a silicon oxynitride layer that is not strictly an oxide of silicon. Such a layer acts as a diffusion barrier, causing the substrate to have oxidation resistance during the formation of the overlapping layers. When using an oxynitride layer, the preferred method of oxynitridation is exposure to NO. This layer preferably has a thickness of less than 1 nm, more preferably less than 0.5 nm. For reasons that are not well understood, this ultra-thin passivation layer significantly reduces oxidation of the silicon substrate during formation of the oxygen-carrying gate dielectric.

It is difficult to measure the actual dielectric constant of the oxynitride layer, but it is believed to be in the range of 5 to 6. A thickness of less than 0.5 nm is even more preferred to reduce the effect of the relatively low dielectric constant of the passivation layer on equivalent oxide thickness. It may be advantageous to post-anneal the NO-formed oxynitride layer in an atmosphere that supplies atomic nitrogen because nitrogen introduction is considered important to use the oxynitride layer as an oxidation barrier .

Oxynitrides made by other methods are not considered to have sufficient oxidation resistance to complete some of the gate dielectric structures described herein at the required thickness; And / or requires higher process temperatures and is therefore not preferred. For example, the N ₂ O process takes much less N than the NO process. NH ₃ process requires the SiO ₂ film already exist, therefore, with NH _3, it is believed to be difficult to achieve a uniform sub-nanometer oxynitride film. In addition, NH ₃ annealing introduces undesirable hydrogen into the coating structure.

A typical N which can be used in the present invention
The O process is as follows. Clean the board,
Remove pad oxide. As the last step of this cleaning, the substrate is immersed in diluted HF for 30 seconds and washed with deionized water. Thereafter, the substrate is placed in a reaction chamber, and the reaction chamber is evacuated to 3 × 10 ⁻⁸ Torr, and then the substrate is placed in a reaction chamber.
The substrate is heated to 00 ° C. to remove a portion of hydrogen inactivation from the surface of the substrate. The substrate is heated to 700 ° C. and 4 Torr of N
O is introduced into the chamber for 10 seconds to form an oxynitride passivation layer. FIG. 5 shows a passivation layer 30, for example, typically an oxynitride, but in some cases may be a nitride passivation layer.

Once the substrate is prepared to have a clean Si surface, an oxide layer, or a protective barrier layer as described above, the substrate may be prepared by one of several methods. A zirconium oxynitride (or hafnium) gate dielectric is formed thereon. Some of these methods are described below.

In the present invention, zirconium oxynitride and hafnium oxynitride are selected for their stability and higher dielectric constant next to silicon. Based on silicate and oxide data, the heat of formation (heat of formation) of these metal oxynitrides is more negative than the heat of formation of silicon dioxide,
Its dielectric constant is believed to be higher than SiO ₂ or silicon nitride. This should form a more stable gate structure and avoid the selective formation of borderline silicon dioxide. Table 1 lists the heats of formation, dielectric constants, and band gaps of some materials, including silicon dioxide for comparison.

[0027]

Table 1 Material Dielectric constant of bulk Material Band gap heat of formation (kcal (eV) / g / O atom) Y ₂ O ₃ 12 -152 CaO 7 -152 MgO 9.6 7.8 -144 La ₂ O ₃ 30-143 SrO 5.8-142 Ca ₃ SiO ₅ -138 Sc ₂ O ₃ -137 Ca ₂ SiO ₄ -135 HfO ₂ 40 -134 ZrO ₂ 257.8 -131 CeO ₂ 26 -129 Al ₂ O ₃ 108.7 -125 Ba ₂ SiO ₄ -124 CaSiO ₃ -123 SrSiO ₃ -123 Mg ₂ SiO ₄ -122 Na ₂ SiO ₃ -121 BaSiO ₃ -120 MgSiO ₃ -119 ZrSiO ₄ -115 CeSiO ₄ -115 Bi ₄ Si ₂ O ₁₂ 35-75 TiO ₂ 30 3-3.5-110 SiO ₂ 3.9 8.9-9.3-103 Ta ₂ O ₅ 26 4.5 -100 ZnO 4.6 3.3 -84 WO 3 42 -66.9 CuO -37.6 PdO -21

Zirconium oxynitride can be formed as either a polycrystalline or amorphous coating. Generally, a polycrystalline film has a higher relative dielectric constant. However, amorphous coatings generally have higher dielectric breakdown performance, better diffusion barriers, and lower boundary density of states. In addition, in many embodiments of forming zirconium oxynitride dielectrics according to the present invention, forming an amorphous coating is more desirable for the stoichiometric uniformity required of the polycrystalline coating. It may be easier than forming.

[0029]

Embodiment 1 In one embodiment according to the present invention, Zr or Hf is deposited on a clean Si surface, the metal is oxynitrided, and the structure is annealed to form a zirconium oxynitride or hafnium gate. A dielectric is formed. In this embodiment, a substrate as shown in FIG. 3 or FIG. 4 is used. If the surface 28 is to be hydrogen passivated as shown in FIG. 4, the substrate can be briefly heated to a temperature above 500 ° C. in a vacuum or inert atmosphere to remove the passivated portions.

Referring to FIG. 6, a metal layer 32 is deposited directly on a substrate 28 by, for example, sputtering, vapor deposition, chemical vapor deposition (CVD), or plasma CVD.
(For example, zirconium). The figure shows that surface 28 is the surface of channel region 24. However, forming the metal oxynitride layer on the surface of the epitaxial layer 22 or the substrate 20 follows the same method. In the following description, layers 20 and 24 are used interchangeably, except for the case where they are distinguished from the context of the text.

The deposition by sputtering is preferably performed using a low energy plasma apparatus such as collimated sputtering or long throw sputtering. Low deposition rates (eg, on the order of a few Angstroms per second) may be beneficial due to the low total thickness of the deposit and the desire for uniformity. For an 8 "wafer, the base pressure is ~ 10 ^-8
The deposition can be completed in an apparatus with Torr, operating pressure of -10 ^-3 Torr, and a separation of 16 inches between the sputtering gun and the wafer, and rotating the wafer to improve uniformity. Is also good. Ar is an acceptable sputtering gas and the wafer can be kept at a temperature of 400-600 ° C during deposition.

Instead of sputtering, 500-6
On a substrate at 00 ° C., by evaporation from an electron beam source,
The metal layer 32 can be deposited, with a net deposition rate on the order of 1/10 to several Angstroms per second. Preferably, the substrate is rotated to improve uniformity.

Another alternative is CVD or plasma CVD using suitable precursors such as zirconium tetrachloride (or hafnium tetrachloride) and hydrogen gas.
Zirconium (or hafnium) precursors that carry nitrogen, such as Zr nitrate (or Hf), are also acceptable. Again, lower deposition rates and temperatures (600 ° C. and below) may be useful in such methods, and downstream plasma reactors are preferred over reactors that generate plasma on a substrate.

Referring to FIG. 8, the metal layer 32 is converted to a zirconium oxynitride (or hafnium) layer 36 by oxynitridation. Insufficient oxynitriding during this step reduces resistance and diffusion resistance, while excessive oxynitriding reduces the capacitance on layer 36 (due to oxidation of the underlying silicon), Process control is important. Several processes can be used for this step. Metal, by direct exposure to an oxygen / nitrogen atmosphere, such as NO or N ₂ O, can be converted to oxy-zirconium nitride (or hafnium). Alternatively, a low-temperature remote N ₂ / O ₂ plasma can be used.

One alternative to direct conversion in an oxynitriding atmosphere is nitridation of nitrogen (preferably) or NH _{3 in} a remote plasma nitrogen atmosphere followed by oxidation. Low temperature O ₂ anneal with or without UV exposure,
Activated oxygen anneal such as O _3, O ₃ with ultraviolet exposure, downstream O ₂ plasma, N ₂ O, or a direct current biased many oxygen annealing process, such as low-temperature O ₂ plasma to the substrate This step Available to As an example of this last process, 基板 60 V DC and 13.56M while applying He backside cooling to the substrate at 80 ° C.
Hz or 300 kHz RF applied to the substrate,
A downstream 1500W ECR source operating at orr can be used. The processing time is determined experimentally so that both resistivity and relative permittivity are within acceptable ranges.

In general, the high temperature anneal of the zirconium oxynitride (or hafnium) layer 36 is selected to densify or crystallize the coating after low temperature oxynitridation. For example, the substrate can be made dense by annealing in Ar at 750 ° C. for 20 seconds. This annealing can be performed in an inert or reducing atmosphere,
A reducing atmosphere is particularly useful if the metal layer 32 is deposited by CVD using halogen. If a reducing atmosphere is used, another low temperature post anneal in oxygen can be used to improve the dielectric properties of the zirconium oxynitride (or hafnium) layer 36.

Finally, referring to FIG. 9, a conductive gate 38 is deposited over the zirconium oxynitride gate dielectric 36. The process of depositing gate 38 is well known. Gate 38 may be formed, for example, of doped polysilicon, metal, or conductive metal oxide.

In another scheme, the polysilicon gate is:
An additional passivation layer is often required between the dielectric 36 and the gate 38 to prevent reduction of the dielectric 36 and oxidation of the gate 38 at the interface. Although the passivation layer is acceptable, the reaction of the underlying zirconium silicon oxynitride with polysilicon tends to form a boundary zone of zirconium silicon oxynitride, which does not destroy the dielectric properties of the layer . Many of the advantages of compatibility obtained at the lower interface are also applicable to the upper interface. Further, nitrogen in the dielectric 36 is
When the gate is doped, the migration of boron through the dielectric 36 to the substrate 20 is greatly reduced.

[0039]

Embodiment 2 In a second embodiment of the present invention, zirconium (or hafnium) is deposited on a substrate in an oxygen / nitrogen atmosphere, and annealing is performed.
A zirconium oxynitride (or hafnium) gate dielectric is formed. This embodiment preferably utilizes a substrate prepared by one of the methods corresponding to FIGS. 2, 3, or 4, and the metal is deposited by one of the methods described in Example 1. Yes, but with the following differences:

Referring to FIG. 10, a zirconium oxynitride layer 40 is formed on a clean Si surface by sputtering Zr or Hf as described above.
Can be deposited. However, using some amount of controlled oxygen and nitrogen activity, layer 40 is at least partially oxidized-nitrided when zirconium is provided to the substrate. For example, during sputtering with Ar, NO or N ₂ O may be introduced near the substrate, such that the flow rate of NO is approximately 1/10 of the flow rate of Ar. At a metal deposition rate of 0.1 nanometers per second, the oxynitriding gas is preferably introduced 0 to 5 seconds after the start of the deposition process. This delay time (if any) helps prevent the formation of a borderline SiO ₂ layer.

When zirconium is provided by a vapor deposition method, the oxynitriding gas is preferably added near the substrate. To achieve near perfect oxynitridation of the deposited metal, ~ 5-10 Torr NO can be used for a metal deposition rate of 0.1 nm / sec. If a CVD method is used, the necessary oxygen (eg, zirconium tetrachloride and water) should be supplied by a suitable precursor, and nitrogen can be supplied. For precursors that do not carry nitrogen, remote nitrogen plasma, NO, N ₂
O, or nitrogen can be supplied by nitriding after deposition of a nitrogen source using as NH _3.

This zirconium oxynitride layer tends to react with the underlying Si (during deposition or during subsequent fabrication steps), but the resulting zirconium oxynitride-silicon boundary layer is critical for most applications. Is not a problem.

In some embodiments, it may be desirable to increase the thickness of the zirconium silicon oxynitride layer at this boundary. In this manner, the reaction between zirconium oxynitride and the underlying layer can create a graded layer. One variation of this method is shown in FIG. 12, where a layer 40 is deposited over the silicon oxynitride layer 30. In such an embodiment, oxygen / nitrogen activity during the anneal may be reduced, and “stolen” oxygen, nitrogen, and silicon from layer 30 and / or
By "applying" Zr to the silicon oxynitride layer 30, the boundary zirconium silicon oxynitride silicon layer 36
Can be formed. The slope of the structure is that layers 30 and 4
It can be adjusted by adjusting the relative initial thickness of zero.

Another method for forming a thicker zirconium oxynitride-silicon boundary layer is to initiate NO before metal deposition. In this manner, the initial NO begins to form a thin silicon oxynitride layer.
The introduction of the metal starts the formation of the zirconium oxynitride layer. After annealing, diffusion forms a silicon oxynitride boundary layer. By changing the time before the start of metal deposition, the thickness and slope of the boundary layer can be changed.

[0045]

Embodiment 3 In a third embodiment of the present invention, a metal oxide is deposited on a substrate and then nitrided,
A zirconium oxynitride (or hafnium) dielectric is formed. This method may work better than the silicide approach described above because the deposited layer is not in a highly reduced (ie, oxygen starved) state.

The oxynitride formed according to this embodiment can be formed on a substrate prepared according to FIG. 3, 4, or 5.

Referring to FIG. 7, a zirconium oxide layer 50 is deposited on a clean Si surface by sputtering a metal oxide such as ZrO ₂ or HfO ₂ . 500-600 instead of sputtering
At ° C, the net deposition rate is on the order of 1/10 to several Angstroms per second, and this metal oxide layer 50 can be deposited on a substrate by evaporation. Preferably, the substrate is rotated to improve uniformity.

Referring now to FIG. 11, the partially reduced zirconium oxide layer 50 is converted to a zirconium oxynitride layer 52 by nitridation. In this way, we often prefer nitriding with a remote plasma of nitrogen. However, some technicians prefer exposure to NO, sometimes found acceptable results by nitridation in N ₂ O or NH _3.

Post anneal of O ₂ at about 400-500 ° C. for up to about 30 minutes results in a gradual increase in capacitance while maintaining low leakage current. Higher temperatures or longer anneals tend to reduce capacitance. Low O ₂ anneal with or without UV exposure, or activation oxygen anneal such as O _3, O ₃ with ultraviolet exposure, downstream O ₂ plasma, N ₂ O cold O ₂ or for DC biased substrate, Numerous oxygen anneal processes such as plasma are available for this step. As an example of this last process, 基板 60 V DC and 13.
Apply 56MHz or 300kHz RF to the substrate,
A downstream 1500 W ECR source operating at 1 mTorr can be used. The processing time is determined experimentally so that both the resistivity and the relative permittivity are within acceptable ranges.

As described in the first embodiment, it may be desirable to perform annealing after formation.

In the manner described above, it may be desirable to slow the reaction between zirconium oxynitride (or hafnium) and the underlying silicon. In these cases, as described above, it may be helpful to first form a thin silicon oxynitride layer on the silicon surface.
Thereafter, a zirconium oxynitride silicon layer can form this passivation layer by one of the methods described above.

The present invention is not limited to the specific embodiments described herein. Although specific substrates and specific device types have been described herein for clarity, the present invention generally uses the field effect of the overlying conductive region to modify the semiconductive properties of the active region. , Si-based devices. Various other combinations of the described steps can be used to produce zirconium oxynitride (or hafnium) gate dielectrics, which are intended to be included within the scope of the present invention.

The above disclosure has concentrated on gate dielectrics. However, if the leakage current is appropriately small, most gate dielectrics can be used as storage dielectrics in memory cells. Note that in general, the memory dielectric is not suitable for use as a gate dielectric. This lack of suitability is due to the more demanding interface properties that gate dielectrics typically require. For zirconium oxynitride (or hafnium) dielectrics, increasing the oxidation time (ie, the oxygen content of the metal oxynitride) can reduce leakage current to an acceptable level. With this increase in oxygen content, the dielectric constant of the overall structure is slightly reduced, but the relative dielectric constant as a whole is still significantly higher than current technology. It should be noted that the physical vapor deposition (PVD) methods described above (sputtering and vapor deposition) typically do not yield highly conformal layers. Therefore, when using one of the above mentioned PVD methods for use as a storage dielectric, it is impractical to use this in shapes with increased surface area, such as rough polysilicon. Sometimes. However, the high dielectric constant of zirconium oxynitride allows those skilled in the art to produce useful high energy storage and capacitance capacitors without the need to increase the complex surface area.

With respect to the above description, the following section is further disclosed. (1) A method of manufacturing a field effect device on an integrated circuit, comprising providing a single crystal silicon substrate, forming a metal oxynitride gate dielectric layer on the substrate, the metal comprising hafnium, zirconium, and A method comprising forming a conductive gate selected from the group of those mixtures and overlying the gate dielectric layer. (2) The method according to paragraph 1, wherein the substrate includes a clean Si surface immediately before the step of depositing. (3) The method according to (1), wherein the step of forming the metal oxynitride dielectric layer comprises: forming a metal on the substrate;
The metal is selected from the group of hafnium, zirconium, and mixtures thereof, and annealing the formed metal in an atmosphere containing oxygen and nitrogen, thereby forming a metal oxynitride layer on the substrate. Including methods. (4) The method according to item 3, wherein the atmosphere is:
A method comprising a nitrogen / oxygen plasma, wherein the plasma is generated remotely from the substrate. (5) The method according to (1), wherein the step of forming the metal oxynitride dielectric layer comprises forming a metal oxide on the substrate, the metal comprising hafnium oxide, zirconium oxide, and A method selected from the group of the mixtures and comprising annealing the formed metal oxide in an atmosphere containing nitrogen, thereby forming a metal oxynitride layer on the substrate.

(6) The method according to paragraph 5, wherein the atmosphere includes a nitrogen plasma, and the plasma is generated away from the substrate. (7) The method according to (1), wherein the step of forming the metal oxynitride dielectric layer comprises: forming a metal on the substrate;
The metal is selected from the group of hafnium, zirconium, and mixtures thereof, and annealing the formed metal in a non-oxidizing atmosphere containing nitrogen, thereby forming a metal nitride layer on the substrate, A method comprising annealing a metal layer in an oxidizing atmosphere, thereby forming a metal oxynitride layer on a substrate. (8) The method of claim 1, wherein forming the metal oxynitride dielectric layer comprises depositing a metal on the substrate in an atmosphere including oxygen and nitrogen, the metal comprising hafnium. , Zirconium, and mixtures thereof. (9) The method according to (3), (5) or (8), wherein the atmosphere contains NO.

(10) The method according to item 1, wherein
The step of forming a metal oxynitride dielectric layer comprises forming a silicon oxynitride layer on the substrate, depositing the metal on the silicon oxynitride layer in an atmosphere containing oxygen and nitrogen, thereby forming an oxynitride on the substrate. A method comprising forming a metal nitride layer, wherein the metal is selected from the group of hafnium, zirconium, and mixtures thereof. (11) The method according to (10), wherein the forming of the silicon oxynitride layer comprises exposing the substrate to a first atmosphere containing oxygen and nitrogen, and depositing the metal comprises: A method comprising starting within 5 seconds of the start. (12) The method according to (1), wherein the step of forming a metal oxynitride dielectric layer includes forming a silicon oxynitride layer on the substrate, and depositing a metal on the silicon oxynitride layer. Forming, wherein the metal is selected from the group of hafnium, zirconium, and mixtures thereof, wherein the formed metal is annealed in an atmosphere comprising oxygen and nitrogen, thereby forming a metal oxynitride layer. (13) The method according to (1), wherein the step of forming the metal oxynitride dielectric layer includes forming a silicon oxynitride layer on the substrate, and forming a metal on the silicon oxynitride layer. Forming the metal, wherein the metal is selected from the group of hafnium, zirconium, and mixtures thereof, and annealing the formed metal in a non-oxidizing atmosphere comprising nitrogen;
Thereby forming a metal nitride layer on the silicon oxynitride layer and annealing the metal nitride layer in an oxidizing atmosphere, thereby forming a metal oxynitride layer on the silicon oxynitride layer.

(14) An integrated circuit having a field effect device formed therein, wherein the field effect device is:
A single crystal silicon semiconductive channel region, a metal oxynitride gate dielectric overlying the channel region, and a conductive gate overlying the gate dielectric, wherein the metal is hafnium;
An integrated circuit selected from the group of zirconium and mixtures thereof. (15) First, 3, 5, 7, 8, 10, 13, or 1
The method of claim 4, wherein the metal is substantially pure zirconium. (16) The integrated circuit according to item 14, wherein the gate dielectric is polycrystalline. (17) The integrated circuit according to item 14, wherein the gate dielectric is amorphous. 18. The integrated circuit of claim 14, further comprising a metal oxynitride boundary layer between the metal oxynitride gate dielectric and the silicon channel region. (19) The integrated circuit of clause 18, wherein the conductive gate comprises polysilicon and further comprising a metal oxynitride silicon boundary layer between the metal oxynitride gate dielectric and the polysilicon conductive gate. circuit.

(20) A field effect semiconductor device having a high dielectric constant zirconium oxynitride (or hafnium) gate dielectric and a method of forming the same are disclosed. The device includes a silicon substrate 20 having a semiconductive channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over the substrate, followed by a conductive gate 38. Zirconium oxynitride
Gate dielectric layer 36 has a dielectric constant significantly higher than that of silicon dioxide.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a typical prior art integrated circuit field effect transistor.

FIG. 2 is a cross-sectional view of a semiconductor device illustrating one surface suitable for depositing a zirconium oxynitride gate dielectric in accordance with the present invention.

FIG. 3 is a cross-sectional view of a semiconductor device illustrating another surface suitable for depositing a zirconium oxynitride gate dielectric in accordance with the present invention.

FIG. 4 is a cross-sectional view of a semiconductor device illustrating another surface suitable for depositing a zirconium oxynitride gate dielectric in accordance with the present invention.

FIG. 5 is a cross-sectional view of a semiconductor device illustrating another surface suitable for depositing a zirconium oxynitride gate dielectric in accordance with the present invention.

FIG. 6 is a cross-sectional view of a semiconductor device during manufacture according to one embodiment of the present invention.

FIG. 7 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

FIG. 8 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

FIG. 9 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

FIG. 10 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

FIG. 11 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

FIG. 12 is a cross-sectional view of a semiconductor device during manufacture according to another embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 20 substrate 22 epitaxial layer 24 channel 36 zirconium oxynitride (or hafnium) layer 38 gate

 ──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Glendi. Wilk United States Texas, Dallas, Markville Drive 9050, number 821

Claims (2)

[Claims] 1. A method of manufacturing a field effect device on an integrated circuit, comprising: providing a single crystal silicon substrate, forming a metal oxynitride gate dielectric layer on the substrate, the metal comprising hafnium, zirconium. And a mixture thereof, comprising forming a conductive gate overlying the gate dielectric layer. 2. An integrated circuit having a field effect device formed therein, the field effect device comprising: a single crystal silicon semiconductive channel region; a metal oxynitride gate dielectric overlying the channel region; An overlying conductive gate, wherein the metal is selected from the group of hafnium, zirconium, and mixtures thereof.