JP2000056970A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2000056970A5 JP2000056970A5 JP1998223813A JP22381398A JP2000056970A5 JP 2000056970 A5 JP2000056970 A5 JP 2000056970A5 JP 1998223813 A JP1998223813 A JP 1998223813A JP 22381398 A JP22381398 A JP 22381398A JP 2000056970 A5 JP2000056970 A5 JP 2000056970A5
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- data
- pseudo
- address
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22381398A JP3741870B2 (ja) | 1998-08-07 | 1998-08-07 | 命令及びデータの先読み方法、マイクロコントローラ、疑似命令検出回路 |
| US09/266,869 US6895496B1 (en) | 1998-08-07 | 1999-03-12 | Microcontroller having prefetch function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22381398A JP3741870B2 (ja) | 1998-08-07 | 1998-08-07 | 命令及びデータの先読み方法、マイクロコントローラ、疑似命令検出回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000056970A JP2000056970A (ja) | 2000-02-25 |
| JP2000056970A5 true JP2000056970A5 (enExample) | 2005-02-17 |
| JP3741870B2 JP3741870B2 (ja) | 2006-02-01 |
Family
ID=16804132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22381398A Expired - Lifetime JP3741870B2 (ja) | 1998-08-07 | 1998-08-07 | 命令及びデータの先読み方法、マイクロコントローラ、疑似命令検出回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6895496B1 (enExample) |
| JP (1) | JP3741870B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005078234A (ja) * | 2003-08-29 | 2005-03-24 | Renesas Technology Corp | 情報処理装置 |
| US8578134B1 (en) * | 2005-04-04 | 2013-11-05 | Globalfoundries Inc. | System and method for aligning change-of-flow instructions in an instruction buffer |
| JP4354990B2 (ja) * | 2005-04-08 | 2009-10-28 | パナソニック株式会社 | プロセッサ |
| JP5233078B2 (ja) * | 2006-03-23 | 2013-07-10 | 富士通セミコンダクター株式会社 | プロセッサ及びその処理方法 |
| US8856452B2 (en) | 2011-05-31 | 2014-10-07 | Illinois Institute Of Technology | Timing-aware data prefetching for microprocessors |
| US8560778B2 (en) | 2011-07-11 | 2013-10-15 | Memory Technologies Llc | Accessing data blocks with pre-fetch information |
| JP5863855B2 (ja) * | 2014-02-26 | 2016-02-17 | ファナック株式会社 | 分岐命令を高速に処理するためのインストラクションキャッシュを有するプログラマブルコントローラ |
| JP6252348B2 (ja) * | 2014-05-14 | 2017-12-27 | 富士通株式会社 | 演算処理装置および演算処理装置の制御方法 |
| US9507628B1 (en) | 2015-09-28 | 2016-11-29 | International Business Machines Corporation | Memory access request for a memory protocol |
| EP3249541B1 (en) * | 2016-05-27 | 2020-07-08 | NXP USA, Inc. | A data processor |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3573854A (en) * | 1968-12-04 | 1971-04-06 | Texas Instruments Inc | Look-ahead control for operation of program loops |
| US3577189A (en) * | 1969-01-15 | 1971-05-04 | Ibm | Apparatus and method in a digital computer for allowing improved program branching with branch anticipation reduction of the number of branches, and reduction of branch delays |
| US4991080A (en) * | 1986-03-13 | 1991-02-05 | International Business Machines Corporation | Pipeline processing apparatus for executing instructions in three streams, including branch stream pre-execution processor for pre-executing conditional branch instructions |
| JP2603626B2 (ja) * | 1987-01-16 | 1997-04-23 | 三菱電機株式会社 | データ処理装置 |
| JPH0646382B2 (ja) * | 1987-10-05 | 1994-06-15 | 日本電気株式会社 | プリフェッチキュー制御方式 |
| JPH03191427A (ja) | 1989-12-20 | 1991-08-21 | Nec Corp | マイクロプロセッサ |
| US5265213A (en) * | 1990-12-10 | 1993-11-23 | Intel Corporation | Pipeline system for executing predicted branch target instruction in a cycle concurrently with the execution of branch instruction |
| JPH05274142A (ja) | 1992-03-27 | 1993-10-22 | Nec Corp | 命令疑似実行装置 |
| US5442756A (en) * | 1992-07-31 | 1995-08-15 | Intel Corporation | Branch prediction and resolution apparatus for a superscalar computer processor |
| GB9412487D0 (en) * | 1994-06-22 | 1994-08-10 | Inmos Ltd | A computer system for executing branch instructions |
| US5664135A (en) * | 1994-09-28 | 1997-09-02 | Hewlett-Packard Company | Apparatus and method for reducing delays due to branches |
| US5704053A (en) * | 1995-05-18 | 1997-12-30 | Hewlett-Packard Company | Efficient explicit data prefetching analysis and code generation in a low-level optimizer for inserting prefetch instructions into loops of applications |
| US5790823A (en) * | 1995-07-13 | 1998-08-04 | International Business Machines Corporation | Operand prefetch table |
| GB9526129D0 (en) * | 1995-12-21 | 1996-02-21 | Philips Electronics Nv | Machine code format translation |
| US5948095A (en) * | 1997-12-31 | 1999-09-07 | Intel Corporation | Method and apparatus for prefetching data in a computer system |
| US6341370B1 (en) * | 1998-04-24 | 2002-01-22 | Sun Microsystems, Inc. | Integration of data prefetching and modulo scheduling using postpass prefetch insertion |
-
1998
- 1998-08-07 JP JP22381398A patent/JP3741870B2/ja not_active Expired - Lifetime
-
1999
- 1999-03-12 US US09/266,869 patent/US6895496B1/en not_active Expired - Lifetime
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6665776B2 (en) | Apparatus and method for speculative prefetching after data cache misses | |
| EP0380859B1 (en) | Method of preprocessing multiple instructions | |
| EP1003095B1 (en) | A computer system for executing branch instructions | |
| EP0391517B1 (en) | Method and apparatus for ordering and queueing multiple memory access requests | |
| US8171266B2 (en) | Look-ahead load pre-fetch in a processor | |
| JP2010511251A (ja) | サブルーチン呼び出しを認識(recognize)する方法及び装置 | |
| JP2003186741A (ja) | キャッシュ制御の命令プリフェッチ方法及びシステム | |
| JP2000056970A5 (enExample) | ||
| US5666505A (en) | Heuristic prefetch mechanism and method for computer system | |
| JP3683248B2 (ja) | 情報処理装置及び情報処理方法 | |
| JP3741870B2 (ja) | 命令及びデータの先読み方法、マイクロコントローラ、疑似命令検出回路 | |
| JPH0773104A (ja) | キャッシュ・システム | |
| JP2007041837A (ja) | 命令プリフェッチ装置及び命令プリフェッチ方法 | |
| JPH06266556A (ja) | データ処理装置 | |
| JP2723238B2 (ja) | 情報処理装置 | |
| US20080065870A1 (en) | Information processing apparatus | |
| KR19990003937A (ko) | 프리페치 장치 | |
| JP2004192021A (ja) | マイクロプロセッサ | |
| JP2001022577A (ja) | 情報処理装置 | |
| JP5679263B2 (ja) | 情報処理装置及びマイクロ命令処理方法 | |
| JPH027128A (ja) | 情報処理装置 | |
| JPH03113535A (ja) | パイプライン制御機構 | |
| US6871247B1 (en) | Mechanism for supporting self-modifying code in a harvard architecture digital signal processor and method of operation thereof | |
| JPH08286914A (ja) | メモリ制御装置 | |
| JPH0713811B2 (ja) | 命令プリフェッチ方法 |