JP2000003807A - Manufacture of chip electronic part - Google Patents

Manufacture of chip electronic part

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Publication number
JP2000003807A
JP2000003807A JP10168057A JP16805798A JP2000003807A JP 2000003807 A JP2000003807 A JP 2000003807A JP 10168057 A JP10168057 A JP 10168057A JP 16805798 A JP16805798 A JP 16805798A JP 2000003807 A JP2000003807 A JP 2000003807A
Authority
JP
Japan
Prior art keywords
substrate
material substrate
vertical
terminal electrode
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10168057A
Other languages
Japanese (ja)
Inventor
Hisahiro Kuriyama
尚大 栗山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP10168057A priority Critical patent/JP2000003807A/en
Publication of JP2000003807A publication Critical patent/JP2000003807A/en
Pending legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent oblique cracks on the top face of a raw-material substrate, and to reduce the damage on a terminal electrode film, by notching vertical or horizontal stripe grooves for breaking at every insulating substrate in the raw material substrate to a surface reverse to one to which a resistance film and the terminal electrode film are formed, in both upper and lower surfaces of the raw material substrate. SOLUTION: In a raw material substrate A, a large number of chip insulating substrates 1 are arranged crosswise and formed integrally, and V-shaped sectional vertical stripe grooves A1 and horizontal stripe grooves A2 breaking at every each insulating substrate 1 in the raw material substrate A are notched to the undersides of the chip type insulating substrate 1. Terminal electrode films 2 to both ends of resistance films 3 are formed at the places of each insulating substrate 1 in the substrate A, and the resistance films 3 are formed. The substrate A is fed between a pair of rotating large and small rollers so that the top face of the substrate A is brought into contact with the large roller, and broken at every insulating substrate 1 along the vertical and horizontal stripe grooves A1, A2. Accordingly, the electrode films 2 formed onto the top face of the substrate A do not hinder the opening of the vertical and horizontal stripe grooves, and no crack is formed to the electrode films 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップ型の絶縁基
板の上面に抵抗膜を厚膜状に形成して成る固定式又は可
変式抵抗器等のチップ型電子部品において、これを製造
する方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a chip-type electronic component such as a fixed or variable resistor formed by forming a thick resistive film on the upper surface of a chip-type insulating substrate. It is about.

【0002】[0002]

【従来の技術】従来、このチップ型電子部品のうち固定
式のチップ抵抗器を製造するに際しては、大まかに言っ
て、図7〜図12に示す方法が採用されている。すなわ
ち、 .先づ、図7に示すように、チップ型絶縁基板1′の
多数個を縦横に並べて一体化して成る素材基板A′を用
意すると共に、その上面に、当該素材基板A′を前記各
絶縁基板1′ごとにブレイクするために断面V字状の縦
筋目溝A1′及び横筋目溝A2′を刻設する。 .次いで、図8に示すように、この素材基板A′の上
面のうち各絶縁基板1′の箇所に、後述する抵抗膜3′
の両端に対する端子電極膜2′を、横筋目溝A2′を横
断するように形成したのち、図9に示すように、抵抗膜
3′を形成するか、或いは、抵抗膜3′を形成したのち
端子電極膜2′を形成する。 .次いで、図10に示すように、前記各絶縁基板1′
における抵抗膜3′の全体を覆うガラス等によるカバー
コート4′を、前記縦筋目溝A2′を横断するように形
成する。 .次いで、前記素材基板A′を、図11及び図12に
示すように、回転する大小一対のローラB1′,B2′
の間に送り込むことにより、前記縦筋目溝A1′及び横
筋目溝A2′に沿って前記絶縁基板1′ごとにブレイク
する。と言う方法である。
2. Description of the Related Art Conventionally, when manufacturing a fixed type chip resistor among such chip type electronic components, generally, methods shown in FIGS. 7 to 12 are employed. That is,. First, as shown in FIG. 7, a material substrate A 'is prepared by integrating a large number of chip-type insulating substrates 1' vertically and horizontally, and on the upper surface thereof, the material substrate A 'is attached to each of the insulating substrates. A vertical streak groove A1 'and a horizontal streak groove A2' having a V-shaped cross section are formed in order to break every 1 '. . Next, as shown in FIG. 8, a resistive film 3 'to be described later is formed on each insulating substrate 1' on the upper surface of the material substrate A '.
After forming the terminal electrode film 2 'at both ends of the substrate so as to cross the transverse groove A2', a resistive film 3 'is formed as shown in FIG. 9, or after forming the resistive film 3'. A terminal electrode film 2 'is formed. . Next, as shown in FIG.
A cover coat 4 'made of glass or the like covering the entire resistive film 3' is formed so as to cross the longitudinal groove A2 '. . Next, as shown in FIGS. 11 and 12, a pair of large and small rollers B1 'and B2'
Between the insulating substrates 1 'along the vertical streak grooves A1' and the horizontal streak grooves A2 '. It is a method to say.

【0003】[0003]

【発明が解決しようとする課題】ところで、前記素材基
板A′を、回転する大小一対のローラB1′,B2′の
間に送り込むことにより、前記縦筋目溝A1′及び横筋
目溝A2′に沿って前記絶縁基板1′ごとにブレイクす
るに際しては、例えば、特公昭63−32602号公報
及び実公平3−56004号公報等に記載されているよ
うに、この素材基板A′を両ローラB1′,B2′の間
に、当該素材基板A′における上下両面のうち前記縦筋
目溝A1′及び横筋目溝A2′が刻設されている上面が
前記大小両ローラB1′,B2′のうち大径のローラB
1′に接触するように送り込むことにより、前記縦筋目
溝A1′及び横筋目溝A2′が開く方向に曲げるように
しなければならない。
By feeding the material substrate A 'between a pair of rotating large and small rollers B1' and B2 ', the material substrate A' is formed along the longitudinal groove A1 'and the horizontal groove A2'. When breaking each of the insulating substrates 1 ', for example, as described in JP-B-63-32602 and JP-B-3-56004, the material substrate A' is separated from both rollers B1 ', Between the upper and lower rollers B1 'and B2' between the large and small rollers B1 'and B2', between the upper and lower rollers B1 'and B2' between the upper and lower surfaces of the material substrate A 'between the upper and lower surfaces of the material substrate A'. Roller B
By feeding so as to be in contact with 1 ', the longitudinal groove A1' and the horizontal groove A2 'must be bent in the opening direction.

【0004】しかし、前記従来した製造方法では、素材
基板A′を各絶縁基板1′ごとにブレイクするための縦
筋目溝A1′及び横筋目溝A2′の深さを、板厚さの約
40〜60%にすると言うよに可成り深くし、前記素材
基板A′における上下両面のうち前記縦筋目溝A1′及
び横筋目溝A2′が刻設されている上面に、端子電極膜
2′及びカバーコート4′を、前記縦筋目溝A1′及び
横筋目溝A2′を横断するように形成しているから、前
記縦筋目溝A1′及び横筋目溝A2′内の一部には、前
記端子電極膜2′及びカバーコート4′が詰まることに
なり、換言すると、前記縦筋目溝A1′及び横筋目溝A
2′内の一部に詰まっている端子電極膜2′及びカバー
コート4′が、素材基板Aのブレイクに際して縦筋目溝
A1′及び横筋目溝A2′が開くことを妨げると言う接
着剤になることになる。
However, in the above-mentioned conventional manufacturing method, the depths of the vertical groove A1 'and the horizontal groove A2' for breaking the material substrate A 'for each insulating substrate 1' are set to about 40% of the plate thickness. The terminal electrode film 2 'and the terminal electrode film 2' are formed on the upper and lower surfaces of the material substrate A 'on which the vertical groove A1' and the horizontal groove A2 'are engraved. Since the cover coat 4 'is formed so as to cross the vertical streak groove A1' and the horizontal streak groove A2 ', the terminal is provided in a part of the vertical streak groove A1' and the horizontal streak groove A2 '. The electrode film 2 ′ and the cover coat 4 ′ become clogged, in other words, the vertical groove A 1 ′ and the horizontal groove A 1
The terminal electrode film 2 ′ and the cover coat 4 ′ that are partially clogged in the inside 2 ′ serve as an adhesive which prevents the vertical groove A 1 ′ and the horizontal groove A 2 ′ from opening when the material substrate A is broken. Will be.

【0005】従って、前記したブレイクに際して、大き
な外力を必要とするから、素材基板A′の上面に対して
直角に割れることなく、上面に対して斜めに割れること
が多くなるばかりか、前記端子電極膜2′及びカバーコ
ート4′のうち前記縦筋目溝A1′及び横筋目溝A2′
内に詰まっている部分は、縦筋目溝A1′及び横筋目溝
A2′の真ん中の線で割れることなく、互いに隣接する
両絶縁基板1′のうち一方の方又は他方の方に余分に多
く付着すると言うように、ブレイクした各絶縁基板1′
の各側面の形状が可成り不揃いになり易く、しかも、前
記のブレイクに際して、前記端子電極膜2′及びカバー
コート4′にその一部が禿げ落ちたり、亀裂が入ったり
するように損傷することが発生し易いから、良品を製造
することの歩留り率が低く、換言すると、不良品の発生
率が高いと言う問題があった。
[0005] Therefore, a large external force is required during the above-mentioned breaking, so that not only the material substrate A 'does not break at right angles to the upper surface but also obliquely to the upper surface, and the terminal electrode The vertical groove A1 ′ and the horizontal groove A2 ′ of the film 2 ′ and the cover coat 4 ′
The portion clogged inside is not excessively broken at the middle line of the vertical streak groove A1 'and the horizontal streak groove A2', and an excessively large amount adheres to one or the other of the two insulating substrates 1 'adjacent to each other. Then, each of the broken insulating substrates 1 '
The shape of each side surface is likely to be considerably irregular, and the terminal electrode film 2 ′ and the cover coat 4 ′ are damaged so that a part thereof may be bald or cracked during the breaking. Therefore, there is a problem that the yield rate of manufacturing good products is low, in other words, the occurrence rate of defective products is high.

【0006】また、チップ型の可変式抵抗器において
も、例えば、特公平7−48410号公報等に記載され
ているように、素材基板における各絶縁基板の上面に形
成した円弧状抵抗膜の両端に対する端子電極膜を、前記
素材基板の上面に刻設したブレイク用の縦又は横筋目溝
を横断するように形成しているから、同様の問題があっ
た。
Further, in a chip type variable resistor, as described in Japanese Patent Publication No. 7-48410, for example, both ends of an arc-shaped resistive film formed on the upper surface of each insulating substrate in a material substrate. Is formed so as to cross the vertical or horizontal grooves for breaks engraved on the upper surface of the material substrate.

【0007】本発明は、この問題を解消した製造方法を
提供することを技術的課題とするものである。
An object of the present invention is to provide a manufacturing method which solves this problem.

【0008】[0008]

【課題を解決するための手段】この技術的課題を達成す
るため本発明の製造方法は、「少なくとも、チップ型絶
縁基板の多数個を並べて一体化し且つこの各絶縁基板ご
とにブレイクするための縦又は横筋目溝を刻設して成る
素材基板を用意する工程と、前記素材基板の上面のうち
各絶縁基板の箇所に端子電極膜を、当該端子電極膜が前
記縦又は横筋目溝を横断するように形成する工程と、前
記素材基板を前記縦又は横筋目溝に沿って前記各絶縁基
板ごとにブレイクする工程とから成る製造方法におい
て、前記素材基板を各絶縁基板ごとにブレイクするため
の前記縦又は横筋目溝を、前記素材基板の上下両面のう
ち前記抵抗膜及び端子電極膜を形成する面とは反対側の
面に刻設することを特徴とする。」ものである。
In order to achieve this technical object, a manufacturing method according to the present invention is directed to a method of manufacturing a semiconductor device comprising the steps of: "at least a plurality of chip-type insulating substrates are arranged side by side and integrated; Or a step of preparing a material substrate formed by engraving a horizontal streak groove, and a terminal electrode film at a location of each insulating substrate on the upper surface of the material substrate, and the terminal electrode film crosses the vertical or horizontal streak groove. Forming, and a step of breaking the material substrate along each of the vertical or horizontal streaks for each of the insulating substrates, wherein the material substrate is broken for each of the insulating substrates. Vertical or horizontal grooves are formed on the upper and lower surfaces of the material substrate, the surfaces being opposite to the surfaces on which the resistive film and the terminal electrode film are formed. "

【0009】[0009]

【発明の作用・効果】このように、素材基板を各絶縁基
板ごとにブレイクするための縦又は横筋目溝を、前記素
材基板における上下両面のうち端子電極膜を形成する面
とは反対側の面に刻設することにより、前記縦又は横筋
目溝内の一部に、前記端子電極膜が詰まることを確実に
回避できるから、前記素材基板を、当該素材基板をその
縦又は横筋目溝が開く方向に曲げることによって、各絶
縁基板ごとにブレイクするに際して、各絶縁基板におけ
る端子電極膜が前記縦又は横筋目溝を開くことの妨げに
ならないのである。
As described above, the vertical or horizontal groove for breaking the material substrate for each insulating substrate is formed on the upper and lower surfaces of the material substrate on the side opposite to the surface on which the terminal electrode film is formed. By engraving on the surface, it is possible to reliably avoid clogging of the terminal electrode film in a part of the vertical or horizontal groove, so that the material substrate is formed by the vertical or horizontal groove. By bending in the opening direction, the terminal electrode film on each insulating substrate does not hinder the opening of the vertical or horizontal groove when breaking each insulating substrate.

【0010】その結果、本発明によると、前記素材基板
を各絶縁基板ごとにブレイクするに際して、素材基板の
上面に対して斜めに割れること、及び、端子電極膜が禿
げる等の損傷することを、前記従来の場合よりも大幅に
低減できるから、良品を製造することの歩留り率が高
く、換言すると、不良品の発生率が低くて、製造コスト
を低減できる効果を有する。
As a result, according to the present invention, when the material substrate is broken for each insulating substrate, it is possible to prevent the material substrate from being broken obliquely with respect to the upper surface of the material substrate and from being damaged such as baldness of the terminal electrode film. Since the yield can be greatly reduced as compared with the conventional case, the yield of manufacturing a good product is high, in other words, the occurrence rate of defective products is low, and the manufacturing cost can be reduced.

【0011】[0011]

【発明の実施の形態】以下、本発明の実施の形態を図面
について説明する。図1〜図6は、チップ型電子部品の
うち固定式のチップ抵抗器を製造する場合である。すな
わち、 .先づ、図1に示すように、チップ型絶縁基板1の多
数個を縦横に並べて一体化して成る素材基板Aを用意す
ると共に、その下面に、当該素材基板Aを前記各絶縁基
板1ごとにブレイクするために断面V字状の縦筋目溝A
1及び横筋目溝A2を刻設する。この場合において、前
記縦筋目溝A1及び横筋目溝A2の深さは、素材基板A
における板厚さの約40〜60%に構成されている。 .次いで、図2に示すように、この素材基板Aの上面
のうち各絶縁基板1の箇所に、後述する抵抗膜3の両端
に対する端子電極膜2を形成したのち、図3に示すよう
に、抵抗膜3を形成するか、或いは、抵抗膜3を形成し
たのち端子電極膜2を形成する。 .次いで、図4に示すように、前記各絶縁基板1にお
ける抵抗膜3の全体を覆うガラス等によるカバーコート
4を形成する。 .次いで、前記素材基板Aを、図5及び図6に示すよ
うに、回転する大小一対のローラB1,B2の間に、当
該素材基板Aにおける上下両面のうち上面が前記両両ロ
ーラB1,B2のうち大径のローラB1に接触するよう
に、送り込むことにより、前記縦筋目溝A1及び横筋目
溝A2に沿って前記絶縁基板1ごとにブレイクする。
Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 6 show a case where a fixed chip resistor is manufactured among chip-type electronic components. That is,. First, as shown in FIG. 1, a material substrate A is prepared by integrating a large number of chip-type insulating substrates 1 vertically and horizontally, and on the lower surface, the material substrate A is provided for each of the insulating substrates 1. V-shaped vertical streak groove A for breaking
1 and the transverse groove A2 are engraved. In this case, the depth of the vertical streak groove A1 and the horizontal streak groove A2 is
Is about 40 to 60% of the plate thickness. . Next, as shown in FIG. 2, after forming terminal electrode films 2 on both ends of a resistive film 3 to be described later on each insulating substrate 1 on the upper surface of the material substrate A, as shown in FIG. The terminal electrode film 2 is formed after forming the film 3 or after forming the resistance film 3. . Next, as shown in FIG. 4, a cover coat 4 made of glass or the like is formed to cover the entire resistive film 3 in each of the insulating substrates 1. . Then, as shown in FIGS. 5 and 6, the upper surface of the upper and lower surfaces of the material substrate A is placed between the two rollers B1 and B2, between the pair of rotating large and small rollers B1 and B2. By feeding so as to contact the large-diameter roller B1, the insulating substrate 1 is broken along the vertical streak grooves A1 and the horizontal streak grooves A2.

【0012】このように、素材基板Aにおける上下両面
のうち下面に、当該素材基板Aを各絶縁基板1ごとにブ
レイクするための縦筋目溝A1及び横筋目溝A2を刻設
する一方、前記素材基板Aの上面に、端子電極膜2、及
び抵抗膜3及びカバーコート4を形成したことにより、
前記縦筋目溝A1及び横筋目溝A2内の一部に、前記端
子電極膜2及びカバーコート4が詰まることを確実に回
避できるから、前記素材基板Aを、図5及び図6に示す
ように、回転する大小一対のローラB1,B2の間に送
り込み当該素材基板Aをその縦筋目溝A1及び横筋目溝
A2が開く方向に曲げることによって、各絶縁基板1ご
とにブレイクするに際して、素材基板Aの上面に形成し
た端子電極膜2及びカバーコート4が前記縦筋目溝A1
及び横筋目溝A2を開くことの妨げにならず、素材基板
Aを従来よりも小さい外力でブレイクできると共に、前
記端子電極膜2及びカバーコート4が禿げたり、亀裂が
入ったりするように損傷することを確実に低減できるの
である。
As described above, on the lower surface of the upper and lower surfaces of the material substrate A, the vertical groove A1 and the horizontal groove A2 for breaking the material substrate A for each insulating substrate 1 are engraved. By forming the terminal electrode film 2, the resistance film 3, and the cover coat 4 on the upper surface of the substrate A,
Since it is possible to reliably prevent the terminal electrode film 2 and the cover coat 4 from being partially clogged in the vertical streak grooves A1 and the horizontal streak grooves A2, as shown in FIGS. When the material substrate A is fed between a pair of rotating large and small rollers B1 and B2 and the material substrate A is bent in a direction in which the vertical streak groove A1 and the horizontal streak groove A2 open, the material substrate A is broken. The terminal electrode film 2 and the cover coat 4 formed on the upper surface of the
In addition, the material substrate A can be broken with a smaller external force than before, without hindering the opening of the lateral groove A2, and the terminal electrode film 2 and the cover coat 4 are damaged so as to be bald or cracked. This can be reliably reduced.

【0013】なお、前記素材基板Aには、その下面、つ
まり、抵抗膜3、端子電極膜2及びカバーコート4を形
成する面とは反対側の面にブレイク用の縦筋目溝A1及
び横筋目溝A2を設けることに加えて、その上面に、図
1に二点鎖線で示すように、ブレイク用の極く浅い深さ
(板厚さの約10%程度以内)のサブの縦筋目溝A1″
及び横筋目溝A2″を、前記した深い縦筋目溝A1及び
横筋目溝A2に沿って延びるように設けても良いのであ
る。
On the lower surface of the material substrate A, that is, on the surface opposite to the surface on which the resistive film 3, the terminal electrode film 2 and the cover coat 4 are to be formed, the longitudinal grooves A1 for breaking and the horizontal lines are provided. In addition to providing the groove A2, as shown by a two-dot chain line in FIG. 1, a sub-vertical groove A1 having a very shallow depth for break (within about 10% of the plate thickness) is provided on the upper surface thereof. ″
And the horizontal streak groove A2 "may be provided so as to extend along the deep vertical streak groove A1 and the horizontal streak groove A2.

【0014】また、本発明は、前記したように、チップ
型の抵抗器のうち固定式のチップ抵抗器を製造する場合
に限らず、特公平7−48410号公報等に記載されて
いる可変式のチップ抵抗器は勿論のこと、チップ型の絶
縁基板の上面にコンデンサを形成したチップ型コンデン
サ等のような他のチップ型電子部品を製造する場合にも
適用できることは言うまでもない。
Further, as described above, the present invention is not limited to the case of manufacturing a fixed type chip resistor among the chip type resistors, but the variable type described in Japanese Patent Publication No. 7-48410. It goes without saying that the present invention can be applied not only to the chip resistor described above but also to the case of manufacturing other chip type electronic components such as a chip type capacitor having a capacitor formed on the upper surface of a chip type insulating substrate.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態に使用する素材基板を示す
斜視図である。
FIG. 1 is a perspective view showing a material substrate used in an embodiment of the present invention.

【図2】前記図1の素材基板に端子電極膜を形成した状
態を示す斜視図である。
FIG. 2 is a perspective view showing a state in which a terminal electrode film is formed on the material substrate of FIG. 1;

【図3】前記図1の素材基板に抵抗膜を形成した状態を
示す斜視図である。
FIG. 3 is a perspective view showing a state in which a resistance film is formed on the material substrate of FIG. 1;

【図4】前記図1の素材基板にカバーコートを形成した
状態を示す斜視図である。
FIG. 4 is a perspective view showing a state in which a cover coat is formed on the material substrate of FIG. 1;

【図5】図4のV−V視拡大断面図である。FIG. 5 is an enlarged sectional view taken along line VV of FIG. 4;

【図6】図4のVI−VI視拡大断面図である。FIG. 6 is an enlarged sectional view taken along line VI-VI of FIG. 4;

【図7】従来の製造方法に使用する素材基板を示す斜視
図である。
FIG. 7 is a perspective view showing a material substrate used in a conventional manufacturing method.

【図8】前記図7の素材基板に端子電極膜を形成した状
態を示す斜視図である。
8 is a perspective view showing a state in which a terminal electrode film is formed on the material substrate of FIG. 7;

【図9】前記図7の素材基板に抵抗膜を形成した状態を
示す斜視図である。
FIG. 9 is a perspective view showing a state in which a resistance film is formed on the material substrate of FIG. 7;

【図10】前記図7の素材基板にカバーコートを形成し
た状態を示す斜視図である。
FIG. 10 is a perspective view showing a state in which a cover coat is formed on the material substrate of FIG. 7;

【図11】図10のXI−XI視拡大断面図である。FIG. 11 is an enlarged sectional view taken along line XI-XI of FIG. 10;

【図12】図10のXII −XII 拡大断面図である。FIG. 12 is an enlarged sectional view taken along the line XII-XII of FIG.

【符号の説明】[Explanation of symbols]

A 素材基板 A1 縦筋目溝 A2 横筋目溝 1 絶縁基板 2 端子電極膜 3 抵抗膜 4 カバーコート B1,B2 ブレイク用ローラ Reference Signs List A Material substrate A1 Vertical streak groove A2 Horizontal streak groove 1 Insulating substrate 2 Terminal electrode film 3 Resistive film 4 Cover coat B1, B2 Breaking roller

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】少なくとも、チップ型絶縁基板の多数個を
並べて一体化し且つこの各絶縁基板ごとにブレイクする
ための縦又は横筋目溝を刻設して成る素材基板を用意す
る工程と、前記素材基板の上面のうち各絶縁基板の箇所
に端子電極膜を、当該端子電極膜が前記縦又は横筋目溝
を横断するように形成する工程と、前記素材基板を前記
縦又は横筋目溝に沿って前記各絶縁基板ごとにブレイク
する工程とから成る製造方法において、 前記素材基板を各絶縁基板ごとにブレイクするための前
記縦又は横筋目溝を、前記素材基板の上下両面のうち前
記抵抗膜及び端子電極膜を形成する面とは反対側の面に
刻設することを特徴とするチップ型電子部品を製造する
方法。
At least a step of preparing a material substrate having a plurality of chip-type insulating substrates arranged side by side and integrated and engraved with vertical or horizontal grooves for breaking each of the insulating substrates; A step of forming a terminal electrode film on each insulating substrate on the upper surface of the substrate so that the terminal electrode film crosses the vertical or horizontal groove, and forming the material substrate along the vertical or horizontal groove; A step of breaking for each of the insulating substrates, wherein the vertical or horizontal grooves for breaking the material substrate for each of the insulating substrates are formed on the upper and lower surfaces of the material substrate. A method for manufacturing a chip-type electronic component, wherein the engraving is performed on a surface opposite to a surface on which an electrode film is formed.
JP10168057A 1998-06-16 1998-06-16 Manufacture of chip electronic part Pending JP2000003807A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10168057A JP2000003807A (en) 1998-06-16 1998-06-16 Manufacture of chip electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10168057A JP2000003807A (en) 1998-06-16 1998-06-16 Manufacture of chip electronic part

Publications (1)

Publication Number Publication Date
JP2000003807A true JP2000003807A (en) 2000-01-07

Family

ID=15861036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10168057A Pending JP2000003807A (en) 1998-06-16 1998-06-16 Manufacture of chip electronic part

Country Status (1)

Country Link
JP (1) JP2000003807A (en)

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