ITVA910027A1 - Decodificatore per rom di tipo nand - Google Patents

Decodificatore per rom di tipo nand

Info

Publication number
ITVA910027A1
ITVA910027A1 IT000027A ITVA910027A ITVA910027A1 IT VA910027 A1 ITVA910027 A1 IT VA910027A1 IT 000027 A IT000027 A IT 000027A IT VA910027 A ITVA910027 A IT VA910027A IT VA910027 A1 ITVA910027 A1 IT VA910027A1
Authority
IT
Italy
Prior art keywords
nand type
type rom
rom decoder
decoder
nand
Prior art date
Application number
IT000027A
Other languages
English (en)
Inventor
Luigi Pascucci
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to ITVA910027A priority Critical patent/IT1253680B/it
Publication of ITVA910027A0 publication Critical patent/ITVA910027A0/it
Priority to DE69224576T priority patent/DE69224576T2/de
Priority to EP92830457A priority patent/EP0534910B1/en
Priority to US07/938,731 priority patent/US5347493A/en
Priority to JP25585892A priority patent/JPH05303899A/ja
Publication of ITVA910027A1 publication Critical patent/ITVA910027A1/it
Application granted granted Critical
Publication of IT1253680B publication Critical patent/IT1253680B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
ITVA910027A 1991-08-30 1991-08-30 Decodificatore per rom di tipo nand IT1253680B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
ITVA910027A IT1253680B (it) 1991-08-30 1991-08-30 Decodificatore per rom di tipo nand
DE69224576T DE69224576T2 (de) 1991-08-30 1992-08-27 Zeilendekodierer für NAND-ROM-Speichertyp
EP92830457A EP0534910B1 (en) 1991-08-30 1992-08-27 Row-decoder for nand-type rom
US07/938,731 US5347493A (en) 1991-08-30 1992-08-31 Row decoder for NAND-type ROM
JP25585892A JPH05303899A (ja) 1991-08-30 1992-08-31 Nand型rom用行デコーダ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITVA910027A IT1253680B (it) 1991-08-30 1991-08-30 Decodificatore per rom di tipo nand

Publications (3)

Publication Number Publication Date
ITVA910027A0 ITVA910027A0 (it) 1991-08-30
ITVA910027A1 true ITVA910027A1 (it) 1993-03-02
IT1253680B IT1253680B (it) 1995-08-22

Family

ID=11423147

Family Applications (1)

Application Number Title Priority Date Filing Date
ITVA910027A IT1253680B (it) 1991-08-30 1991-08-30 Decodificatore per rom di tipo nand

Country Status (5)

Country Link
US (1) US5347493A (it)
EP (1) EP0534910B1 (it)
JP (1) JPH05303899A (it)
DE (1) DE69224576T2 (it)
IT (1) IT1253680B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5808500A (en) * 1996-06-28 1998-09-15 Cypress Semiconductor Corporation Block architecture semiconductor memory array utilizing non-inverting pass gate local wordline driver
US5940332A (en) * 1997-11-13 1999-08-17 Stmicroelectronics, Inc. Programmed memory with improved speed and power consumption
KR100481857B1 (ko) 2002-08-14 2005-04-11 삼성전자주식회사 레이아웃 면적을 줄이고 뱅크 마다 독립적인 동작을수행할 수 있는 디코더를 갖는 플레쉬 메모리 장치
US7623367B2 (en) * 2006-10-13 2009-11-24 Agere Systems Inc. Read-only memory device and related method of design

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4489400A (en) * 1982-03-01 1984-12-18 Texas Instruments Incorporated Serially banked read only memory
NL8602178A (nl) * 1986-08-27 1988-03-16 Philips Nv Geintegreerde geheugenschakeling met blokselektie.
US5241511A (en) * 1991-08-28 1993-08-31 Motorola, Inc. BiCMOS memory word line driver

Also Published As

Publication number Publication date
DE69224576T2 (de) 1998-11-12
JPH05303899A (ja) 1993-11-16
EP0534910B1 (en) 1998-03-04
DE69224576D1 (de) 1998-04-09
ITVA910027A0 (it) 1991-08-30
EP0534910A2 (en) 1993-03-31
US5347493A (en) 1994-09-13
EP0534910A3 (en) 1994-05-18
IT1253680B (it) 1995-08-22

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970829