ITMI20022314A1 - Circuito di rilevamento di una transazione logica con - Google Patents
Circuito di rilevamento di una transazione logica conInfo
- Publication number
- ITMI20022314A1 ITMI20022314A1 IT002314A ITMI20022314A ITMI20022314A1 IT MI20022314 A1 ITMI20022314 A1 IT MI20022314A1 IT 002314 A IT002314 A IT 002314A IT MI20022314 A ITMI20022314 A IT MI20022314A IT MI20022314 A1 ITMI20022314 A1 IT MI20022314A1
- Authority
- IT
- Italy
- Prior art keywords
- detection circuit
- logical transaction
- transaction
- logical
- detection
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electronic Switches (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT002314A ITMI20022314A1 (it) | 2002-10-31 | 2002-10-31 | Circuito di rilevamento di una transazione logica con |
US10/698,051 US6960951B2 (en) | 2002-10-31 | 2003-10-30 | Circuit for detecting a logic transition with improved stability of the length of a detection signal pulse |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT002314A ITMI20022314A1 (it) | 2002-10-31 | 2002-10-31 | Circuito di rilevamento di una transazione logica con |
Publications (1)
Publication Number | Publication Date |
---|---|
ITMI20022314A1 true ITMI20022314A1 (it) | 2004-05-01 |
Family
ID=32697272
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT002314A ITMI20022314A1 (it) | 2002-10-31 | 2002-10-31 | Circuito di rilevamento di una transazione logica con |
Country Status (2)
Country | Link |
---|---|
US (1) | US6960951B2 (it) |
IT (1) | ITMI20022314A1 (it) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2652642C (en) | 2006-02-09 | 2015-12-08 | General Dynamics Ordnance And Tactical Systems - Canada Valleyfield Inc. | Black powder substitutes for small caliber firearms |
US7976550B2 (en) * | 2006-08-10 | 2011-07-12 | Pioneer Surgical Technology | Insertion instrument for artificial discs |
US11264999B2 (en) | 2020-03-12 | 2022-03-01 | Raytheon Company | High resolution counter using phased shifted clock |
CN116683906B (zh) * | 2023-08-04 | 2024-01-26 | 深圳飞骧科技股份有限公司 | Bg启动电路及射频芯片 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5696463A (en) * | 1993-11-02 | 1997-12-09 | Hyundai Electronics Industries Co., Ltd. | Address transition detecting circuit which generates constant pulse width signal |
US5650979A (en) * | 1995-05-05 | 1997-07-22 | Creative Integrated Systems, Inc. | Semiconductor read-only VLSI memory |
KR0152928B1 (ko) * | 1995-10-19 | 1998-10-15 | 문정환 | 시스템의 연산 시간 가변 장치 |
KR0167300B1 (ko) * | 1995-12-21 | 1999-02-01 | 문정환 | 메모리의 어드레스 천이 검출회로 |
KR100278988B1 (ko) * | 1998-02-25 | 2001-02-01 | 김영환 | 어드레스 천이 검출회로 |
-
2002
- 2002-10-31 IT IT002314A patent/ITMI20022314A1/it unknown
-
2003
- 2003-10-30 US US10/698,051 patent/US6960951B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20040140828A1 (en) | 2004-07-22 |
US6960951B2 (en) | 2005-11-01 |
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