ITMI20011280A0 - Procedimento per l'applicazione di uno strato isolante strutturato suuno strato metallico - Google Patents
Procedimento per l'applicazione di uno strato isolante strutturato suuno strato metallicoInfo
- Publication number
- ITMI20011280A0 ITMI20011280A0 IT2001MI001280A ITMI20011280A ITMI20011280A0 IT MI20011280 A0 ITMI20011280 A0 IT MI20011280A0 IT 2001MI001280 A IT2001MI001280 A IT 2001MI001280A IT MI20011280 A ITMI20011280 A IT MI20011280A IT MI20011280 A0 ITMI20011280 A0 IT MI20011280A0
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- application
- layer
- insulating layer
- structured insulating
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76819—Smoothing of the dielectric
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Laminated Bodies (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10031876A DE10031876A1 (de) | 2000-06-30 | 2000-06-30 | Verfahren zum Aufbringen einer strukturierten Isolationsschicht auf eine Metallschicht |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ITMI20011280A0 true ITMI20011280A0 (it) | 2001-06-18 |
| ITMI20011280A1 ITMI20011280A1 (it) | 2002-12-18 |
Family
ID=7647340
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT2001MI001280A ITMI20011280A1 (it) | 2000-06-30 | 2001-06-18 | Procedimento per l'applicazione di uno strato isolante strutturato suuno strato metallico |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20030164351A1 (it) |
| JP (1) | JP2004503087A (it) |
| DE (1) | DE10031876A1 (it) |
| IT (1) | ITMI20011280A1 (it) |
| WO (1) | WO2002003453A1 (it) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61222150A (ja) * | 1985-01-30 | 1986-10-02 | テキサス インスツルメンツ インコーポレイテツド | 中間層にビアを形成しかつ該中間絶縁体層の平担化を行なう方法 |
| US4753866A (en) * | 1986-02-24 | 1988-06-28 | Texas Instruments Incorporated | Method for processing an interlevel dielectric suitable for VLSI metallization schemes |
| US4939105A (en) * | 1989-08-03 | 1990-07-03 | Micron Technology, Inc. | Planarizing contact etch |
| US5223084A (en) * | 1991-11-25 | 1993-06-29 | Hewlett-Packard Company | Simultaneous dielectric planarization and contact hole etching |
| US5669802A (en) * | 1995-10-30 | 1997-09-23 | Advanced Vision Technologies, Inc. | Fabrication process for dual carrier display device |
-
2000
- 2000-06-30 DE DE10031876A patent/DE10031876A1/de not_active Ceased
-
2001
- 2001-05-22 JP JP2002507434A patent/JP2004503087A/ja active Pending
- 2001-05-22 WO PCT/DE2001/001956 patent/WO2002003453A1/de active Application Filing
- 2001-05-22 US US10/312,516 patent/US20030164351A1/en not_active Abandoned
- 2001-06-18 IT IT2001MI001280A patent/ITMI20011280A1/it unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002003453A1 (de) | 2002-01-10 |
| DE10031876A1 (de) | 2002-01-10 |
| US20030164351A1 (en) | 2003-09-04 |
| ITMI20011280A1 (it) | 2002-12-18 |
| JP2004503087A (ja) | 2004-01-29 |
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