IT989202B - Procedimento per la fabbricazio ne di componenti semiconduttori aventi collegamenti energetici interni ad essi - Google Patents

Procedimento per la fabbricazio ne di componenti semiconduttori aventi collegamenti energetici interni ad essi

Info

Publication number
IT989202B
IT989202B IT11479/69A IT1147969A IT989202B IT 989202 B IT989202 B IT 989202B IT 11479/69 A IT11479/69 A IT 11479/69A IT 1147969 A IT1147969 A IT 1147969A IT 989202 B IT989202 B IT 989202B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
semiconductor components
internal energy
energy connections
Prior art date
Application number
IT11479/69A
Other languages
English (en)
Original Assignee
Ibm
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm, Motorola Inc filed Critical Ibm
Application granted granted Critical
Publication of IT989202B publication Critical patent/IT989202B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/901—Capacitive junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT11479/69A 1968-01-15 1969-01-14 Procedimento per la fabbricazio ne di componenti semiconduttori aventi collegamenti energetici interni ad essi IT989202B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69773168A 1968-01-15 1968-01-15

Publications (1)

Publication Number Publication Date
IT989202B true IT989202B (it) 1975-05-20

Family

ID=24802311

Family Applications (1)

Application Number Title Priority Date Filing Date
IT11479/69A IT989202B (it) 1968-01-15 1969-01-14 Procedimento per la fabbricazio ne di componenti semiconduttori aventi collegamenti energetici interni ad essi

Country Status (5)

Country Link
US (1) US3560277A (it)
DE (1) DE1901807C3 (it)
FR (1) FR2000270A1 (it)
GB (1) GB1252803A (it)
IT (1) IT989202B (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3619735A (en) * 1970-01-26 1971-11-09 Ibm Integrated circuit with buried decoupling capacitor
US3769105A (en) * 1970-01-26 1973-10-30 Ibm Process for making an integrated circuit with a damping resistor in combination with a buried decoupling capacitor
US3841917A (en) * 1971-09-06 1974-10-15 Philips Nv Methods of manufacturing semiconductor devices
US4053336A (en) * 1972-05-30 1977-10-11 Ferranti Limited Method of manufacturing a semiconductor integrated circuit device having a conductive plane and a diffused network of conductive tracks
US3866066A (en) * 1973-07-16 1975-02-11 Bell Telephone Labor Inc Power supply distribution for integrated circuits
US3969750A (en) * 1974-02-12 1976-07-13 International Business Machines Corporation Diffused junction capacitor and process for producing the same
US4168997A (en) * 1978-10-10 1979-09-25 National Semiconductor Corporation Method for making integrated circuit transistors with isolation and substrate connected collectors utilizing simultaneous outdiffusion to convert an epitaxial layer

Also Published As

Publication number Publication date
GB1252803A (it) 1971-11-10
DE1901807C3 (de) 1980-03-06
US3560277A (en) 1971-02-02
DE1901807A1 (de) 1969-10-16
FR2000270A1 (fr) 1969-09-05
DE1901807B2 (de) 1979-06-28
FR2000270B1 (it) 1973-07-13

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