IT986103B - Perfezionamento nelle disposi zioni di controllo per sistemi di elaborazione di dati - Google Patents

Perfezionamento nelle disposi zioni di controllo per sistemi di elaborazione di dati

Info

Publication number
IT986103B
IT986103B IT50180/73A IT5018073A IT986103B IT 986103 B IT986103 B IT 986103B IT 50180/73 A IT50180/73 A IT 50180/73A IT 5018073 A IT5018073 A IT 5018073A IT 986103 B IT986103 B IT 986103B
Authority
IT
Italy
Prior art keywords
clock
stable
gate
reset
error signal
Prior art date
Application number
IT50180/73A
Other languages
English (en)
Italian (it)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of IT986103B publication Critical patent/IT986103B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Retry When Errors Occur (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
IT50180/73A 1972-05-27 1973-05-24 Perfezionamento nelle disposi zioni di controllo per sistemi di elaborazione di dati IT986103B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7207216A NL7207216A (US07652168-20100126-C00068.png) 1972-05-27 1972-05-27

Publications (1)

Publication Number Publication Date
IT986103B true IT986103B (it) 1975-01-20

Family

ID=19816132

Family Applications (1)

Application Number Title Priority Date Filing Date
IT50180/73A IT986103B (it) 1972-05-27 1973-05-24 Perfezionamento nelle disposi zioni di controllo per sistemi di elaborazione di dati

Country Status (8)

Country Link
US (1) US3868647A (US07652168-20100126-C00068.png)
JP (1) JPS531100B2 (US07652168-20100126-C00068.png)
BE (1) BE800082A (US07652168-20100126-C00068.png)
DE (1) DE2324906C3 (US07652168-20100126-C00068.png)
FR (1) FR2189796B1 (US07652168-20100126-C00068.png)
GB (1) GB1420997A (US07652168-20100126-C00068.png)
IT (1) IT986103B (US07652168-20100126-C00068.png)
NL (1) NL7207216A (US07652168-20100126-C00068.png)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818701B2 (ja) * 1975-07-17 1983-04-14 オリンパス光学工業株式会社 テ−プカセツトノ テ−プマキソウチ
US4072852A (en) * 1976-08-23 1978-02-07 Honeywell Inc. Digital computer monitoring and restart circuit
US4172281A (en) * 1977-08-30 1979-10-23 Hewlett-Packard Company Microprogrammable control processor for a minicomputer or the like
US4241418A (en) * 1977-11-23 1980-12-23 Honeywell Information Systems Inc. Clock system having a dynamically selectable clock period
JPS5496220U (US07652168-20100126-C00068.png) * 1977-12-20 1979-07-07
US4315685A (en) * 1978-08-24 1982-02-16 Canon Kabushiki Kaisha Image forming apparatus
US4287565A (en) * 1978-09-29 1981-09-01 Robert Bosch Gmbh Monitoring system for program controlled apparatus
JPS5570975A (en) * 1978-11-20 1980-05-28 Otani Denki Kk Winding method of magnetic tape and its unit
US4360915A (en) * 1979-02-07 1982-11-23 The Warner & Swasey Company Error detection means
JPS55158067U (US07652168-20100126-C00068.png) * 1979-04-26 1980-11-13
DE3036926C2 (de) * 1980-09-30 1984-07-26 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Steuerung des Arbeitsablaufes in Datenverarbeitungsanlagen mit Mikroprogrammsteuerung
US4631702A (en) * 1984-02-28 1986-12-23 Canadian Patents and Deveopment Limited--Societe Canadienne des Brevets et d'Exploitation Limitee Computer speed control
US4958309A (en) * 1989-01-30 1990-09-18 Nrc Corporation Apparatus and method for changing frequencies
US5218704A (en) * 1989-10-30 1993-06-08 Texas Instruments Real-time power conservation for portable computers
US6158012A (en) * 1989-10-30 2000-12-05 Texas Instruments Incorporated Real-time power conservation and thermal management for computers
JPH05298134A (ja) * 1991-12-16 1993-11-12 Internatl Business Mach Corp <Ibm> コンピュータシステムにおける処理誤りの処理機構及び方法
DE4219433A1 (de) * 1992-06-13 1993-12-16 Man Technologie Gmbh Verfahren zur Steuerung eines rechnerunterstützten Prozeßsteuerungssystems
US5790609A (en) * 1996-11-04 1998-08-04 Texas Instruments Incorporated Apparatus for cleanly switching between various clock sources in a data processing system
US5903746A (en) * 1996-11-04 1999-05-11 Texas Instruments Incorporated Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3453601A (en) * 1966-10-18 1969-07-01 Philco Ford Corp Two speed arithmetic calculator
US3623017A (en) * 1969-10-22 1971-11-23 Sperry Rand Corp Dual clocking arrangement for a digital computer

Also Published As

Publication number Publication date
FR2189796A1 (US07652168-20100126-C00068.png) 1974-01-25
GB1420997A (en) 1976-01-14
DE2324906B2 (de) 1976-06-10
DE2324906A1 (de) 1973-12-06
NL7207216A (US07652168-20100126-C00068.png) 1973-11-29
BE800082A (fr) 1973-11-26
DE2324906C3 (de) 1980-06-12
US3868647A (en) 1975-02-25
FR2189796B1 (US07652168-20100126-C00068.png) 1983-07-08
JPS4944642A (US07652168-20100126-C00068.png) 1974-04-26
JPS531100B2 (US07652168-20100126-C00068.png) 1978-01-14

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