IT981095B - Dispositivo per effettuare opera zioni aritmetiche e logiche - Google Patents

Dispositivo per effettuare opera zioni aritmetiche e logiche

Info

Publication number
IT981095B
IT981095B IT21156/73A IT2115673A IT981095B IT 981095 B IT981095 B IT 981095B IT 21156/73 A IT21156/73 A IT 21156/73A IT 2115673 A IT2115673 A IT 2115673A IT 981095 B IT981095 B IT 981095B
Authority
IT
Italy
Prior art keywords
logical operations
performing arithmetic
arithmetic
logical
operations
Prior art date
Application number
IT21156/73A
Other languages
English (en)
Inventor
F Anceau
C Beaudugel
P Courboulay
J Cretin
Original Assignee
Inst Francais Du Petrole
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inst Francais Du Petrole filed Critical Inst Francais Du Petrole
Application granted granted Critical
Publication of IT981095B publication Critical patent/IT981095B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
    • G06F7/5338—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm each bitgroup having two new bits, e.g. 2nd order MBA
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352—Non-restoring division not covered by G06F7/5375
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Discrete Mathematics (AREA)
  • Complex Calculations (AREA)
IT21156/73A 1972-03-06 1973-03-05 Dispositivo per effettuare opera zioni aritmetiche e logiche IT981095B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7207787A FR2175261A5 (it) 1972-03-06 1972-03-06

Publications (1)

Publication Number Publication Date
IT981095B true IT981095B (it) 1974-10-10

Family

ID=9094733

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21156/73A IT981095B (it) 1972-03-06 1973-03-05 Dispositivo per effettuare opera zioni aritmetiche e logiche

Country Status (7)

Country Link
US (1) US3861585A (it)
JP (1) JPS5710458B2 (it)
DE (1) DE2310553C2 (it)
FR (1) FR2175261A5 (it)
GB (1) GB1419315A (it)
IT (1) IT981095B (it)
NL (1) NL182104C (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2253415A5 (it) * 1973-12-04 1975-06-27 Cii
JPS50131433U (it) * 1974-04-18 1975-10-29
JPS5411859B2 (it) * 1974-05-31 1979-05-18
US3997771A (en) * 1975-05-05 1976-12-14 Honeywell Inc. Apparatus and method for performing an arithmetic operation and multibit shift
US4041292A (en) * 1975-12-22 1977-08-09 Honeywell Information Systems Inc. High speed binary multiplication system employing a plurality of multiple generator circuits
JPS5289435A (en) * 1976-01-22 1977-07-27 Mitsubishi Electric Corp Multiplying device
JPS52155803U (it) * 1976-05-20 1977-11-26
JPS6053907B2 (ja) * 1978-01-27 1985-11-27 日本電気株式会社 二項ベクトル乗算回路
JPS58144259A (ja) * 1982-02-19 1983-08-27 Sony Corp デイジタル信号処理装置
DE3924344A1 (de) * 1989-07-22 1991-02-14 Vielhaber Michael Johannes Dip Digitalrechner-betriebsverfahren zur modularen reduktion eines produktes zweier grosser zahlen und entsprechender arithmetikprozessor
US5138570A (en) * 1990-09-20 1992-08-11 At&T Bell Laboratories Multiplier signed and unsigned overflow flags
US6519695B1 (en) * 1999-02-08 2003-02-11 Alcatel Canada Inc. Explicit rate computational engine
CN108363559B (zh) * 2018-02-13 2022-09-27 北京旷视科技有限公司 神经网络的乘法处理方法、设备和计算机可读介质

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3069085A (en) * 1958-04-15 1962-12-18 Ibm Binary digital multiplier
US3584781A (en) * 1968-07-01 1971-06-15 Bell Telephone Labor Inc Fft method and apparatus for real valued inputs
US3641331A (en) * 1969-11-12 1972-02-08 Honeywell Inc Apparatus for performing arithmetic operations on numbers using a multiple generating and storage technique
US3684879A (en) * 1970-09-09 1972-08-15 Sperry Rand Corp Division utilizing multiples of the divisor stored in an addressable memory
JPS5238703B2 (it) * 1971-12-27 1977-09-30

Also Published As

Publication number Publication date
DE2310553A1 (de) 1973-09-13
US3861585A (en) 1975-01-21
JPS5710458B2 (it) 1982-02-26
GB1419315A (en) 1975-12-31
DE2310553C2 (de) 1987-03-05
NL182104C (nl) 1988-01-04
FR2175261A5 (it) 1973-10-19
NL7303159A (it) 1973-09-10
NL182104B (nl) 1987-08-03
JPS4912734A (it) 1974-02-04

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