DE2310553C2 - - Google Patents

Info

Publication number
DE2310553C2
DE2310553C2 DE2310553A DE2310553A DE2310553C2 DE 2310553 C2 DE2310553 C2 DE 2310553C2 DE 2310553 A DE2310553 A DE 2310553A DE 2310553 A DE2310553 A DE 2310553A DE 2310553 C2 DE2310553 C2 DE 2310553C2
Authority
DE
Germany
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2310553A
Other versions
DE2310553A1 (de
Inventor
Pierre Paris Fr Courboulay
Jacques Le Chesnay Fr Cretin
Francois Gieres Fr Anceau
Claude Franconville Fr Beauducel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IFP Energies Nouvelles IFPEN
Original Assignee
IFP Energies Nouvelles IFPEN
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IFP Energies Nouvelles IFPEN filed Critical IFP Energies Nouvelles IFPEN
Publication of DE2310553A1 publication Critical patent/DE2310553A1/de
Application granted granted Critical
Publication of DE2310553C2 publication Critical patent/DE2310553C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
    • G06F7/5338—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm each bitgroup having two new bits, e.g. 2nd order MBA
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352—Non-restoring division not covered by G06F7/5375
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Discrete Mathematics (AREA)
  • Complex Calculations (AREA)
DE19732310553 1972-03-06 1973-03-02 Vorrichtung zur durchfuehrung arithmetischer und logischer operationen Granted DE2310553A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7207787A FR2175261A5 (de) 1972-03-06 1972-03-06

Publications (2)

Publication Number Publication Date
DE2310553A1 DE2310553A1 (de) 1973-09-13
DE2310553C2 true DE2310553C2 (de) 1987-03-05

Family

ID=9094733

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19732310553 Granted DE2310553A1 (de) 1972-03-06 1973-03-02 Vorrichtung zur durchfuehrung arithmetischer und logischer operationen

Country Status (7)

Country Link
US (1) US3861585A (de)
JP (1) JPS5710458B2 (de)
DE (1) DE2310553A1 (de)
FR (1) FR2175261A5 (de)
GB (1) GB1419315A (de)
IT (1) IT981095B (de)
NL (1) NL182104C (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3924344A1 (de) * 1989-07-22 1991-02-14 Vielhaber Michael Johannes Dip Digitalrechner-betriebsverfahren zur modularen reduktion eines produktes zweier grosser zahlen und entsprechender arithmetikprozessor

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2253415A5 (de) * 1973-12-04 1975-06-27 Cii
JPS50131433U (de) * 1974-04-18 1975-10-29
JPS5411859B2 (de) * 1974-05-31 1979-05-18
US3997771A (en) * 1975-05-05 1976-12-14 Honeywell Inc. Apparatus and method for performing an arithmetic operation and multibit shift
US4041292A (en) * 1975-12-22 1977-08-09 Honeywell Information Systems Inc. High speed binary multiplication system employing a plurality of multiple generator circuits
JPS5289435A (en) * 1976-01-22 1977-07-27 Mitsubishi Electric Corp Multiplying device
JPS52155803U (de) * 1976-05-20 1977-11-26
JPS6053907B2 (ja) * 1978-01-27 1985-11-27 日本電気株式会社 二項ベクトル乗算回路
JPS58144259A (ja) * 1982-02-19 1983-08-27 Sony Corp デイジタル信号処理装置
US5138570A (en) * 1990-09-20 1992-08-11 At&T Bell Laboratories Multiplier signed and unsigned overflow flags
US6519695B1 (en) * 1999-02-08 2003-02-11 Alcatel Canada Inc. Explicit rate computational engine
CN108363559B (zh) * 2018-02-13 2022-09-27 北京旷视科技有限公司 神经网络的乘法处理方法、设备和计算机可读介质

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3069085A (en) * 1958-04-15 1962-12-18 Ibm Binary digital multiplier
US3584781A (en) * 1968-07-01 1971-06-15 Bell Telephone Labor Inc Fft method and apparatus for real valued inputs
US3641331A (en) * 1969-11-12 1972-02-08 Honeywell Inc Apparatus for performing arithmetic operations on numbers using a multiple generating and storage technique
US3684879A (en) * 1970-09-09 1972-08-15 Sperry Rand Corp Division utilizing multiples of the divisor stored in an addressable memory
JPS5238703B2 (de) * 1971-12-27 1977-09-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3924344A1 (de) * 1989-07-22 1991-02-14 Vielhaber Michael Johannes Dip Digitalrechner-betriebsverfahren zur modularen reduktion eines produktes zweier grosser zahlen und entsprechender arithmetikprozessor

Also Published As

Publication number Publication date
FR2175261A5 (de) 1973-10-19
GB1419315A (en) 1975-12-31
US3861585A (en) 1975-01-21
DE2310553A1 (de) 1973-09-13
IT981095B (it) 1974-10-10
JPS5710458B2 (de) 1982-02-26
NL182104B (nl) 1987-08-03
NL7303159A (de) 1973-09-10
NL182104C (nl) 1988-01-04
JPS4912734A (de) 1974-02-04

Similar Documents

Publication Publication Date Title
JPS4887063A (de)
FR2175261A5 (de)
FR2210037B3 (de)
FR2207009B3 (de)
JPS5526998B2 (de)
JPS4958079U (de)
JPS4897183U (de)
JPS48111913U (de)
JPS48111056U (de)
CH567159A5 (de)
CH573590A5 (de)
CH569059A5 (de)
CH568100A5 (de)
CH567934A5 (de)
CH569471A5 (de)
CH569679A5 (de)
CH569688A5 (de)
CH577424A5 (de)
CH562085A5 (de)
CH567672A5 (de)
CH567668A5 (de)
CH567359A5 (de)
CH562273A5 (de)
CH566362A5 (de)
CH566333A5 (de)

Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition