IT971839B - Processo per la fabbricazione di dispositivi monolitici con tran sistori isolati - Google Patents
Processo per la fabbricazione di dispositivi monolitici con tran sistori isolatiInfo
- Publication number
- IT971839B IT971839B IT3287672A IT3287672A IT971839B IT 971839 B IT971839 B IT 971839B IT 3287672 A IT3287672 A IT 3287672A IT 3287672 A IT3287672 A IT 3287672A IT 971839 B IT971839 B IT 971839B
- Authority
- IT
- Italy
- Prior art keywords
- isolated
- manufacture
- monolithic devices
- tran sistors
- sistors
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH105572A CH536028A (de) | 1972-01-25 | 1972-01-25 | Verfahren zur Herstellung einer monolithischen Vorrichtung mit isolierten Transistoren |
Publications (1)
Publication Number | Publication Date |
---|---|
IT971839B true IT971839B (it) | 1974-05-10 |
Family
ID=4201392
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT3287672A IT971839B (it) | 1972-01-25 | 1972-12-14 | Processo per la fabbricazione di dispositivi monolitici con tran sistori isolati |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS4886490A (fr) |
CA (1) | CA992218A (fr) |
CH (1) | CH536028A (fr) |
DE (1) | DE2300412A1 (fr) |
FR (1) | FR2169069A1 (fr) |
IT (1) | IT971839B (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2532694B2 (ja) * | 1989-11-22 | 1996-09-11 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5049521A (en) * | 1989-11-30 | 1991-09-17 | Silicon General, Inc. | Method for forming dielectrically isolated semiconductor devices with contact to the wafer substrate |
-
1972
- 1972-01-25 CH CH105572A patent/CH536028A/de not_active IP Right Cessation
- 1972-12-14 IT IT3287672A patent/IT971839B/it active
- 1972-12-22 JP JP12827472A patent/JPS4886490A/ja active Pending
-
1973
- 1973-01-02 CA CA160,404A patent/CA992218A/en not_active Expired
- 1973-01-05 DE DE19732300412 patent/DE2300412A1/de active Pending
- 1973-01-09 FR FR7301492A patent/FR2169069A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE2300412A1 (de) | 1973-08-02 |
FR2169069A1 (fr) | 1973-09-07 |
CH536028A (de) | 1973-04-15 |
JPS4886490A (fr) | 1973-11-15 |
CA992218A (en) | 1976-06-29 |
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