IT8948218A0 - Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati - Google Patents

Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati

Info

Publication number
IT8948218A0
IT8948218A0 IT8948218A IT4821889A IT8948218A0 IT 8948218 A0 IT8948218 A0 IT 8948218A0 IT 8948218 A IT8948218 A IT 8948218A IT 4821889 A IT4821889 A IT 4821889A IT 8948218 A0 IT8948218 A0 IT 8948218A0
Authority
IT
Italy
Prior art keywords
reconstructing
clock
message
circuit
data transmission
Prior art date
Application number
IT8948218A
Other languages
English (en)
Other versions
IT1231650B (it
Inventor
Arturo Masdea
Rosanna Masucci
Manuel Bignami
Roberto Bartolomei
Original Assignee
Selenia Ind Elettroniche
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Selenia Ind Elettroniche filed Critical Selenia Ind Elettroniche
Priority to IT8948218A priority Critical patent/IT1231650B/it
Publication of IT8948218A0 publication Critical patent/IT8948218A0/it
Priority to EP90113813A priority patent/EP0410297A1/en
Priority to US07/557,311 priority patent/US5115208A/en
Application granted granted Critical
Publication of IT1231650B publication Critical patent/IT1231650B/it

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042Detectors therefor, e.g. correlators, state machines
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
IT8948218A 1989-07-21 1989-07-21 Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati IT1231650B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT8948218A IT1231650B (it) 1989-07-21 1989-07-21 Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati
EP90113813A EP0410297A1 (en) 1989-07-21 1990-07-19 Circuit to be used in data transmission systems, which regenerates the clock signal starting from a given message
US07/557,311 US5115208A (en) 1989-07-21 1990-07-23 Pll clock signal regenerator using a phase correlator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8948218A IT1231650B (it) 1989-07-21 1989-07-21 Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati

Publications (2)

Publication Number Publication Date
IT8948218A0 true IT8948218A0 (it) 1989-07-21
IT1231650B IT1231650B (it) 1991-12-18

Family

ID=11265305

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8948218A IT1231650B (it) 1989-07-21 1989-07-21 Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati

Country Status (3)

Country Link
US (1) US5115208A (it)
EP (1) EP0410297A1 (it)
IT (1) IT1231650B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2673782B1 (fr) * 1991-03-08 1994-04-08 Alcatel Espace Recepteur de signaux modules en frequence a bande d'accrochage controlee.
US5471159A (en) * 1992-09-18 1995-11-28 Tektronix, Inc. Setup or hold violation triggering
US5533017A (en) * 1994-05-02 1996-07-02 Advanced Micro Devices, Inc. Line interface device for fast-packet switching network
FR2728118A1 (fr) * 1994-12-08 1996-06-14 Matra Mhs Comparateur de phase entre un signal numerique et un signal d'horloge, et boucle a verrouillage de phase correspondante
US5787128A (en) * 1995-12-22 1998-07-28 Motorola, Inc. Nonlinear signal correlator and method therefor
JP3094971B2 (ja) * 1997-10-08 2000-10-03 日本電気株式会社 位相比較回路並びにこれを用いた位相同期ループ回路及びシリアル―パラレル変換回路
US6316966B1 (en) * 1999-07-16 2001-11-13 Conexant Systems, Inc. Apparatus and method for servo-controlled self-centering phase detector
US6300838B1 (en) * 1999-12-22 2001-10-09 International Business Machines Corporation Method and apparatus for derivative controlled phase locked loop systems
US6351153B1 (en) * 2000-10-30 2002-02-26 Hewlett-Packard Company Phase detector with high precision
JP3850856B2 (ja) * 2002-05-17 2006-11-29 富士通株式会社 Plo装置
US6774823B1 (en) * 2003-01-22 2004-08-10 Analog Devices, Inc. Clock synchronization logic
JP4437541B2 (ja) * 2004-11-17 2010-03-24 富士通マイクロエレクトロニクス株式会社 リセット制御回路及びリセット制御方法
CN115603745B (zh) * 2022-11-29 2023-03-07 成都芯矩阵科技有限公司 一种自偏置双环延迟电路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961273A (en) * 1972-06-19 1976-06-01 Sanders Associates, Inc. Frequency memory apparatus
FR2327553A1 (fr) * 1975-10-10 1977-05-06 Thomson Csf Dispositif de mesure par correlation electronique du retard entre deux signaux temporels et systemes comportant un tel dispositif
CH625922A5 (en) * 1977-08-16 1981-10-15 Hasler Ag Phase-locked loop with display of phase-locked state
US4151463A (en) * 1978-02-02 1979-04-24 Bell Telephone Laboratories, Incorporated Phase locked loop indicator
EP0054322B1 (en) * 1980-12-12 1985-07-03 Philips Electronics Uk Limited Phase sensitive detector
US4494080A (en) * 1981-11-16 1985-01-15 International Business Machines Corporation Voltage-controlled oscillator with independent gain and frequency controls
JPS61191121A (ja) * 1985-02-20 1986-08-25 Hitachi Ltd 発振装置
US4787097A (en) * 1987-02-11 1988-11-22 International Business Machines Corporation NRZ phase-locked loop circuit with associated monitor and recovery circuitry

Also Published As

Publication number Publication date
IT1231650B (it) 1991-12-18
EP0410297A1 (en) 1991-01-30
US5115208A (en) 1992-05-19

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960723