IT8567656A0 - Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo - Google Patents

Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo

Info

Publication number
IT8567656A0
IT8567656A0 IT8567656A IT6765685A IT8567656A0 IT 8567656 A0 IT8567656 A0 IT 8567656A0 IT 8567656 A IT8567656 A IT 8567656A IT 6765685 A IT6765685 A IT 6765685A IT 8567656 A0 IT8567656 A0 IT 8567656A0
Authority
IT
Italy
Prior art keywords
logic circuit
cmos technology
sequential logic
technology operating
synchronism signal
Prior art date
Application number
IT8567656A
Other languages
English (en)
Other versions
IT1199895B (it
Inventor
Mario Fassino
Guido Ghisio
Original Assignee
Csselt Centro Studi E Lab Tele
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Csselt Centro Studi E Lab Tele filed Critical Csselt Centro Studi E Lab Tele
Priority to IT67656/85A priority Critical patent/IT1199895B/it
Publication of IT8567656A0 publication Critical patent/IT8567656A0/it
Priority to DE198686109657T priority patent/DE209829T1/de
Priority to DE8686109657T priority patent/DE3685524T2/de
Priority to EP86109657A priority patent/EP0209829B1/en
Priority to JP61164889A priority patent/JPS6220411A/ja
Priority to CA000513913A priority patent/CA1253583A/en
Application granted granted Critical
Publication of IT1199895B publication Critical patent/IT1199895B/it

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356069Bistable circuits using additional transistors in the feedback circuit
    • H03K3/356078Bistable circuits using additional transistors in the feedback circuit with synchronous operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356017Bistable circuits using additional transistors in the input circuit
    • H03K3/356052Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/3562Bistable circuits of the master-slave type
IT67656/85A 1985-07-17 1985-07-17 Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo IT1199895B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT67656/85A IT1199895B (it) 1985-07-17 1985-07-17 Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo
DE198686109657T DE209829T1 (de) 1985-07-17 1986-07-14 Durch ein einziges taktsignal betaetigter baustein fuer sequenzielle logik in cmos-technologie.
DE8686109657T DE3685524T2 (de) 1985-07-17 1986-07-14 Baustein fuer sequenzielle logik und netzwerk in cmos-technologie.
EP86109657A EP0209829B1 (en) 1985-07-17 1986-07-14 Sequential-logic basic element and network in cmos technologyy
JP61164889A JPS6220411A (ja) 1985-07-17 1986-07-15 1つのクロツク信号で動作するcmos技術の逐次論理基本素子
CA000513913A CA1253583A (en) 1985-07-17 1986-07-16 Sequential logic element in cmos technology operating on a single clock signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT67656/85A IT1199895B (it) 1985-07-17 1985-07-17 Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo

Publications (2)

Publication Number Publication Date
IT8567656A0 true IT8567656A0 (it) 1985-07-17
IT1199895B IT1199895B (it) 1989-01-05

Family

ID=11304271

Family Applications (1)

Application Number Title Priority Date Filing Date
IT67656/85A IT1199895B (it) 1985-07-17 1985-07-17 Circuito base di logica sequenziale in tecnologia cmos operante mediante un unico segnale di sincronismo

Country Status (5)

Country Link
EP (1) EP0209829B1 (it)
JP (1) JPS6220411A (it)
CA (1) CA1253583A (it)
DE (2) DE209829T1 (it)
IT (1) IT1199895B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63224480A (ja) * 1987-03-13 1988-09-19 Nec Corp 同期信号発生装置
FR2627917A1 (fr) * 1988-02-26 1989-09-01 Radiotechnique Compelec Element de memoire du type maitre-esclave et bascule pour diviseur de frequence par 2 comportant de tels elements de memoire
FR2654881B1 (fr) * 1989-11-23 1994-10-14 Sgs Thomson Microelectronics Reseau logique programmable en technologie cmos.
US20070152983A1 (en) 2005-12-30 2007-07-05 Apple Computer, Inc. Touch pad with symbols based on mode
US8022935B2 (en) 2006-07-06 2011-09-20 Apple Inc. Capacitance sensing electrode with integrated I/O mechanism

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553234A (en) * 1978-06-22 1980-01-11 Toshiba Corp Self-supporting cmos latch circuit
JPS5922435A (ja) * 1982-07-28 1984-02-04 Nec Corp ラツチ回路
US4484087A (en) * 1983-03-23 1984-11-20 General Electric Company CMOS latch cell including five transistors, and static flip-flops employing the cell
US4554467A (en) * 1983-06-22 1985-11-19 Motorola, Inc. CMOS Flip-flop
JPS6125321A (ja) * 1984-07-16 1986-02-04 Nec Corp デ−タラツチ回路

Also Published As

Publication number Publication date
JPS6220411A (ja) 1987-01-29
EP0209829A3 (en) 1989-02-08
CA1253583A (en) 1989-05-02
EP0209829A2 (en) 1987-01-28
DE3685524T2 (de) 1993-01-21
DE3685524D1 (de) 1992-07-09
DE209829T1 (de) 1989-06-01
IT1199895B (it) 1989-01-05
EP0209829B1 (en) 1992-06-03

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970718