IT8167249A0 - Procedimento di trattamento termico di un materiale a base di silice particolarmente in applicazione al la tecnica dei semiconduttori - Google Patents

Procedimento di trattamento termico di un materiale a base di silice particolarmente in applicazione al la tecnica dei semiconduttori

Info

Publication number
IT8167249A0
IT8167249A0 IT8167249A IT6724981A IT8167249A0 IT 8167249 A0 IT8167249 A0 IT 8167249A0 IT 8167249 A IT8167249 A IT 8167249A IT 6724981 A IT6724981 A IT 6724981A IT 8167249 A0 IT8167249 A0 IT 8167249A0
Authority
IT
Italy
Prior art keywords
silica
application
heat treatment
based material
treatment procedure
Prior art date
Application number
IT8167249A
Other languages
English (en)
Other versions
IT1144106B (it
Inventor
Michelangelo Delfino
Original Assignee
Fairchild Camera Instr Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera Instr Co filed Critical Fairchild Camera Instr Co
Publication of IT8167249A0 publication Critical patent/IT8167249A0/it
Application granted granted Critical
Publication of IT1144106B publication Critical patent/IT1144106B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Glass Compositions (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Silicon Compounds (AREA)
IT67249/81A 1980-04-28 1981-02-23 Procedimento di trattamento termico di un materiale a base di silice particolarmente in applicazione alla tecnica dei semiconduttori IT1144106B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14398380A 1980-04-28 1980-04-28

Publications (2)

Publication Number Publication Date
IT8167249A0 true IT8167249A0 (it) 1981-02-23
IT1144106B IT1144106B (it) 1986-10-29

Family

ID=22506554

Family Applications (1)

Application Number Title Priority Date Filing Date
IT67249/81A IT1144106B (it) 1980-04-28 1981-02-23 Procedimento di trattamento termico di un materiale a base di silice particolarmente in applicazione alla tecnica dei semiconduttori

Country Status (8)

Country Link
US (1) US4443493A (it)
JP (1) JPS56167334A (it)
CA (1) CA1174285A (it)
DE (1) DE3108146A1 (it)
FR (1) FR2481517B1 (it)
GB (1) GB2075749B (it)
IT (1) IT1144106B (it)
NL (1) NL8101679A (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56160050A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Semiconductor device and manufacture thereof
US4349584A (en) * 1981-04-28 1982-09-14 Rca Corporation Process for tapering openings in ternary glass coatings
US4431900A (en) * 1982-01-15 1984-02-14 Fairchild Camera & Instrument Corporation Laser induced flow Ge-O based materials
US4474831A (en) * 1982-08-27 1984-10-02 Varian Associates, Inc. Method for reflow of phosphosilicate glass
US4472456A (en) * 1982-11-18 1984-09-18 Texas Instruments Incorporated Absorption optimized laser annealing
US5098854A (en) * 1984-07-09 1992-03-24 National Semiconductor Corporation Process for forming self-aligned silicide base contact for bipolar transistor
DE3437072A1 (de) * 1984-10-09 1986-04-10 Dieter Prof. Dr. Linz Bäuerle Verfahren zur herstellung von leiterbahnen und/oder elektroden auf dielektrischem material
US5080962A (en) * 1985-02-25 1992-01-14 University Of Florida Method for making silica optical devices and devices produced thereby
NL8500931A (nl) * 1985-03-29 1986-10-16 Philips Nv Werkwijze voor het omzetten van polykristallijn halfgeleidermateriaal in monokristallijn halfgeleidermateriaal.
US4729962A (en) * 1986-03-24 1988-03-08 The United States Of America As Represented By The United States Department Of Energy Semiconductor junction formation by directed heat
US5221422A (en) * 1988-06-06 1993-06-22 Digital Equipment Corporation Lithographic technique using laser scanning for fabrication of electronic components and the like
EP0388075B1 (en) * 1989-03-16 1996-11-06 STMicroelectronics, Inc. Contacts for semiconductor devices
US5427825A (en) * 1993-02-09 1995-06-27 Rutgers, The State University Localized surface glazing of ceramic articles
US7419922B2 (en) * 2001-05-09 2008-09-02 Gibson Richard M Flame-resistant, high visibility, anti-static fabric and apparel formed therefrom
US6706650B2 (en) 2001-05-09 2004-03-16 Glen Raven, Inc. Flame-resistant and high visibility fabric and apparel formed therefrom
US6946412B2 (en) * 2001-05-09 2005-09-20 Glen Raven, Inc. Flame-resistant, high visibility, anti-static fabric and apparel formed therefrom
US6787228B2 (en) * 2001-05-09 2004-09-07 Glen Raven, Inc. Flame-resistant and high visibility fabric and apparel formed therefrom
WO2007132590A1 (ja) * 2006-05-11 2007-11-22 Asahi Glass Company, Limited 溶融ガラスの泡除去方法および除去装置、並びにガラスの製造方法
FR2951281B1 (fr) * 2009-10-12 2012-03-23 Commissariat Energie Atomique Procede de microdeformation de la face avant d'une piece mince, par modification de la face arriere ou de la peripherie de la piece
US11508808B2 (en) * 2018-10-11 2022-11-22 Actron Technology Corporation Rectifier device, rectifier, generator device, and powertrain for vehicle

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2040180B2 (de) * 1970-01-22 1977-08-25 Intel Corp, Mountain View, Calif. (V.St.A.) Verfahren zur verhinderung von mechanischen bruechen einer duennen, die oberflaeche eines halbleiterkoerpers ueberdeckende isolierschichten ueberziehenden elektrisch leitenden schicht
US3912558A (en) * 1974-05-03 1975-10-14 Fairchild Camera Instr Co Method of MOS circuit fabrication
FR2277430A1 (fr) * 1974-07-03 1976-01-30 Labo Electronique Physique Galette de microcanaux avec face d'entree des canaux arrondie et procede de fabrication
US4151008A (en) * 1974-11-15 1979-04-24 Spire Corporation Method involving pulsed light processing of semiconductor devices
US3920483A (en) * 1974-11-25 1975-11-18 Ibm Method of ion implantation through a photoresist mask
GB1571795A (en) * 1975-12-01 1980-07-16 Manuf Belge D Aiguilles Sa Smoothing the eyes of metal needles
JPS5280779A (en) * 1975-12-27 1977-07-06 Fujitsu Ltd Production of simiconductor device
CA1095387A (en) * 1976-02-17 1981-02-10 Conrad M. Banas Skin melting
GB2023926B (en) * 1978-06-22 1983-03-16 Western Electric Co Conductors for semiconductor devices
US4258078A (en) * 1978-06-22 1981-03-24 Bell Telephone Laboratories, Incorporated Metallization for integrated circuits
JPS5526619A (en) * 1978-08-15 1980-02-26 Toshiba Corp Method of producing semiconductor device
JPS5534444A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Preparation of semiconductor device
GB2056769B (en) * 1978-11-28 1983-03-30 Western Electric Co Dual wavelength laser annealing of material
IT1140645B (it) * 1979-03-05 1986-10-01 Rca Corp Materiale composito di passivazione per un dispositivo semiconduttore comprendente uno strato di nitruro di silicio (si alla terza in alla quarta) ed uno strato di vetro al fosfosilicato (psg) e metodo di fabbricazione delle stesso
DE2937993A1 (de) * 1979-09-20 1981-04-02 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von integrierten mos-halbleiterschaltungen nach der silizium-gate-technologie
US4284659A (en) * 1980-05-12 1981-08-18 Bell Telephone Laboratories Insulation layer reflow

Also Published As

Publication number Publication date
FR2481517A1 (fr) 1981-10-30
IT1144106B (it) 1986-10-29
CA1174285A (en) 1984-09-11
US4443493A (en) 1984-04-17
GB2075749B (en) 1984-08-30
DE3108146A1 (de) 1981-12-24
GB2075749A (en) 1981-11-18
NL8101679A (nl) 1981-11-16
JPS56167334A (en) 1981-12-23
FR2481517B1 (fr) 1985-11-22
DE3108146C2 (it) 1989-05-18

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19940228