IT8123697A0 - Circuito di selezione di orologio. - Google Patents

Circuito di selezione di orologio.

Info

Publication number
IT8123697A0
IT8123697A0 IT8123697A IT2369781A IT8123697A0 IT 8123697 A0 IT8123697 A0 IT 8123697A0 IT 8123697 A IT8123697 A IT 8123697A IT 2369781 A IT2369781 A IT 2369781A IT 8123697 A0 IT8123697 A0 IT 8123697A0
Authority
IT
Italy
Prior art keywords
selection circuit
clock selection
clock
circuit
selection
Prior art date
Application number
IT8123697A
Other languages
English (en)
Other versions
IT1138540B (it
Inventor
Ashfaq R Khan
Max S Macrander
Konstanty E Krylow
Original Assignee
Gte Automatic Electric Lab Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Automatic Electric Lab Inc filed Critical Gte Automatic Electric Lab Inc
Publication of IT8123697A0 publication Critical patent/IT8123697A0/it
Application granted granted Critical
Publication of IT1138540B publication Critical patent/IT1138540B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
IT23697/81A 1980-09-02 1981-08-31 Circuito di selezione di orologio IT1138540B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/182,871 US4322580A (en) 1980-09-02 1980-09-02 Clock selection circuit

Publications (2)

Publication Number Publication Date
IT8123697A0 true IT8123697A0 (it) 1981-08-31
IT1138540B IT1138540B (it) 1986-09-17

Family

ID=22670412

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23697/81A IT1138540B (it) 1980-09-02 1981-08-31 Circuito di selezione di orologio

Country Status (4)

Country Link
US (1) US4322580A (it)
BE (1) BE889373A (it)
CA (1) CA1161935A (it)
IT (1) IT1138540B (it)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920540A (en) * 1987-02-25 1990-04-24 Stratus Computer, Inc. Fault-tolerant digital timing apparatus and method
US4490581A (en) * 1982-09-30 1984-12-25 Gte Automatic Electric Labs Inc. Clock selection control circuit
US4538272A (en) * 1983-12-22 1985-08-27 Gte Automatic Electric Incorporated Prioritized clock selection circuit
US4825407A (en) * 1984-07-26 1989-04-25 Miles Inc. Method and circuit for controlling single chip microcomputer
US4653054A (en) * 1985-04-12 1987-03-24 Itt Corporation Redundant clock combiner
US4667328A (en) * 1985-04-29 1987-05-19 Mieczyslaw Mirowski Clocking circuit with back-up clock source
GB2178926A (en) * 1985-08-09 1987-02-18 Plessey Co Plc Clock signal selection and security arrangements
US5020024A (en) * 1987-01-16 1991-05-28 Stratus Computer, Inc. Method and apparatus for detecting selected absence of digital logic synchronism
EP0294505B1 (en) * 1987-06-11 1993-03-03 International Business Machines Corporation Clock generator system
US4882738A (en) * 1987-06-25 1989-11-21 Nec Corporation Clock control system
US4899351A (en) * 1988-07-18 1990-02-06 Western Digital Corporation Transient free clock switch logic
US4979191A (en) * 1989-05-17 1990-12-18 The Boeing Company Autonomous N-modular redundant fault tolerant clock system
JP2676966B2 (ja) * 1990-03-16 1997-11-17 日本電気株式会社 シングルチップマイクロコンピュータ
US5134703A (en) * 1990-06-11 1992-07-28 Nemonix, Inc. External clock unit for a computer
US5155841A (en) * 1990-09-24 1992-10-13 Nemonix, Inc. External clock unit for a computer
JPH06502264A (ja) * 1990-10-12 1994-03-10 インテル・コーポレーション 動的に切替え自在な多周波数クロック発生器
CA2059143C (en) * 1991-01-25 2000-05-16 Takeshi Miyao Processing unit for a computer and a computer system incorporating such a processing unit
GB2269249B (en) * 1992-07-30 1995-11-01 Acorn Computers Ltd Integrated circuit clock speed control
JPH0778039A (ja) * 1993-09-08 1995-03-20 Fujitsu Ltd クロック選択制御方式
JPH0816276A (ja) * 1994-06-30 1996-01-19 Mitsubishi Denki Semiconductor Software Kk マイクロコンピュータ
US5689643A (en) * 1994-12-09 1997-11-18 O'hanlan; Thomas B. Communication device for transmitting asynchronous formatted data synchronously
US6069498A (en) * 1995-05-11 2000-05-30 Siemens Aktiengesellschaft Clock generator for CMOS circuits with dynamic registers
US5568097A (en) * 1995-09-25 1996-10-22 International Business Machines Inc. Ultra high availability clock chip
US5799177A (en) * 1997-01-03 1998-08-25 Intel Corporation Automatic external clock detect and source select circuit
US6718474B1 (en) 2000-09-21 2004-04-06 Stratus Technologies Bermuda Ltd. Methods and apparatus for clock management based on environmental conditions
US8116321B2 (en) * 2004-06-16 2012-02-14 Thomson Licensing System and method for routing asynchronous signals
DE602005025761D1 (de) 2004-06-16 2011-02-17 Thomson Licensing System und verfahren zum routen asynchroner signale
ATE555431T1 (de) * 2008-02-28 2012-05-15 Synopsys Inc Taktschaltungen und verfahren

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1295627B (de) * 1967-01-25 1969-05-22 Siemens Ag Schaltungsanordnung zur UEberwachung von Taktgebern
US3803568A (en) * 1973-04-06 1974-04-09 Gte Automatic Electric Lab Inc System clock for electronic communication systems

Also Published As

Publication number Publication date
US4322580A (en) 1982-03-30
BE889373A (fr) 1981-10-16
CA1161935A (en) 1984-02-07
IT1138540B (it) 1986-09-17

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