IT8049389A0 - MANUFACTURING PROCEDURE FOR P-N JUNCTIONS WITH HIGH BREAKDOWN VOLTAGE - Google Patents
MANUFACTURING PROCEDURE FOR P-N JUNCTIONS WITH HIGH BREAKDOWN VOLTAGEInfo
- Publication number
- IT8049389A0 IT8049389A0 IT8049389A IT4938980A IT8049389A0 IT 8049389 A0 IT8049389 A0 IT 8049389A0 IT 8049389 A IT8049389 A IT 8049389A IT 4938980 A IT4938980 A IT 4938980A IT 8049389 A0 IT8049389 A0 IT 8049389A0
- Authority
- IT
- Italy
- Prior art keywords
- junctions
- breakdown voltage
- manufacturing procedure
- high breakdown
- procedure
- Prior art date
Links
- 230000015556 catabolic process Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Manufacturing & Machinery (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Ceramic Engineering (AREA)
- Thyristors (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6267679A | 1979-08-01 | 1979-08-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8049389A0 true IT8049389A0 (en) | 1980-07-31 |
IT1145411B IT1145411B (en) | 1986-11-05 |
Family
ID=22044093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT49389/80A IT1145411B (en) | 1979-08-01 | 1980-07-31 | HIGH BREAKING VOLTAGE P-N JUNCTION MANUFACTURING PROCEDURE |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS5623742A (en) |
DE (1) | DE3028185A1 (en) |
FR (1) | FR2462780A1 (en) |
GB (1) | GB2056168A (en) |
IT (1) | IT1145411B (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4369072A (en) * | 1981-01-22 | 1983-01-18 | International Business Machines Corp. | Method for forming IGFET devices having improved drain voltage characteristics |
JPS60117681A (en) * | 1983-11-29 | 1985-06-25 | Mitsubishi Electric Corp | Semiconductor device |
JPH063798B2 (en) * | 1985-02-06 | 1994-01-12 | 日本電気株式会社 | Method for manufacturing semiconductor device |
JPH01147829A (en) * | 1987-12-04 | 1989-06-09 | Toshiba Corp | Manufacture of semiconductor device |
JP2706460B2 (en) * | 1988-03-14 | 1998-01-28 | 富士通株式会社 | Ion implantation method |
JP4629809B2 (en) * | 1996-03-27 | 2011-02-09 | クリー,インコーポレイテッド | Method of manufacturing a semiconductor device having a SiC semiconductor layer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT956828B (en) * | 1971-08-05 | 1973-10-10 | Rca Corp | PROCESS FOR OBTAINING DIFFUSED SEMICONDUCTOR REGIO NI WITH A REDUCED NUMBER OF CRYSTAL DEFECTS |
IL40189A0 (en) * | 1971-09-09 | 1972-10-29 | Trusty J | Method and apparatus for preparing and analyzing serum samples |
DE2304647C2 (en) * | 1973-01-31 | 1984-06-28 | Siemens AG, 1000 Berlin und 8000 München | Method for producing a doped zone in a semiconductor body |
JPS543479A (en) * | 1977-06-09 | 1979-01-11 | Toshiba Corp | Semiconductor device and its manufacture |
-
1980
- 1980-04-16 GB GB8012509A patent/GB2056168A/en not_active Withdrawn
- 1980-07-24 JP JP10062980A patent/JPS5623742A/en active Pending
- 1980-07-25 DE DE19803028185 patent/DE3028185A1/en not_active Ceased
- 1980-07-28 FR FR8016605A patent/FR2462780A1/en active Granted
- 1980-07-31 IT IT49389/80A patent/IT1145411B/en active
Also Published As
Publication number | Publication date |
---|---|
DE3028185A1 (en) | 1981-02-26 |
GB2056168A (en) | 1981-03-11 |
IT1145411B (en) | 1986-11-05 |
FR2462780B1 (en) | 1983-02-18 |
JPS5623742A (en) | 1981-03-06 |
FR2462780A1 (en) | 1981-02-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970729 |