IT8049389A0 - MANUFACTURING PROCEDURE FOR P-N JUNCTIONS WITH HIGH BREAKDOWN VOLTAGE - Google Patents

MANUFACTURING PROCEDURE FOR P-N JUNCTIONS WITH HIGH BREAKDOWN VOLTAGE

Info

Publication number
IT8049389A0
IT8049389A0 IT8049389A IT4938980A IT8049389A0 IT 8049389 A0 IT8049389 A0 IT 8049389A0 IT 8049389 A IT8049389 A IT 8049389A IT 4938980 A IT4938980 A IT 4938980A IT 8049389 A0 IT8049389 A0 IT 8049389A0
Authority
IT
Italy
Prior art keywords
junctions
breakdown voltage
manufacturing procedure
high breakdown
procedure
Prior art date
Application number
IT8049389A
Other languages
Italian (it)
Other versions
IT1145411B (en
Inventor
Multani S Jagir
Sandhu Jagtar
Original Assignee
Gen Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Instrument Corp filed Critical Gen Instrument Corp
Publication of IT8049389A0 publication Critical patent/IT8049389A0/en
Application granted granted Critical
Publication of IT1145411B publication Critical patent/IT1145411B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652Through-implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Thyristors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
IT49389/80A 1979-08-01 1980-07-31 HIGH BREAKING VOLTAGE P-N JUNCTION MANUFACTURING PROCEDURE IT1145411B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6267679A 1979-08-01 1979-08-01

Publications (2)

Publication Number Publication Date
IT8049389A0 true IT8049389A0 (en) 1980-07-31
IT1145411B IT1145411B (en) 1986-11-05

Family

ID=22044093

Family Applications (1)

Application Number Title Priority Date Filing Date
IT49389/80A IT1145411B (en) 1979-08-01 1980-07-31 HIGH BREAKING VOLTAGE P-N JUNCTION MANUFACTURING PROCEDURE

Country Status (5)

Country Link
JP (1) JPS5623742A (en)
DE (1) DE3028185A1 (en)
FR (1) FR2462780A1 (en)
GB (1) GB2056168A (en)
IT (1) IT1145411B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4369072A (en) * 1981-01-22 1983-01-18 International Business Machines Corp. Method for forming IGFET devices having improved drain voltage characteristics
JPS60117681A (en) * 1983-11-29 1985-06-25 Mitsubishi Electric Corp Semiconductor device
JPH063798B2 (en) * 1985-02-06 1994-01-12 日本電気株式会社 Method for manufacturing semiconductor device
JPH01147829A (en) * 1987-12-04 1989-06-09 Toshiba Corp Manufacture of semiconductor device
JP2706460B2 (en) * 1988-03-14 1998-01-28 富士通株式会社 Ion implantation method
JP4629809B2 (en) * 1996-03-27 2011-02-09 クリー,インコーポレイテッド Method of manufacturing a semiconductor device having a SiC semiconductor layer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT956828B (en) * 1971-08-05 1973-10-10 Rca Corp PROCESS FOR OBTAINING DIFFUSED SEMICONDUCTOR REGIO NI WITH A REDUCED NUMBER OF CRYSTAL DEFECTS
IL40189A0 (en) * 1971-09-09 1972-10-29 Trusty J Method and apparatus for preparing and analyzing serum samples
DE2304647C2 (en) * 1973-01-31 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Method for producing a doped zone in a semiconductor body
JPS543479A (en) * 1977-06-09 1979-01-11 Toshiba Corp Semiconductor device and its manufacture

Also Published As

Publication number Publication date
DE3028185A1 (en) 1981-02-26
GB2056168A (en) 1981-03-11
IT1145411B (en) 1986-11-05
FR2462780B1 (en) 1983-02-18
JPS5623742A (en) 1981-03-06
FR2462780A1 (en) 1981-02-13

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970729