IT8024540A0 - Modulo di ingresso-uscita per un elaboratore elettronico. - Google Patents

Modulo di ingresso-uscita per un elaboratore elettronico.

Info

Publication number
IT8024540A0
IT8024540A0 IT8024540A IT2454080A IT8024540A0 IT 8024540 A0 IT8024540 A0 IT 8024540A0 IT 8024540 A IT8024540 A IT 8024540A IT 2454080 A IT2454080 A IT 2454080A IT 8024540 A0 IT8024540 A0 IT 8024540A0
Authority
IT
Italy
Prior art keywords
input
output module
electronic computer
electronic
computer
Prior art date
Application number
IT8024540A
Other languages
English (en)
Other versions
IT1149252B (it
Inventor
Giovanni Chiabrando
Mario Landi
Original Assignee
Sits Soc It Telecom Siemens
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sits Soc It Telecom Siemens filed Critical Sits Soc It Telecom Siemens
Priority to IT24540/80A priority Critical patent/IT1149252B/it
Publication of IT8024540A0 publication Critical patent/IT8024540A0/it
Priority to FR8116566A priority patent/FR2489986A1/fr
Priority to BR8105668A priority patent/BR8105668A/pt
Priority to DE19813135564 priority patent/DE3135564A1/de
Priority to GB8127217A priority patent/GB2085623A/en
Application granted granted Critical
Publication of IT1149252B publication Critical patent/IT1149252B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bus Control (AREA)
IT24540/80A 1980-09-09 1980-09-09 Modulo di ingresso-uscita per un elaboratore elettronico IT1149252B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT24540/80A IT1149252B (it) 1980-09-09 1980-09-09 Modulo di ingresso-uscita per un elaboratore elettronico
FR8116566A FR2489986A1 (fr) 1980-09-09 1981-08-31 Module d'entree-sortie pour un ordinateur electronique
BR8105668A BR8105668A (pt) 1980-09-09 1981-09-04 Modulo de entrada-saida para um processador eletronico
DE19813135564 DE3135564A1 (de) 1980-09-09 1981-09-08 "ein-ausgabe modul eines elektronischen rechners"
GB8127217A GB2085623A (en) 1980-09-09 1981-09-09 Improvements in or Relating to Input-output Modules for Electronic Processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT24540/80A IT1149252B (it) 1980-09-09 1980-09-09 Modulo di ingresso-uscita per un elaboratore elettronico

Publications (2)

Publication Number Publication Date
IT8024540A0 true IT8024540A0 (it) 1980-09-09
IT1149252B IT1149252B (it) 1986-12-03

Family

ID=11213909

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24540/80A IT1149252B (it) 1980-09-09 1980-09-09 Modulo di ingresso-uscita per un elaboratore elettronico

Country Status (5)

Country Link
BR (1) BR8105668A (it)
DE (1) DE3135564A1 (it)
FR (1) FR2489986A1 (it)
GB (1) GB2085623A (it)
IT (1) IT1149252B (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5131081A (en) * 1989-03-23 1992-07-14 North American Philips Corp., Signetics Div. System having a host independent input/output processor for controlling data transfer between a memory and a plurality of i/o controllers

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2131787C3 (de) * 1971-06-26 1973-12-20 Ibm Deutschland Gmbh, 7000 Stuttgart Schaltungsanordnung zur Fehlerfeststellung bei Datenverarbeitungssystemen
CH613061A5 (en) * 1975-06-30 1979-08-31 Honeywell Inf Systems Computer apparatus including an omnibus line
GB1573329A (en) * 1976-09-29 1980-08-20 Honeywell Inf Systems Method and apparatu for detecting errors in parity encoded data
US4296466A (en) * 1978-01-23 1981-10-20 Data General Corporation Data processing system including a separate input/output processor with micro-interrupt request apparatus
DE2845218C2 (de) * 1978-10-17 1986-03-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Mikroprogrammgesteuerte Ein-/Ausgabeeinrichtung und Verfahren zum Durchführen von Ein-/Ausgabeoperationen
IT1100916B (it) * 1978-11-06 1985-09-28 Honeywell Inf Systems Apparato per gestione di richieste di trasferimento dati in sistemi di elaborazione dati

Also Published As

Publication number Publication date
IT1149252B (it) 1986-12-03
DE3135564A1 (de) 1982-05-19
FR2489986A1 (fr) 1982-03-12
BR8105668A (pt) 1982-05-18
GB2085623A (en) 1982-04-28

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