IT7921949A0 - Metodo per creare uno strato epitassiale. - Google Patents

Metodo per creare uno strato epitassiale.

Info

Publication number
IT7921949A0
IT7921949A0 IT7921949A IT2194979A IT7921949A0 IT 7921949 A0 IT7921949 A0 IT 7921949A0 IT 7921949 A IT7921949 A IT 7921949A IT 2194979 A IT2194979 A IT 2194979A IT 7921949 A0 IT7921949 A0 IT 7921949A0
Authority
IT
Italy
Prior art keywords
creating
epitaxial layer
epitaxial
layer
Prior art date
Application number
IT7921949A
Other languages
English (en)
Other versions
IT1112317B (it
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of IT7921949A0 publication Critical patent/IT7921949A0/it
Application granted granted Critical
Publication of IT1112317B publication Critical patent/IT1112317B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
IT21949/79A 1978-04-21 1979-04-18 Metodo per creare uno strato epitassiale IT1112317B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE7804268,A NL187414C (nl) 1978-04-21 1978-04-21 Werkwijze voor het aanbrengen van een epitaxiale laag.

Publications (2)

Publication Number Publication Date
IT7921949A0 true IT7921949A0 (it) 1979-04-18
IT1112317B IT1112317B (it) 1986-01-13

Family

ID=19830695

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21949/79A IT1112317B (it) 1978-04-21 1979-04-18 Metodo per creare uno strato epitassiale

Country Status (8)

Country Link
JP (1) JPS54141560A (it)
AU (1) AU523988B2 (it)
CA (1) CA1134059A (it)
DE (1) DE2915883A1 (it)
FR (1) FR2423865A1 (it)
GB (1) GB2019644B (it)
IT (1) IT1112317B (it)
NL (1) NL187414C (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0671770B1 (en) * 1993-02-09 2000-08-02 GENERAL SEMICONDUCTOR, Inc. Multilayer epitaxy for a silicon diode
JP6477210B2 (ja) 2015-04-30 2019-03-06 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP6358472B2 (ja) * 2015-06-08 2018-07-18 信越半導体株式会社 エピタキシャルウェーハの製造方法
JP6447960B2 (ja) * 2016-04-01 2019-01-09 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL288409A (it) * 1962-02-02
DE2547692C3 (de) * 1975-10-24 1979-10-31 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen einer Halbleiteranordnung

Also Published As

Publication number Publication date
FR2423865B1 (it) 1984-07-27
DE2915883A1 (de) 1979-10-31
DE2915883C2 (it) 1987-01-22
NL187414B (nl) 1991-04-16
AU4604679A (en) 1979-10-25
GB2019644B (en) 1982-09-29
JPS54141560A (en) 1979-11-02
FR2423865A1 (fr) 1979-11-16
GB2019644A (en) 1979-10-31
NL187414C (nl) 1991-09-16
CA1134059A (en) 1982-10-19
IT1112317B (it) 1986-01-13
NL7804268A (nl) 1979-10-23
JPS5538819B2 (it) 1980-10-07
AU523988B2 (en) 1982-08-26

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