IT7830897A0 - Diretta dell'indirizzo di salto. apparato di interruzione di un programma, su base prioritaria, dotato di mezzi per l'alimentazione - Google Patents

Diretta dell'indirizzo di salto. apparato di interruzione di un programma, su base prioritaria, dotato di mezzi per l'alimentazione

Info

Publication number
IT7830897A0
IT7830897A0 IT7830897A IT3089778A IT7830897A0 IT 7830897 A0 IT7830897 A0 IT 7830897A0 IT 7830897 A IT7830897 A IT 7830897A IT 3089778 A IT3089778 A IT 3089778A IT 7830897 A0 IT7830897 A0 IT 7830897A0
Authority
IT
Italy
Prior art keywords
live
power
program interruption
priority basis
interruption apparatus
Prior art date
Application number
IT7830897A
Other languages
English (en)
Other versions
IT1192603B (it
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT7830897A0 publication Critical patent/IT7830897A0/it
Application granted granted Critical
Publication of IT1192603B publication Critical patent/IT1192603B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
IT30897/78A 1977-12-30 1978-12-15 Apparato di interruzione di un programma,su base prioritaria,dotato di mezzi per l'alimentazione diretta dell'indirizzo di salto IT1192603B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86579677A 1977-12-30 1977-12-30

Publications (2)

Publication Number Publication Date
IT7830897A0 true IT7830897A0 (it) 1978-12-15
IT1192603B IT1192603B (it) 1988-04-20

Family

ID=25346246

Family Applications (1)

Application Number Title Priority Date Filing Date
IT30897/78A IT1192603B (it) 1977-12-30 1978-12-15 Apparato di interruzione di un programma,su base prioritaria,dotato di mezzi per l'alimentazione diretta dell'indirizzo di salto

Country Status (5)

Country Link
JP (1) JPS5819094B2 (it)
DE (1) DE2856768C2 (it)
FR (1) FR2413717B1 (it)
GB (1) GB2012082B (it)
IT (1) IT1192603B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4271468A (en) * 1979-11-06 1981-06-02 International Business Machines Corp. Multiprocessor mechanism for handling channel interrupts
JPS6118059A (ja) * 1984-07-05 1986-01-25 Nec Corp メモリ回路
JPS61143852A (ja) * 1984-12-17 1986-07-01 Toshiba Corp 割込みベクトル保護方法
KR100317237B1 (ko) * 1999-10-01 2001-12-22 윤종용 유사 벡터 방식의 인터럽트 컨트롤러 및 그것의 인터럽트 처리 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50106541A (it) * 1974-01-29 1975-08-22
JPS51233A (it) * 1974-06-19 1976-01-05 Nippon Electric Co
JPS5428260B2 (it) * 1974-09-02 1979-09-14
JPS5232647A (en) * 1975-09-08 1977-03-12 Mitsui Eng & Shipbuild Co Ltd Interruption system of electronic computer
US4090238A (en) * 1976-10-04 1978-05-16 Rca Corporation Priority vectored interrupt using direct memory access

Also Published As

Publication number Publication date
JPS54103645A (en) 1979-08-15
DE2856768A1 (de) 1979-07-05
DE2856768C2 (de) 1984-02-09
FR2413717B1 (fr) 1986-03-28
FR2413717A1 (fr) 1979-07-27
JPS5819094B2 (ja) 1983-04-16
IT1192603B (it) 1988-04-20
GB2012082B (en) 1982-06-09
GB2012082A (en) 1979-07-18

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