GB2012082A - Priority interrupt apparatus - Google Patents

Priority interrupt apparatus

Info

Publication number
GB2012082A
GB2012082A GB7849060A GB7849060A GB2012082A GB 2012082 A GB2012082 A GB 2012082A GB 7849060 A GB7849060 A GB 7849060A GB 7849060 A GB7849060 A GB 7849060A GB 2012082 A GB2012082 A GB 2012082A
Authority
GB
United Kingdom
Prior art keywords
address
instruction
memory
interrupt
address part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7849060A
Other versions
GB2012082B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of GB2012082A publication Critical patent/GB2012082A/en
Application granted granted Critical
Publication of GB2012082B publication Critical patent/GB2012082B/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Abstract

In priority interrupt apparatus, a program branch instruction address part is supplied by a device such as a read-only memory which supplies a branch address unique to the interrupting device having the highest priority. More particularly, the priority encoder (7) responds to a polarity of interrupt request signals to produce an interrupt signal (INP) and also selection signals representative of the request of highest priority. Address generating means (5,6), when enabled, responds to these selection signals to supply to a data bus (4) linking a memory (2) and processor or controller (1) of the computer, the address part of an instruction located in the memory. Decoder means (8,9) responds to address signals designating the address part of such instruction for producing a control signal which inhibits (through 10) the operation of the memory and enables the address generating means (5, 6). In this way the address part of the instruction supplied from the address generating means is provided to the processor or controller (1) instead of the address part of the instruction as stored in the memory (2). This allows interrupt vectoring to be executed by a single program branch instruction without the necessity of determining, by polling techniques or otherwise, before branching to the proper servicing routing to be executed, which device requested the interrupt. <IMAGE>
GB7849060A 1977-12-30 1978-12-19 Priority vectored interrupt apparatus Expired GB2012082B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86579677A 1977-12-30 1977-12-30

Publications (2)

Publication Number Publication Date
GB2012082A true GB2012082A (en) 1979-07-18
GB2012082B GB2012082B (en) 1982-06-09

Family

ID=25346246

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7849060A Expired GB2012082B (en) 1977-12-30 1978-12-19 Priority vectored interrupt apparatus

Country Status (5)

Country Link
JP (1) JPS5819094B2 (en)
DE (1) DE2856768C2 (en)
FR (1) FR2413717B1 (en)
GB (1) GB2012082B (en)
IT (1) IT1192603B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2360612A (en) * 1999-10-01 2001-09-26 Samsung Electronics Co Ltd Interrupt controller with priority levels

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4271468A (en) * 1979-11-06 1981-06-02 International Business Machines Corp. Multiprocessor mechanism for handling channel interrupts
JPS6118059A (en) * 1984-07-05 1986-01-25 Nec Corp Memory circuit
JPS61143852A (en) * 1984-12-17 1986-07-01 Toshiba Corp Protecting method of interruption vector

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50106541A (en) * 1974-01-29 1975-08-22
JPS51233A (en) * 1974-06-19 1976-01-05 Nippon Electric Co
JPS5428260B2 (en) * 1974-09-02 1979-09-14
JPS5232647A (en) * 1975-09-08 1977-03-12 Mitsui Eng & Shipbuild Co Ltd Interruption system of electronic computer
US4090238A (en) * 1976-10-04 1978-05-16 Rca Corporation Priority vectored interrupt using direct memory access

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2360612A (en) * 1999-10-01 2001-09-26 Samsung Electronics Co Ltd Interrupt controller with priority levels
GB2360612B (en) * 1999-10-01 2002-04-03 Samsung Electronics Co Ltd Interrupt controller and method of accessing interrupts
US6742065B1 (en) 1999-10-01 2004-05-25 Samsung Electronics Co., Ltd. Interrupt controller and method of accessing interrupts

Also Published As

Publication number Publication date
IT1192603B (en) 1988-04-20
FR2413717A1 (en) 1979-07-27
DE2856768C2 (en) 1984-02-09
IT7830897A0 (en) 1978-12-15
JPS54103645A (en) 1979-08-15
DE2856768A1 (en) 1979-07-05
GB2012082B (en) 1982-06-09
FR2413717B1 (en) 1986-03-28
JPS5819094B2 (en) 1983-04-16

Similar Documents

Publication Publication Date Title
DE69028195T2 (en) IMAGE TREATMENT UNIT
JPS5580164A (en) Main memory constitution control system
GB2012082A (en) Priority interrupt apparatus
DE3471534D1 (en) Stored program control
ES2001675A6 (en) System for controlling a data transfer instruction with an extension storage device.
JPS5744279A (en) Cash memory controller
JPS5416957A (en) Computer system for process control
JPS5642868A (en) Access method for common memory in multiprocessor system
JPS5599656A (en) Interruption processor
JPS5416955A (en) Computer system for process control
JPS54152938A (en) Microprogram pipeline register control system
KR950012217A (en) Multiprocessor debugging device and method
JPS5491156A (en) Data processing system
JPS54145447A (en) Input-output control system
JPS57199052A (en) Data processing device
JPS5518718A (en) Interruption system for specific program
KR910012965A (en) Interrupt Methods in Multiprocessor Systems
JPS6437623A (en) Data processor
JPS6426233A (en) Microcomputer
JPS54100628A (en) Memory-contention control system
DE3881534D1 (en) ARRANGEMENT FOR GENERATING IMAGE CONTROL SIGNALS.
JPS5538609A (en) Error recovery processing system for read-only memory
JPS60126731A (en) Program control method
JPS5515509A (en) Cursor controller for document editing process
JPS55121545A (en) Electronic computer

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee