IT7827013A0 - Circuito integrato semiconduttore. - Google Patents

Circuito integrato semiconduttore.

Info

Publication number
IT7827013A0
IT7827013A0 IT7827013A IT2701378A IT7827013A0 IT 7827013 A0 IT7827013 A0 IT 7827013A0 IT 7827013 A IT7827013 A IT 7827013A IT 2701378 A IT2701378 A IT 2701378A IT 7827013 A0 IT7827013 A0 IT 7827013A0
Authority
IT
Italy
Prior art keywords
integrated circuit
semiconductor integrated
semiconductor
circuit
integrated
Prior art date
Application number
IT7827013A
Other languages
English (en)
Other versions
IT1110167B (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7827013A0 publication Critical patent/IT7827013A0/it
Application granted granted Critical
Publication of IT1110167B publication Critical patent/IT1110167B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11801—Masterslice integrated circuits using bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
IT27013/78A 1977-09-06 1978-08-25 Circuito integrato semiconduttore IT1110167B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US83071577A 1977-09-06 1977-09-06

Publications (2)

Publication Number Publication Date
IT7827013A0 true IT7827013A0 (it) 1978-08-25
IT1110167B IT1110167B (it) 1985-12-23

Family

ID=25257547

Family Applications (1)

Application Number Title Priority Date Filing Date
IT27013/78A IT1110167B (it) 1977-09-06 1978-08-25 Circuito integrato semiconduttore

Country Status (5)

Country Link
US (1) UST100501I4 (it)
EP (1) EP0001209A1 (it)
JP (1) JPS5441088A (it)
CA (1) CA1102009A (it)
IT (1) IT1110167B (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof
JPS55138865A (en) * 1979-04-17 1980-10-30 Nec Corp Semiconductor device
JPS55163859A (en) * 1979-06-07 1980-12-20 Fujitsu Ltd Manufacture of semiconductor device
FR2524206B1 (fr) * 1982-03-26 1985-12-13 Thomson Csf Mat Tel Circuit integre prediffuse, et procede d'interconnexion des cellules de ce circuit
JPH0758761B2 (ja) * 1983-12-30 1995-06-21 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体集積回路チップ
US4737836A (en) * 1983-12-30 1988-04-12 International Business Machines Corporation VLSI integrated circuit having parallel bonding areas
EP0154346B1 (en) * 1984-03-08 1991-09-18 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
JPS6288337A (ja) * 1985-10-15 1987-04-22 Nec Corp 半導体集積回路装置
JP2685756B2 (ja) * 1987-07-20 1997-12-03 株式会社東芝 半導体集積回路装置の設計方法
JPH04340252A (ja) * 1990-07-27 1992-11-26 Mitsubishi Electric Corp 半導体集積回路装置及びセルの配置配線方法
US10878158B2 (en) * 2018-07-16 2020-12-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
CA1024661A (en) * 1974-06-26 1978-01-17 International Business Machines Corporation Wireable planar integrated circuit chip structure
US4006492A (en) * 1975-06-23 1977-02-01 International Business Machines Corporation High density semiconductor chip organization
CA1091360A (en) * 1975-12-29 1980-12-09 Takao Uehara Normalized interconnection patterns

Also Published As

Publication number Publication date
EP0001209A1 (de) 1979-04-04
JPS5441088A (en) 1979-03-31
CA1102009A (en) 1981-05-26
UST100501I4 (en) 1981-04-07
IT1110167B (it) 1985-12-23

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