IT1402273B1 - Elemento a semiconduttore con un die semiconduttore e telai di connettori - Google Patents

Elemento a semiconduttore con un die semiconduttore e telai di connettori

Info

Publication number
IT1402273B1
IT1402273B1 ITVI2010A000212A ITVI20100212A IT1402273B1 IT 1402273 B1 IT1402273 B1 IT 1402273B1 IT VI2010A000212 A ITVI2010A000212 A IT VI2010A000212A IT VI20100212 A ITVI20100212 A IT VI20100212A IT 1402273 B1 IT1402273 B1 IT 1402273B1
Authority
IT
Italy
Prior art keywords
semiconductor
connector frames
semiconductor element
semiconductor die
die
Prior art date
Application number
ITVI2010A000212A
Other languages
English (en)
Inventor
Piparo Alessandro Lo
Agatino Minotti
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITVI2010A000212A priority Critical patent/IT1402273B1/it
Priority to US13/070,075 priority patent/US8471370B2/en
Publication of ITVI20100212A1 publication Critical patent/ITVI20100212A1/it
Application granted granted Critical
Publication of IT1402273B1 publication Critical patent/IT1402273B1/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49537Plurality of lead frames mounted in one device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4846Connecting portions with multiple bonds on the same bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
ITVI2010A000212A 2010-07-29 2010-07-29 Elemento a semiconduttore con un die semiconduttore e telai di connettori IT1402273B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
ITVI2010A000212A IT1402273B1 (it) 2010-07-29 2010-07-29 Elemento a semiconduttore con un die semiconduttore e telai di connettori
US13/070,075 US8471370B2 (en) 2010-07-29 2011-03-23 Semiconductor element with semiconductor die and lead frames

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITVI2010A000212A IT1402273B1 (it) 2010-07-29 2010-07-29 Elemento a semiconduttore con un die semiconduttore e telai di connettori

Publications (2)

Publication Number Publication Date
ITVI20100212A1 ITVI20100212A1 (it) 2012-01-30
IT1402273B1 true IT1402273B1 (it) 2013-08-28

Family

ID=43479486

Family Applications (1)

Application Number Title Priority Date Filing Date
ITVI2010A000212A IT1402273B1 (it) 2010-07-29 2010-07-29 Elemento a semiconduttore con un die semiconduttore e telai di connettori

Country Status (2)

Country Link
US (1) US8471370B2 (it)
IT (1) IT1402273B1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014221142A1 (de) * 2014-10-17 2016-04-21 Robert Bosch Gmbh Modul mit Sinteranbindung
US9873250B2 (en) * 2016-03-14 2018-01-23 Stmicroelectronics, Inc. Microfluidic assembly with mechanical bonds
JP6992913B2 (ja) * 2018-11-05 2022-01-13 富士電機株式会社 リードフレーム配線構造及び半導体モジュール
CN111628067A (zh) * 2020-05-27 2020-09-04 深圳桑椹电子商务有限公司 一种led基板的制造方法及结构

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564352A (en) * 1968-12-30 1971-02-16 Fairchild Camera Instr Co Strip design for a low cost plastic transistor
FR2299724A1 (fr) * 1975-01-29 1976-08-27 Honeywell Bull Soc Ind Perfectionnements aux supports de conditionnement de micro-plaquettes de circuits integres
GB1557685A (en) * 1976-02-02 1979-12-12 Fairchild Camera Instr Co Optically coupled isolator device
JPS57147260A (en) * 1981-03-05 1982-09-11 Matsushita Electronics Corp Manufacture of resin-sealed semiconductor device and lead frame used therefor
US4766478A (en) * 1986-09-02 1988-08-23 Dennis Richard K Lead frame for semi-conductor device and process of connecting same
US4987474A (en) * 1987-09-18 1991-01-22 Hitachi, Ltd. Semiconductor device and method of manufacturing the same
US5166098A (en) * 1988-03-05 1992-11-24 Deutsche Itt Industries Gmbh Method of manufacturing an encapsulated semiconductor device with a can type housing
US4994412A (en) * 1990-02-09 1991-02-19 Motorola Inc. Self-centering electrode for power devices
US5343072A (en) * 1990-08-20 1994-08-30 Rohm Co., Ltd. Method and leadframe for making electronic components
JPH05315490A (ja) * 1992-05-07 1993-11-26 Fuji Electric Co Ltd 半導体素子
US5977618A (en) * 1992-07-24 1999-11-02 Tessera, Inc. Semiconductor connection components and methods with releasable lead support
JP2560974B2 (ja) * 1993-06-04 1996-12-04 日本電気株式会社 半導体装置
US5506174A (en) * 1994-07-12 1996-04-09 General Instrument Corp. Automated assembly of semiconductor devices using a pair of lead frames
KR100282003B1 (ko) * 1997-10-15 2001-02-15 윤종용 칩 스케일 패키지
US6396127B1 (en) * 1998-09-25 2002-05-28 International Rectifier Corporation Semiconductor package
SG87769A1 (en) * 1998-09-29 2002-04-16 Texas Instr Singapore Pte Ltd Direct attachment of semiconductor chip to organic substrate
US6317327B1 (en) * 2001-01-04 2001-11-13 Chin-Feng Lin Diode cooling arrangement
JP2004079760A (ja) * 2002-08-19 2004-03-11 Nec Electronics Corp 半導体装置及びその組立方法
DE102006005420B4 (de) * 2006-02-03 2010-07-15 Infineon Technologies Ag Stapelbares Halbleiterbauteil und Verfahren zur Herstellung desselben
US8686554B2 (en) * 2007-03-13 2014-04-01 International Rectifier Corporation Vertically mountable semiconductor device package
JP2008270302A (ja) * 2007-04-16 2008-11-06 Sanyo Electric Co Ltd 半導体装置

Also Published As

Publication number Publication date
US20120025358A1 (en) 2012-02-02
ITVI20100212A1 (it) 2012-01-30
US8471370B2 (en) 2013-06-25

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