IT1274573B - Processo di fabbricazione di moduli circuitali ibridi includenti dispositivi elettronici in chip - Google Patents
Processo di fabbricazione di moduli circuitali ibridi includenti dispositivi elettronici in chipInfo
- Publication number
- IT1274573B IT1274573B ITMI951076A ITMI951076A IT1274573B IT 1274573 B IT1274573 B IT 1274573B IT MI951076 A ITMI951076 A IT MI951076A IT MI951076 A ITMI951076 A IT MI951076A IT 1274573 B IT1274573 B IT 1274573B
- Authority
- IT
- Italy
- Prior art keywords
- chip
- manufacturing process
- electronic devices
- process including
- circuit modules
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L2224/85201—Compression bonding
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- H01L2224/85207—Thermosonic bonding
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- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI951076A IT1274573B (it) | 1995-05-25 | 1995-05-25 | Processo di fabbricazione di moduli circuitali ibridi includenti dispositivi elettronici in chip |
AU59010/96A AU5901096A (en) | 1995-05-25 | 1996-05-22 | Manufacturing process for hybrid circuit modules including e lectronic chip devices |
PCT/EP1996/002199 WO1996037914A1 (en) | 1995-05-25 | 1996-05-22 | Manufacturing process for hybrid circuit modules including electronic chip devices |
ZA964181A ZA964181B (en) | 1995-05-25 | 1996-05-24 | Manufacturing process for hybrid circuit modules including electronic chip devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI951076A IT1274573B (it) | 1995-05-25 | 1995-05-25 | Processo di fabbricazione di moduli circuitali ibridi includenti dispositivi elettronici in chip |
Publications (3)
Publication Number | Publication Date |
---|---|
ITMI951076A0 ITMI951076A0 (it) | 1995-05-25 |
ITMI951076A1 ITMI951076A1 (it) | 1996-11-25 |
IT1274573B true IT1274573B (it) | 1997-07-17 |
Family
ID=11371675
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITMI951076A IT1274573B (it) | 1995-05-25 | 1995-05-25 | Processo di fabbricazione di moduli circuitali ibridi includenti dispositivi elettronici in chip |
Country Status (4)
Country | Link |
---|---|
AU (1) | AU5901096A (it) |
IT (1) | IT1274573B (it) |
WO (1) | WO1996037914A1 (it) |
ZA (1) | ZA964181B (it) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1211723C (zh) * | 2000-04-04 | 2005-07-20 | 胜开科技股份有限公司 | 计算机卡制作方法 |
TW498602B (en) * | 2000-05-30 | 2002-08-11 | Alps Electric Co Ltd | Circuit unit |
NZ583290A (en) | 2004-09-24 | 2011-05-27 | Alnylam Pharmaceuticals Inc | Rnai modulation of apob and uses thereof |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4722137A (en) * | 1986-02-05 | 1988-02-02 | Hewlett-Packard Company | High frequency hermetically sealed package for solid-state components |
JPS62188345A (ja) * | 1986-02-14 | 1987-08-17 | Sanyo Electric Co Ltd | 混成集積回路の製造方法 |
US5014115A (en) * | 1987-11-16 | 1991-05-07 | Motorola, Inc. | Coplanar waveguide semiconductor package |
JPH0256987A (ja) * | 1988-02-23 | 1990-02-26 | Mitsubishi Electric Corp | 混成集積回路の実装方法 |
JP2823461B2 (ja) * | 1992-12-11 | 1998-11-11 | 三菱電機株式会社 | 高周波帯ic用パッケージ |
-
1995
- 1995-05-25 IT ITMI951076A patent/IT1274573B/it active IP Right Grant
-
1996
- 1996-05-22 AU AU59010/96A patent/AU5901096A/en not_active Abandoned
- 1996-05-22 WO PCT/EP1996/002199 patent/WO1996037914A1/en active Application Filing
- 1996-05-24 ZA ZA964181A patent/ZA964181B/xx unknown
Also Published As
Publication number | Publication date |
---|---|
AU5901096A (en) | 1996-12-11 |
ITMI951076A1 (it) | 1996-11-25 |
ZA964181B (en) | 1996-12-03 |
WO1996037914A1 (en) | 1996-11-28 |
ITMI951076A0 (it) | 1995-05-25 |
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Legal Events
Date | Code | Title | Description |
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0001 | Granted |