IT1250405B - Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa - Google Patents

Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa

Info

Publication number
IT1250405B
IT1250405B ITVA910002A IT1250405B IT 1250405 B IT1250405 B IT 1250405B IT VA910002 A ITVA910002 A IT VA910002A IT 1250405 B IT1250405 B IT 1250405B
Authority
IT
Italy
Prior art keywords
plate
metal plate
metal
heat dissipation
semiconductor device
Prior art date
Application number
Other languages
English (en)
Inventor
Bosca Pietro Della
Angelo Massironi
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT91VA2 priority Critical patent/IT1250405B/it
Publication of ITVA910002A0 publication Critical patent/ITVA910002A0/it
Priority to EP19920830029 priority patent/EP0497744B1/en
Priority to DE69213269T priority patent/DE69213269T2/de
Priority to US07/830,402 priority patent/US5229918A/en
Priority to JP04596292A priority patent/JP3178618B2/ja
Publication of ITVA910002A1 publication Critical patent/ITVA910002A1/it
Application granted granted Critical
Publication of IT1250405B publication Critical patent/IT1250405B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/461—Leadframes specially adapted for cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

Una piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina sulla quale è direttamente fissata la tessera di semiconduttore, è fornita di uno o più rilievi in prossimità del perimetro dell'area di fissaggio della tessera di semiconduttore per migliorare l'affidabilità dei collegamenti a filo tra piazzuole metallizzate di connessione a massa del fronte della tessera di semiconduttore e la piastrina metallica di base, per realizzare attraverso quest'ultima i necessari collegamenti a massa. Il rilievo o i rilievi sono preferibilmente ottenuti mediante imbutitura del metallo della piastrina. E' mostrato un dispositivo del tipo Single-In-Line in cui l'imbutitura della piastrina metallica di dissipazione, per realizzare un rilievo sulla faccia di montaggio per i collegamenti a massa, è formata nella zona di separazione tra una parte della piastrina metallica che si estende oltre il perimetro del corpo di resina di incapsulamento e attraverso la quale sono predisposti i mezzi di fissaggio di un dissipatore esterno e la rimanente parte della piastrina sulla quale è montata la tessera di semiconduttore. L'imbutitura eseguita in questa zona è utile a disaccoppiare meccanicamente le due parti della piastrina metallica di base per ridurre la trasmissione di sforzi flettenti.
IT91VA2 1991-01-31 1991-01-31 Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa IT1250405B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT91VA2 IT1250405B (it) 1991-01-31 1991-01-31 Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa
EP19920830029 EP0497744B1 (en) 1991-01-31 1992-01-24 Metal heat sink baseplate for a resin-encapsulated semiconductor device, having raised portions for welding ground connection wires thereon
DE69213269T DE69213269T2 (de) 1991-01-31 1992-01-24 Metall-Basisplatte wie Wärmesenke für eine Plastikumhüllte Halbleiteranordnung mit erhöhten Teilen zum Löten von Erdschluss-Verbindungsdrähten
US07/830,402 US5229918A (en) 1991-01-31 1992-01-30 Metal heat sink baseplate for a semiconductor device
JP04596292A JP3178618B2 (ja) 1991-01-31 1992-01-31 接地接続ワイヤ用隆起部を有する樹脂カプセル封入された半導体デバイス用金属製放熱用ベースプレート

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT91VA2 IT1250405B (it) 1991-01-31 1991-01-31 Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa

Publications (3)

Publication Number Publication Date
ITVA910002A0 ITVA910002A0 (it) 1991-01-31
ITVA910002A1 ITVA910002A1 (it) 1992-07-31
IT1250405B true IT1250405B (it) 1995-04-07

Family

ID=11423105

Family Applications (1)

Application Number Title Priority Date Filing Date
IT91VA2 IT1250405B (it) 1991-01-31 1991-01-31 Piastrina metallica di dissipazione del calore di un dispositivo a semiconduttore di potenza incapsulato in resina fornita di rilievi per la saldatura dei fili di massa

Country Status (5)

Country Link
US (1) US5229918A (it)
EP (1) EP0497744B1 (it)
JP (1) JP3178618B2 (it)
DE (1) DE69213269T2 (it)
IT (1) IT1250405B (it)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1252136B (it) * 1991-11-29 1995-06-05 St Microelectronics Srl Struttura di dispositivo a semiconduttore con dissipatore metallico e corpo in plastica, con mezzi per una connessione elettrica al dissipatore di alta affidabilita'
US5328079A (en) * 1993-03-19 1994-07-12 National Semiconductor Corporation Method of and arrangement for bond wire connecting together certain integrated circuit components
EP0698922B1 (en) * 1994-08-12 2001-06-06 STMicroelectronics S.r.l. Leadframe for supporting integrated semiconductor devices
US5696405A (en) * 1995-10-13 1997-12-09 Lucent Technologies Inc. Microelectronic package with device cooling
US5825625A (en) * 1996-05-20 1998-10-20 Hewlett-Packard Company Heat conductive substrate mounted in PC board for transferring heat from IC to heat sink
DE19625384A1 (de) * 1996-06-25 1998-01-02 Siemens Ag Zusammengesetzter Leiterrahmen
DE69627643D1 (de) * 1996-06-28 2003-05-28 St Microelectronics Srl Verfahren zur Herstellung einer Plastikpackung für eine elektronische Anordnung mit vollständig isolierter Wärmesenke
JP2907186B2 (ja) * 1997-05-19 1999-06-21 日本電気株式会社 半導体装置、その製造方法
FR2764114B1 (fr) * 1997-06-02 2003-04-25 Sgs Thomson Microelectronics Dispositif semi-conducteur muni d'un dissipateur thermique
US5960535A (en) * 1997-10-28 1999-10-05 Hewlett-Packard Company Heat conductive substrate press-mounted in PC board hole for transferring heat from IC to heat sink
US6005776A (en) * 1998-01-05 1999-12-21 Intel Corporation Vertical connector based packaging solution for integrated circuits
US6476481B2 (en) * 1998-05-05 2002-11-05 International Rectifier Corporation High current capacity semiconductor device package and lead frame with large area connection posts and modified outline
EP0987747A1 (en) 1998-09-17 2000-03-22 STMicroelectronics S.r.l. Process for improving the adhesion between metal and plastic in containment structures for electronic semiconductor devices
US6748656B2 (en) * 2000-07-21 2004-06-15 Ats Automation Tooling Systems Inc. Folded-fin heatsink manufacturing method and apparatus
JP2013135022A (ja) * 2011-12-26 2013-07-08 Toyota Motor Corp 半導体装置
JP7607430B2 (ja) * 2020-10-12 2024-12-27 株式会社マキタ 作業機

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4132856A (en) * 1977-11-28 1979-01-02 Burroughs Corporation Process of forming a plastic encapsulated molded film carrier CML package and the package formed thereby
JPS55113349A (en) * 1979-02-23 1980-09-01 Hitachi Ltd Semiconductor device
JPH064595Y2 (ja) * 1988-02-24 1994-02-02 日本電気株式会社 ハイブリッドｉｃ

Also Published As

Publication number Publication date
EP0497744B1 (en) 1996-09-04
DE69213269T2 (de) 1997-01-23
DE69213269D1 (de) 1996-10-10
JPH0823055A (ja) 1996-01-23
JP3178618B2 (ja) 2001-06-25
US5229918A (en) 1993-07-20
ITVA910002A1 (it) 1992-07-31
EP0497744A1 (en) 1992-08-05
ITVA910002A0 (it) 1991-01-31

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960129