IT1223466B - Dispositivo e metodo per sincronizzare un sistema di comunicazione - Google Patents

Dispositivo e metodo per sincronizzare un sistema di comunicazione

Info

Publication number
IT1223466B
IT1223466B IT23005/87A IT2300587A IT1223466B IT 1223466 B IT1223466 B IT 1223466B IT 23005/87 A IT23005/87 A IT 23005/87A IT 2300587 A IT2300587 A IT 2300587A IT 1223466 B IT1223466 B IT 1223466B
Authority
IT
Italy
Prior art keywords
synchronize
communication system
communication
Prior art date
Application number
IT23005/87A
Other languages
English (en)
Other versions
IT8723005A0 (it
Inventor
Scott Marshall
Thanh Tran
A David Milton
Original Assignee
Mitel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitel Corp filed Critical Mitel Corp
Publication of IT8723005A0 publication Critical patent/IT8723005A0/it
Application granted granted Critical
Publication of IT1223466B publication Critical patent/IT1223466B/it

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
IT23005/87A 1986-12-15 1987-12-15 Dispositivo e metodo per sincronizzare un sistema di comunicazione IT1223466B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA000525389A CA1279909C (en) 1986-12-15 1986-12-15 Apparatus and method for synchronizing a communication system

Publications (2)

Publication Number Publication Date
IT8723005A0 IT8723005A0 (it) 1987-12-15
IT1223466B true IT1223466B (it) 1990-09-19

Family

ID=4134561

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23005/87A IT1223466B (it) 1986-12-15 1987-12-15 Dispositivo e metodo per sincronizzare un sistema di comunicazione

Country Status (6)

Country Link
US (1) US4843617A (it)
JP (1) JPS63199537A (it)
CA (1) CA1279909C (it)
DE (1) DE3740795A1 (it)
GB (1) GB2198917B (it)
IT (1) IT1223466B (it)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4949361A (en) * 1989-06-26 1990-08-14 Tektronix, Inc. Digital data transfer synchronization circuit and method
FI85318C (fi) * 1990-08-14 1992-03-25 Tecnomen Oy Kompensering av felet i en klockas gaong.
CA2091962A1 (en) * 1992-03-31 1993-10-01 Mark L. Witsaman Clock synchronization system
US5305354A (en) * 1992-04-24 1994-04-19 Digital Equipment Corporation Aborting synchronizer
US5572554A (en) * 1994-07-29 1996-11-05 Loral Corporation Synchronizer and method therefor
US5450458A (en) * 1994-08-05 1995-09-12 International Business Machines Corporation Method and apparatus for phase-aligned multiple frequency synthesizer with synchronization window decoder
US5581699A (en) 1995-05-15 1996-12-03 International Business Machines Corporation System and method for testing a clock signal
JP4315558B2 (ja) * 2000-01-13 2009-08-19 オリンパス株式会社 システム
US6907066B1 (en) * 2000-07-13 2005-06-14 Advanced Micro Devices, Inc. Arrangement for reducing transmitted jitter
US7324857B2 (en) * 2002-04-19 2008-01-29 Gateway Inc. Method to synchronize playback of multicast audio streams on a local network
US7333519B2 (en) * 2002-04-23 2008-02-19 Gateway Inc. Method of manually fine tuning audio synchronization of a home network
US7209795B2 (en) 2002-04-23 2007-04-24 Gateway Inc. Method of synchronizing the playback of a digital audio broadcast by inserting a control track pulse
US7392102B2 (en) * 2002-04-23 2008-06-24 Gateway Inc. Method of synchronizing the playback of a digital audio broadcast using an audio waveform sample
US8006114B2 (en) * 2007-03-09 2011-08-23 Analog Devices, Inc. Software programmable timing architecture
US9893916B2 (en) * 2016-07-01 2018-02-13 Texas Instruments Incorporated Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE398698B (sv) * 1976-04-27 1978-01-09 Ericsson Telefon Ab L M Anordning for fassynkronisering av en formedlingsstation i ett digitalt telekommunikationsnet
DE2937985A1 (de) * 1979-09-20 1981-04-16 Robert Bosch Gmbh, 7000 Stuttgart Mehrkanaliges funksprechgeraet
US4316152A (en) * 1979-09-24 1982-02-16 Hewlett-Packard Company Data tracking phase locked loop
JPS57106255A (en) * 1980-12-23 1982-07-02 Japan Radio Co Ltd Bit synchronizing system
ZA82973B (en) * 1981-02-25 1983-01-26 Eaton Corp Precision forging method
US4404675A (en) * 1981-04-27 1983-09-13 Gte Automatic Electric Incorporated Frame detection and synchronization system for high speed digital transmission systems
JPS5847331A (ja) * 1981-09-04 1983-03-19 テクトロニクス・インコ−ポレイテツド 信号発生器
JPS5957530A (ja) * 1982-09-27 1984-04-03 Hitachi Ltd 位相同期回路
JPS60125021A (ja) * 1983-12-12 1985-07-04 Matsushita Electric Ind Co Ltd 位相制御ル−プの疑似同期検出装置
US4707842A (en) * 1985-04-03 1987-11-17 Siemens Aktiengesellschaft Apparatus and method for acquiring data and clock pulses from asynchronous data signals

Also Published As

Publication number Publication date
CA1279909C (en) 1991-02-05
DE3740795A1 (de) 1988-06-23
US4843617A (en) 1989-06-27
GB2198917A (en) 1988-06-22
GB2198917B (en) 1991-06-12
JPS63199537A (ja) 1988-08-18
DE3740795C2 (it) 1992-07-09
IT8723005A0 (it) 1987-12-15
GB8728467D0 (en) 1988-01-13

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961230