IT1217324B - Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo - Google Patents

Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo

Info

Publication number
IT1217324B
IT1217324B IT06632/87A IT663287A IT1217324B IT 1217324 B IT1217324 B IT 1217324B IT 06632/87 A IT06632/87 A IT 06632/87A IT 663287 A IT663287 A IT 663287A IT 1217324 B IT1217324 B IT 1217324B
Authority
IT
Italy
Prior art keywords
prevention
testing
plates
semiconductor device
device during
Prior art date
Application number
IT06632/87A
Other languages
English (en)
Other versions
IT8706632A0 (it
Inventor
Carmelo Oliveri
Carmelo Magro
Original Assignee
Sgs Microelettronica Spa
Ora S G S Thomson Microelectro
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa, Ora S G S Thomson Microelectro filed Critical Sgs Microelettronica Spa
Priority to IT06632/87A priority Critical patent/IT1217324B/it
Publication of IT8706632A0 publication Critical patent/IT8706632A0/it
Priority to US07/288,407 priority patent/US4902632A/en
Application granted granted Critical
Publication of IT1217324B publication Critical patent/IT1217324B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/958Passivation layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
IT06632/87A 1987-12-22 1987-12-22 Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo IT1217324B (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT06632/87A IT1217324B (it) 1987-12-22 1987-12-22 Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo
US07/288,407 US4902632A (en) 1987-12-22 1988-12-21 Method of preventing superficial electrical discharges in chips of semiconductor devices during testing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT06632/87A IT1217324B (it) 1987-12-22 1987-12-22 Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo

Publications (2)

Publication Number Publication Date
IT8706632A0 IT8706632A0 (it) 1987-12-22
IT1217324B true IT1217324B (it) 1990-03-22

Family

ID=11121624

Family Applications (1)

Application Number Title Priority Date Filing Date
IT06632/87A IT1217324B (it) 1987-12-22 1987-12-22 Metodo per la prevenzione di scariche elettriche superficiali in piastrine di dispositivo a semiconduttore durante il loro collaudo

Country Status (2)

Country Link
US (1) US4902632A (it)
IT (1) IT1217324B (it)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2164100A1 (de) * 1971-12-23 1973-06-28 Semikron Gleichrichterbau Elektrisch isolierende einkapselungsmasse fuer halbleiteranordnungen
US4692557A (en) * 1986-10-16 1987-09-08 Shell Oil Company Encapsulated solar cell assemblage and method of making

Also Published As

Publication number Publication date
US4902632A (en) 1990-02-20
IT8706632A0 (it) 1987-12-22

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227