IT1199745B - Circuito arbitratore di accesso - Google Patents

Circuito arbitratore di accesso

Info

Publication number
IT1199745B
IT1199745B IT22653/86A IT2265386A IT1199745B IT 1199745 B IT1199745 B IT 1199745B IT 22653/86 A IT22653/86 A IT 22653/86A IT 2265386 A IT2265386 A IT 2265386A IT 1199745 B IT1199745 B IT 1199745B
Authority
IT
Italy
Prior art keywords
arbitrator circuit
access arbitrator
access
circuit
arbitrator
Prior art date
Application number
IT22653/86A
Other languages
English (en)
Other versions
IT8622653A0 (it
Inventor
Boioli Roberto
Tagliabue Pierluigi
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Priority to IT22653/86A priority Critical patent/IT1199745B/it
Publication of IT8622653A0 publication Critical patent/IT8622653A0/it
Priority to US07/122,872 priority patent/US4851996A/en
Priority to EP87117871A priority patent/EP0274648B1/en
Priority to DE8787117871T priority patent/DE3771692D1/de
Application granted granted Critical
Publication of IT1199745B publication Critical patent/IT1199745B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
IT22653/86A 1986-12-12 1986-12-12 Circuito arbitratore di accesso IT1199745B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT22653/86A IT1199745B (it) 1986-12-12 1986-12-12 Circuito arbitratore di accesso
US07/122,872 US4851996A (en) 1986-12-12 1987-11-19 Common resource arbitration circuit having asynchronous access requests and timing signal used as clock input to register and mask signal to priority network
EP87117871A EP0274648B1 (en) 1986-12-12 1987-12-03 Arbitration circuit
DE8787117871T DE3771692D1 (en) 1986-12-12 1987-12-03 Arbiterschaltung.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT22653/86A IT1199745B (it) 1986-12-12 1986-12-12 Circuito arbitratore di accesso

Publications (2)

Publication Number Publication Date
IT8622653A0 IT8622653A0 (it) 1986-12-12
IT1199745B true IT1199745B (it) 1988-12-30

Family

ID=11198896

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22653/86A IT1199745B (it) 1986-12-12 1986-12-12 Circuito arbitratore di accesso

Country Status (4)

Country Link
US (1) US4851996A (it)
EP (1) EP0274648B1 (it)
DE (1) DE3771692D1 (it)
IT (1) IT1199745B (it)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179705A (en) * 1988-03-23 1993-01-12 Dupont Pixel Systems, Ltd. Asynchronous arbiter state machine for arbitrating between operating devices requesting access to a shared resource
IT1227711B (it) * 1988-11-18 1991-05-06 Caluso Torino Sistema multiprocessore di elaborazione dati a risorse distribuite condivise e prevenzione di stallo.
US5101482A (en) * 1989-10-16 1992-03-31 Massachusetts Institute Of Technology Bus-based priority arbitration system with optimum codewords
US5265257A (en) * 1990-06-22 1993-11-23 Digital Equipment Corporation Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instances of each type, and selectable queuing disciplines
EP0464237A1 (en) * 1990-07-03 1992-01-08 International Business Machines Corporation Bus arbitration scheme
DE4024029C2 (de) * 1990-07-28 1994-07-28 Teldix Gmbh Entscheidungslogik zur Priorisierung und Synchronisierung zeitlich asynchroner Signale
DE4131227A1 (de) * 1990-09-21 1992-04-02 Sundstrand Data Control Verfahren und einrichtung zur buszuteilung
EP0552507B1 (en) * 1991-12-04 1998-02-11 Koninklijke Philips Electronics N.V. Arbiter with a direct signal that is modifiable under priority-conflict control
US5341052A (en) * 1991-12-04 1994-08-23 North American Philips Corporation Arbiter with test capability and associated testing method
US6163848A (en) * 1993-09-22 2000-12-19 Advanced Micro Devices, Inc. System and method for re-starting a peripheral bus clock signal and requesting mastership of a peripheral bus
JP2626510B2 (ja) * 1993-10-28 1997-07-02 日本電気株式会社 調停装置
FR2737591B1 (fr) * 1995-08-03 1997-10-17 Sgs Thomson Microelectronics Dispositif d'organisation d'acces a un bus memoire
KR100201325B1 (ko) * 1996-03-30 1999-06-15 유기범 다중 프로세서 시스템에서 시스템 버스의 클럭속도를 향상시키는 방법
US7024506B1 (en) * 2002-12-27 2006-04-04 Cypress Semiconductor Corp. Hierarchically expandable fair arbiter
US10459773B2 (en) * 2016-05-19 2019-10-29 Hitachi, Ltd. PLD management method and PLD management system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1487826B2 (de) * 1966-05-21 1972-02-24 Siemens AG, 1000 Berlin u. 8000 München Schaltungsanordnung zur prioritaetsgerechten datenuebertragung
US4449183A (en) * 1979-07-09 1984-05-15 Digital Equipment Corporation Arbitration scheme for a multiported shared functional device for use in multiprocessing systems
IT1126475B (it) * 1979-12-03 1986-05-21 Honeywell Inf Systems Apparato di comunicazione tra piu' processori
US4339808A (en) * 1980-03-04 1982-07-13 Motorola, Inc. Asynchronous event prioritizing circuit
US4597054A (en) * 1982-12-02 1986-06-24 Ncr Corporation Arbiter circuit and method
US4586128A (en) * 1983-04-14 1986-04-29 Burroughs Corporation Arbitrator circuit and technique for use in a digital computing system having multiple bus controllers
US4644461A (en) * 1983-04-29 1987-02-17 The Regents Of The University Of California Dynamic activity-creating data-driven computer architecture
US4611297A (en) * 1983-08-18 1986-09-09 Pitney Bowes Inc. Bus grant circuit

Also Published As

Publication number Publication date
DE3771692D1 (en) 1991-08-29
IT8622653A0 (it) 1986-12-12
EP0274648B1 (en) 1991-07-24
EP0274648A1 (en) 1988-07-20
US4851996A (en) 1989-07-25

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19931231