DE3771692D1 - Arbiterschaltung. - Google Patents

Arbiterschaltung.

Info

Publication number
DE3771692D1
DE3771692D1 DE8787117871T DE3771692T DE3771692D1 DE 3771692 D1 DE3771692 D1 DE 3771692D1 DE 8787117871 T DE8787117871 T DE 8787117871T DE 3771692 T DE3771692 T DE 3771692T DE 3771692 D1 DE3771692 D1 DE 3771692D1
Authority
DE
Germany
Prior art keywords
arbiterschaltung
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8787117871T
Other languages
English (en)
Inventor
Roberto Boioli
Pierluigi Tagliabue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull HN Information Systems Italia SpA, Bull HN Information Systems Inc filed Critical Bull HN Information Systems Italia SpA
Application granted granted Critical
Publication of DE3771692D1 publication Critical patent/DE3771692D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE8787117871T 1986-12-12 1987-12-03 Arbiterschaltung. Expired - Lifetime DE3771692D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT22653/86A IT1199745B (it) 1986-12-12 1986-12-12 Circuito arbitratore di accesso

Publications (1)

Publication Number Publication Date
DE3771692D1 true DE3771692D1 (en) 1991-08-29

Family

ID=11198896

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787117871T Expired - Lifetime DE3771692D1 (en) 1986-12-12 1987-12-03 Arbiterschaltung.

Country Status (4)

Country Link
US (1) US4851996A (de)
EP (1) EP0274648B1 (de)
DE (1) DE3771692D1 (de)
IT (1) IT1199745B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179705A (en) * 1988-03-23 1993-01-12 Dupont Pixel Systems, Ltd. Asynchronous arbiter state machine for arbitrating between operating devices requesting access to a shared resource
IT1227711B (it) * 1988-11-18 1991-05-06 Caluso Torino Sistema multiprocessore di elaborazione dati a risorse distribuite condivise e prevenzione di stallo.
US5101482A (en) * 1989-10-16 1992-03-31 Massachusetts Institute Of Technology Bus-based priority arbitration system with optimum codewords
US5265257A (en) * 1990-06-22 1993-11-23 Digital Equipment Corporation Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instances of each type, and selectable queuing disciplines
EP0464237A1 (de) * 1990-07-03 1992-01-08 International Business Machines Corporation Busarbitrierungsschema
DE4024029C2 (de) * 1990-07-28 1994-07-28 Teldix Gmbh Entscheidungslogik zur Priorisierung und Synchronisierung zeitlich asynchroner Signale
DE4131227A1 (de) * 1990-09-21 1992-04-02 Sundstrand Data Control Verfahren und einrichtung zur buszuteilung
US5341052A (en) * 1991-12-04 1994-08-23 North American Philips Corporation Arbiter with test capability and associated testing method
DE69224427T2 (de) * 1991-12-04 1998-08-13 Koninkl Philips Electronics Nv Arbiter mit einem unter Prioritätskonfliktskontrolle veränderlichen direkten Signal
US6163848A (en) * 1993-09-22 2000-12-19 Advanced Micro Devices, Inc. System and method for re-starting a peripheral bus clock signal and requesting mastership of a peripheral bus
JP2626510B2 (ja) * 1993-10-28 1997-07-02 日本電気株式会社 調停装置
FR2737591B1 (fr) * 1995-08-03 1997-10-17 Sgs Thomson Microelectronics Dispositif d'organisation d'acces a un bus memoire
KR100201325B1 (ko) * 1996-03-30 1999-06-15 유기범 다중 프로세서 시스템에서 시스템 버스의 클럭속도를 향상시키는 방법
US7024506B1 (en) * 2002-12-27 2006-04-04 Cypress Semiconductor Corp. Hierarchically expandable fair arbiter
JP6368434B2 (ja) * 2016-05-19 2018-08-01 株式会社日立製作所 Ｐｌｄ管理方法及びｐｌｄ管理システム

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1487826B2 (de) * 1966-05-21 1972-02-24 Siemens AG, 1000 Berlin u. 8000 München Schaltungsanordnung zur prioritaetsgerechten datenuebertragung
US4449183A (en) * 1979-07-09 1984-05-15 Digital Equipment Corporation Arbitration scheme for a multiported shared functional device for use in multiprocessing systems
IT1126475B (it) * 1979-12-03 1986-05-21 Honeywell Inf Systems Apparato di comunicazione tra piu' processori
US4339808A (en) * 1980-03-04 1982-07-13 Motorola, Inc. Asynchronous event prioritizing circuit
US4597054A (en) * 1982-12-02 1986-06-24 Ncr Corporation Arbiter circuit and method
US4586128A (en) * 1983-04-14 1986-04-29 Burroughs Corporation Arbitrator circuit and technique for use in a digital computing system having multiple bus controllers
US4644461A (en) * 1983-04-29 1987-02-17 The Regents Of The University Of California Dynamic activity-creating data-driven computer architecture
US4611297A (en) * 1983-08-18 1986-09-09 Pitney Bowes Inc. Bus grant circuit

Also Published As

Publication number Publication date
EP0274648B1 (de) 1991-07-24
US4851996A (en) 1989-07-25
IT8622653A0 (it) 1986-12-12
IT1199745B (it) 1988-12-30
EP0274648A1 (de) 1988-07-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee