IT1188508B - Interface unit for linking tape recorder to computer - Google Patents

Interface unit for linking tape recorder to computer

Info

Publication number
IT1188508B
IT1188508B IT41505/85A IT4150585A IT1188508B IT 1188508 B IT1188508 B IT 1188508B IT 41505/85 A IT41505/85 A IT 41505/85A IT 4150585 A IT4150585 A IT 4150585A IT 1188508 B IT1188508 B IT 1188508B
Authority
IT
Italy
Prior art keywords
computer
bistable
interface unit
shift register
tape recorder
Prior art date
Application number
IT41505/85A
Other languages
Italian (it)
Other versions
IT8541505A0 (en
Inventor
Oleg Semenovich Gorbachev
Anatoly Fedorovich Ioffe
Mikhail Viktorovich Kulagin
Boris Iosifovich Ruvinsky
Vladimir Sergeevich Khorin
Jury Viktorovich Chugunov
Original Assignee
Gorbachev Oleg S
Ioffe Anatolij F
Mikhail Viktorovich Kulagin
Boris Iosifovich Ruvinsky
Vladimir Sergeevich Khorin
Jury Viktorovich Chugunov
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gorbachev Oleg S, Ioffe Anatolij F, Mikhail Viktorovich Kulagin, Boris Iosifovich Ruvinsky, Vladimir Sergeevich Khorin, Jury Viktorovich Chugunov filed Critical Gorbachev Oleg S
Priority to IT41505/85A priority Critical patent/IT1188508B/en
Publication of IT8541505A0 publication Critical patent/IT8541505A0/en
Application granted granted Critical
Publication of IT1188508B publication Critical patent/IT1188508B/en

Links

Landscapes

  • Shift Register Type Memory (AREA)

Abstract

The input signal (1) from the magnetic tape unit passes through a pulse shaper (2) and a series chain consisting of a delay element (10), bistable (12) and shift register (21). The output of the pulse shaper is also applied to a multiplexer (9) whose outputs control an up/down counter (19), the two elements being connected between the bistable and the shift register. The output of the delay element also resets a second counter (14) that provides the second input for the bistable. Synchronisation of the multiplexer and shift register is provided by a clock circuit (23) which consists entirely of discrete elements.
IT41505/85A 1985-01-24 1985-01-24 Interface unit for linking tape recorder to computer IT1188508B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT41505/85A IT1188508B (en) 1985-01-24 1985-01-24 Interface unit for linking tape recorder to computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT41505/85A IT1188508B (en) 1985-01-24 1985-01-24 Interface unit for linking tape recorder to computer

Publications (2)

Publication Number Publication Date
IT8541505A0 IT8541505A0 (en) 1985-01-24
IT1188508B true IT1188508B (en) 1988-01-14

Family

ID=11250346

Family Applications (1)

Application Number Title Priority Date Filing Date
IT41505/85A IT1188508B (en) 1985-01-24 1985-01-24 Interface unit for linking tape recorder to computer

Country Status (1)

Country Link
IT (1) IT1188508B (en)

Also Published As

Publication number Publication date
IT8541505A0 (en) 1985-01-24

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