JPS5750313A - Synchronizing circuit of digital signal reproducer - Google Patents

Synchronizing circuit of digital signal reproducer

Info

Publication number
JPS5750313A
JPS5750313A JP55123756A JP12375680A JPS5750313A JP S5750313 A JPS5750313 A JP S5750313A JP 55123756 A JP55123756 A JP 55123756A JP 12375680 A JP12375680 A JP 12375680A JP S5750313 A JPS5750313 A JP S5750313A
Authority
JP
Japan
Prior art keywords
signal
circuit
synchronizing
synchronizing pattern
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55123756A
Other languages
Japanese (ja)
Other versions
JPS6213747B2 (en
Inventor
Kenichi Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55123756A priority Critical patent/JPS5750313A/en
Publication of JPS5750313A publication Critical patent/JPS5750313A/en
Publication of JPS6213747B2 publication Critical patent/JPS6213747B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/12—Formatting, e.g. arrangement of data block or words on the record carriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To improve the reliability of security for initial synchronization, by generating a timing signal, which is required for driving a signal processing circuit and a synchronizing circuit, from the synchronizing pattern detected from a data stream and a sampling clock. CONSTITUTION:The read signal of a binary recording carrier is inputted to a demodulating circuit, and a data stream (a) and a sampling clock 3b are given to a synchronizing pattern detecting circuit 41. The first and the second synchronizing pattern detection signals 41a and 41b and a synchronizing pattern nondetection signal 41c are outputted. The signal 41a is inputted to a counter 51; and by an output 5d of the counter 51, an ROM51 outputs a timing signal 5a required for driving a signal processing circuit and a timing signal 5b required for driving a synchronizing pattern detecting circuit 41. An AND gate 48 is controlled through a counter 43 and FFs 46 and 47 by the signal 41c, and synchronizing signals 5b and 5c are sent to the circuit 41 at a constant period. Thus, the reliability of security for initial synchronization is improved.
JP55123756A 1980-09-05 1980-09-05 Synchronizing circuit of digital signal reproducer Granted JPS5750313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55123756A JPS5750313A (en) 1980-09-05 1980-09-05 Synchronizing circuit of digital signal reproducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55123756A JPS5750313A (en) 1980-09-05 1980-09-05 Synchronizing circuit of digital signal reproducer

Publications (2)

Publication Number Publication Date
JPS5750313A true JPS5750313A (en) 1982-03-24
JPS6213747B2 JPS6213747B2 (en) 1987-03-28

Family

ID=14868518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55123756A Granted JPS5750313A (en) 1980-09-05 1980-09-05 Synchronizing circuit of digital signal reproducer

Country Status (1)

Country Link
JP (1) JPS5750313A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2544145A1 (en) * 1983-04-06 1984-10-12 Ampex METHOD AND DEVICE FOR SYNCHRONIZING DIGITAL SIGNALS FOR MAGNETIC RECORDERS WITH ROTATING HEADS
JPS6275975A (en) * 1985-09-27 1987-04-07 Sony Corp Signal discriminating method
EP0353767A2 (en) * 1988-08-05 1990-02-07 Fujitsu Limited Detecting sector servo information in a disk system
JP2009048154A (en) * 2007-08-20 2009-03-05 Renei Kagi Kofun Yugenkoshi High transmission rate interface for transmitting both clocks and data

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2544145A1 (en) * 1983-04-06 1984-10-12 Ampex METHOD AND DEVICE FOR SYNCHRONIZING DIGITAL SIGNALS FOR MAGNETIC RECORDERS WITH ROTATING HEADS
JPS6275975A (en) * 1985-09-27 1987-04-07 Sony Corp Signal discriminating method
EP0353767A2 (en) * 1988-08-05 1990-02-07 Fujitsu Limited Detecting sector servo information in a disk system
US5442499A (en) * 1988-08-05 1995-08-15 Fujitsu Limited Method of detecting sector servo information in a disk system
JP2009048154A (en) * 2007-08-20 2009-03-05 Renei Kagi Kofun Yugenkoshi High transmission rate interface for transmitting both clocks and data

Also Published As

Publication number Publication date
JPS6213747B2 (en) 1987-03-28

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