IT1164984B - Apparecchiatura per la compensazione dinamica degli errori in una matrice di memoria - Google Patents

Apparecchiatura per la compensazione dinamica degli errori in una matrice di memoria

Info

Publication number
IT1164984B
IT1164984B IT20568/79A IT2056879A IT1164984B IT 1164984 B IT1164984 B IT 1164984B IT 20568/79 A IT20568/79 A IT 20568/79A IT 2056879 A IT2056879 A IT 2056879A IT 1164984 B IT1164984 B IT 1164984B
Authority
IT
Italy
Prior art keywords
errors
equipment
memory matrix
dynamic compensation
compensation
Prior art date
Application number
IT20568/79A
Other languages
English (en)
Italian (it)
Other versions
IT7920568A0 (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7920568A0 publication Critical patent/IT7920568A0/it
Application granted granted Critical
Publication of IT1164984B publication Critical patent/IT1164984B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
IT20568/79A 1978-03-16 1979-02-27 Apparecchiatura per la compensazione dinamica degli errori in una matrice di memoria IT1164984B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/887,092 US4404647A (en) 1978-03-16 1978-03-16 Dynamic array error recovery

Publications (2)

Publication Number Publication Date
IT7920568A0 IT7920568A0 (it) 1979-02-27
IT1164984B true IT1164984B (it) 1987-04-22

Family

ID=25390442

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20568/79A IT1164984B (it) 1978-03-16 1979-02-27 Apparecchiatura per la compensazione dinamica degli errori in una matrice di memoria

Country Status (6)

Country Link
US (1) US4404647A (enExample)
JP (1) JPS54124941A (enExample)
DE (1) DE2907333A1 (enExample)
FR (1) FR2420170A1 (enExample)
GB (1) GB2016759A (enExample)
IT (1) IT1164984B (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3012159C2 (de) * 1980-03-26 1982-09-02 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Anordnung zur gesicherten Datenausgabe
DE3133304A1 (de) * 1981-08-22 1983-03-03 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur erhoehung der zuverlaessigkeit von halbleiterspeichern in kraftfahrzeugen
US4408305A (en) * 1981-09-28 1983-10-04 Motorola, Inc. Memory with permanent array division capability
JPS5883396A (ja) * 1981-11-11 1983-05-19 Toshiba Corp デ−タ処理装置
CA1206619A (en) * 1982-01-29 1986-06-24 Frank T. Check, Jr. Electronic postage meter having redundant memory
JPS60179860A (ja) * 1984-02-27 1985-09-13 Fuji Electric Co Ltd 記憶装置の切換制御方式
GB2172722B (en) * 1985-03-22 1989-06-28 United Technologies Corp Backup control system (bucs)
US5072368A (en) * 1985-10-31 1991-12-10 International Business Machines Corporation Immediate duplication of I/O requests on a record by record basis by a computer operating system
US4774712A (en) * 1986-10-01 1988-09-27 International Business Machines Corporation Redundant storage device having address determined by parity of lower address bits
JPS63245529A (ja) * 1987-03-31 1988-10-12 Toshiba Corp レジスタ退避復元装置
US5175839A (en) * 1987-12-24 1992-12-29 Fujitsu Limited Storage control system in a computer system for double-writing
JPH0683716A (ja) * 1992-09-01 1994-03-25 Rohm Co Ltd 電気的書換可能型不揮発メモリ
JPH07175102A (ja) * 1993-12-21 1995-07-14 Seikosha Co Ltd カメラのデータ処理装置
JPH08286980A (ja) * 1995-04-14 1996-11-01 Kofu Nippon Denki Kk Ｆｗを用いた情報処理装置及び情報処理装置のｆｗ登録 方法
US5758057A (en) * 1995-06-21 1998-05-26 Mitsubishi Denki Kabushiki Kaisha Multi-media storage system
DE19534783A1 (de) * 1995-09-19 1996-11-14 Siemens Ag Verfahren zum Selbsttest eines Mikrocontrollers
US5611042A (en) * 1995-10-10 1997-03-11 Lordi; Angela L. Data error detection and correction for a shared SRAM
JPH10287027A (ja) * 1997-02-14 1998-10-27 Canon Inc プリンタ装置及びプリンタ装置における情報の保護方法
JP3674227B2 (ja) * 1997-03-14 2005-07-20 株式会社日立製作所 可搬メディアを収納する記憶装置
US6381708B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. Method for decoding addresses for a defective memory array
US6381707B1 (en) * 1998-04-28 2002-04-30 Micron Technology, Inc. System for decoding addresses for a defective memory array
US6804819B1 (en) 2000-09-18 2004-10-12 Hewlett-Packard Development Company, L.P. Method, system, and computer program product for a data propagation platform and applications of same
US7386610B1 (en) 2000-09-18 2008-06-10 Hewlett-Packard Development Company, L.P. Internet protocol data mirroring
US6977927B1 (en) 2000-09-18 2005-12-20 Hewlett-Packard Development Company, L.P. Method and system of allocating storage resources in a storage area network
US6606690B2 (en) 2001-02-20 2003-08-12 Hewlett-Packard Development Company, L.P. System and method for accessing a storage area network as network attached storage
US7870471B2 (en) * 2007-01-31 2011-01-11 Sandisk 3D Llc Methods and apparatus for employing redundant arrays to configure non-volatile memory
US7870472B2 (en) * 2007-01-31 2011-01-11 Sandisk 3D Llc Methods and apparatus for employing redundant arrays to configure non-volatile memory
US9195459B2 (en) * 2013-04-26 2015-11-24 Min-Sung Tseng Simultaneously accessible memory device and method for using the same

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
US3387276A (en) * 1965-08-13 1968-06-04 Sperry Rand Corp Off-line memory test
US3576982A (en) * 1968-12-16 1971-05-04 Ibm Error tolerant read-only storage system
US3623019A (en) * 1969-11-26 1971-11-23 Bell Telephone Labor Inc Programmed time-out monitoring arrangement using map timing
US3668644A (en) * 1970-02-09 1972-06-06 Burroughs Corp Failsafe memory system
US3629842A (en) * 1970-04-30 1971-12-21 Bell Telephone Labor Inc Multiple memory-accessing system
US3681757A (en) * 1970-06-10 1972-08-01 Cogar Corp System for utilizing data storage chips which contain operating and non-operating storage cells
GB1425173A (en) * 1972-05-03 1976-02-18 Gen Electric Co Ltd Data processing systems
US3755791A (en) * 1972-06-01 1973-08-28 Ibm Memory system with temporary or permanent substitution of cells for defective cells
US3889237A (en) * 1973-11-16 1975-06-10 Sperry Rand Corp Common storage controller for dual processor system
US4010450A (en) * 1975-03-26 1977-03-01 Honeywell Information Systems, Inc. Fail soft memory
JPS51127626A (en) * 1975-04-30 1976-11-06 Hitachi Ltd Information processor

Also Published As

Publication number Publication date
US4404647A (en) 1983-09-13
GB2016759A (en) 1979-09-26
FR2420170A1 (fr) 1979-10-12
JPS54124941A (en) 1979-09-28
DE2907333C2 (enExample) 1988-09-15
IT7920568A0 (it) 1979-02-27
DE2907333A1 (de) 1979-09-27

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