IT1093469B - Procedimento per la produzione di almeno in circuito analogico intergrato con almeno un circuito i alla seconda/l - Google Patents
Procedimento per la produzione di almeno in circuito analogico intergrato con almeno un circuito i alla seconda/lInfo
- Publication number
- IT1093469B IT1093469B IT7821965A IT2196578A IT1093469B IT 1093469 B IT1093469 B IT 1093469B IT 7821965 A IT7821965 A IT 7821965A IT 2196578 A IT2196578 A IT 2196578A IT 1093469 B IT1093469 B IT 1093469B
- Authority
- IT
- Italy
- Prior art keywords
- circuit
- procedure
- per
- production
- integrated
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/133—Emitter regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/087—I2L integrated injection logic
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19772715158 DE2715158A1 (de) | 1977-04-05 | 1977-04-05 | Verfahren zur herstellung mindestens einer mit mindestens einer i hoch 2 l-schaltung integrierten analogschaltung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT7821965A0 IT7821965A0 (it) | 1978-04-04 |
| IT1093469B true IT1093469B (it) | 1985-07-19 |
Family
ID=6005695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT7821965A IT1093469B (it) | 1977-04-05 | 1978-04-04 | Procedimento per la produzione di almeno in circuito analogico intergrato con almeno un circuito i alla seconda/l |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4197147A (it) |
| DE (1) | DE2715158A1 (it) |
| FR (1) | FR2386902A1 (it) |
| GB (1) | GB1603184A (it) |
| IT (1) | IT1093469B (it) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3020609C2 (de) * | 1979-05-31 | 1985-11-07 | Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa | Verfahren zum Herstellen einer integrierten Schaltung mit wenigstens einem I↑2↑L-Element |
| JPS56115525A (en) * | 1980-02-18 | 1981-09-10 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
| DE3174824D1 (en) * | 1980-12-17 | 1986-07-17 | Matsushita Electric Industrial Co Ltd | Semiconductor integrated circuit |
| US4546539A (en) * | 1982-12-08 | 1985-10-15 | Harris Corporation | I2 L Structure and fabrication process compatible with high voltage bipolar transistors |
| JPS60117765A (ja) * | 1983-11-30 | 1985-06-25 | Fujitsu Ltd | 半導体装置の製造方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3566218A (en) * | 1968-10-02 | 1971-02-23 | Nat Semiconductor Corp The | Multiple base width integrated circuit |
| US3770519A (en) * | 1970-08-05 | 1973-11-06 | Ibm | Isolation diffusion method for making reduced beta transistor or diodes |
| DE2137976C3 (de) * | 1971-07-29 | 1978-08-31 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithischer Speicher und Verfahren zur Herstellung |
| JPS5548704B2 (it) * | 1973-06-01 | 1980-12-08 | ||
| DE2453134C3 (de) * | 1974-11-08 | 1983-02-10 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planardiffusionsverfahren |
| DE2532608C2 (de) * | 1975-07-22 | 1982-09-02 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planardiffusionsverfahren zum Herstellen einer monolithisch integrierten Schaltung |
| US4087900A (en) * | 1976-10-18 | 1978-05-09 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions |
-
1977
- 1977-04-05 DE DE19772715158 patent/DE2715158A1/de not_active Ceased
-
1978
- 1978-04-04 GB GB13120/78A patent/GB1603184A/en not_active Expired
- 1978-04-04 IT IT7821965A patent/IT1093469B/it active
- 1978-04-04 US US05/893,521 patent/US4197147A/en not_active Expired - Lifetime
- 1978-04-05 FR FR7810113A patent/FR2386902A1/fr not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| FR2386902A1 (fr) | 1978-11-03 |
| GB1603184A (en) | 1981-11-18 |
| DE2715158A1 (de) | 1978-10-19 |
| US4197147A (en) | 1980-04-08 |
| IT7821965A0 (it) | 1978-04-04 |
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