IT1079558B - Memoria perfezionata - Google Patents

Memoria perfezionata

Info

Publication number
IT1079558B
IT1079558B IT19958/77A IT1995877A IT1079558B IT 1079558 B IT1079558 B IT 1079558B IT 19958/77 A IT19958/77 A IT 19958/77A IT 1995877 A IT1995877 A IT 1995877A IT 1079558 B IT1079558 B IT 1079558B
Authority
IT
Italy
Prior art keywords
improved memory
memory
improved
Prior art date
Application number
IT19958/77A
Other languages
English (en)
Italian (it)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1079558B publication Critical patent/IT1079558B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/10—DRAM devices comprising bipolar components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • H10D84/406—Combinations of FETs or IGBTs with vertical BJTs and with one or more of diodes, resistors or capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
IT19958/77A 1976-03-01 1977-02-04 Memoria perfezionata IT1079558B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/662,492 US4090254A (en) 1976-03-01 1976-03-01 Charge injector transistor memory

Publications (1)

Publication Number Publication Date
IT1079558B true IT1079558B (it) 1985-05-13

Family

ID=24657943

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19958/77A IT1079558B (it) 1976-03-01 1977-02-04 Memoria perfezionata

Country Status (7)

Country Link
US (1) US4090254A (show.php)
JP (1) JPS52106280A (show.php)
CA (1) CA1097813A (show.php)
DE (1) DE2708126A1 (show.php)
FR (1) FR2343312A1 (show.php)
GB (1) GB1571424A (show.php)
IT (1) IT1079558B (show.php)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4247861A (en) * 1979-03-09 1981-01-27 Rca Corporation High performance electrically alterable read-only memory (EAROM)
US4276616A (en) * 1979-04-23 1981-06-30 Fairchild Camera & Instrument Corp. Merged bipolar/field-effect bistable memory cell
JPS56163585A (en) * 1980-05-17 1981-12-16 Semiconductor Res Found Semiconductor memory
US4395723A (en) * 1980-05-27 1983-07-26 Eliyahou Harari Floating substrate dynamic RAM cell with lower punch-through means
DE3330013A1 (de) * 1983-08-19 1985-02-28 Siemens AG, 1000 Berlin und 8000 München Statische speicherzelle
JPS60136084A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd 半導体集積回路装置
US4598390A (en) * 1984-06-25 1986-07-01 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4578779A (en) * 1984-06-25 1986-03-25 International Business Machines Corporation Voltage mode operation scheme for bipolar arrays
US4596002A (en) * 1984-06-25 1986-06-17 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4791611A (en) * 1985-09-11 1988-12-13 University Of Waterloo VLSI dynamic memory
US5060194A (en) * 1989-03-31 1991-10-22 Kabushiki Kaisha Toshiba Semiconductor memory device having a bicmos memory cell
TW260816B (show.php) * 1991-12-16 1995-10-21 Philips Nv
TW289168B (show.php) * 1991-12-16 1996-10-21 Philips Nv
US5448513A (en) * 1993-12-02 1995-09-05 Regents Of The University Of California Capacitorless DRAM device on silicon-on-insulator substrate
US5835436A (en) 1995-07-03 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
US5909400A (en) * 1997-08-22 1999-06-01 International Business Machines Corporation Three device BICMOS gain cell
US6229161B1 (en) 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6690038B1 (en) 1999-06-05 2004-02-10 T-Ram, Inc. Thyristor-based device over substrate surface
US6621725B2 (en) * 2000-08-17 2003-09-16 Kabushiki Kaisha Toshiba Semiconductor memory device with floating storage bulk region and method of manufacturing the same
US6727528B1 (en) 2001-03-22 2004-04-27 T-Ram, Inc. Thyristor-based device including trench dielectric isolation for thyristor-body regions
US7456439B1 (en) 2001-03-22 2008-11-25 T-Ram Semiconductor, Inc. Vertical thyristor-based memory with trench isolation and its method of fabrication
US6804162B1 (en) 2001-04-05 2004-10-12 T-Ram, Inc. Read-modify-write memory using read-or-write banks
US6583452B1 (en) 2001-12-17 2003-06-24 T-Ram, Inc. Thyristor-based device having extended capacitive coupling
US6832300B2 (en) 2002-03-20 2004-12-14 Hewlett-Packard Development Company, L.P. Methods and apparatus for control of asynchronous cache
KR100620658B1 (ko) * 2004-05-17 2006-09-14 주식회사 하이닉스반도체 나노 튜브 셀 및 그 나노 튜브 셀과 이중 비트라인 센싱구조를 갖는 셀 어레이 회로
US7638385B2 (en) * 2005-05-02 2009-12-29 Semiconductor Components Industries, Llc Method of forming a semiconductor device and structure therefor
US8014199B2 (en) * 2006-05-22 2011-09-06 Spansion Llc Memory system with switch element
US7781797B2 (en) * 2006-06-29 2010-08-24 International Business Machines Corporation One-transistor static random access memory with integrated vertical PNPN device
US8035126B2 (en) * 2007-10-29 2011-10-11 International Business Machines Corporation One-transistor static random access memory with integrated vertical PNPN device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3390273A (en) * 1966-08-08 1968-06-25 Fairchild Camera Instr Co Electronic shutter with gating and storage features
US3697962A (en) * 1970-11-27 1972-10-10 Ibm Two device monolithic bipolar memory array
US3699540A (en) * 1970-12-31 1972-10-17 Bell Telephone Labor Inc Two-terminal transistor memory utilizing collector-base avalanche breakdown
BE792293A (fr) * 1971-12-09 1973-03-30 Western Electric Co Dispositif de memoire a semi-conducteur
US3827034A (en) * 1972-09-14 1974-07-30 Ferranti Ltd Semiconductor information storage devices
US3949243A (en) * 1973-10-18 1976-04-06 Fairchild Camera And Instrument Corporation Bipolar memory circuit

Also Published As

Publication number Publication date
GB1571424A (en) 1980-07-16
JPS52106280A (en) 1977-09-06
FR2343312A1 (fr) 1977-09-30
US4090254A (en) 1978-05-16
DE2708126A1 (de) 1977-09-15
CA1097813A (en) 1981-03-17
FR2343312B1 (show.php) 1979-03-09

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