FR2343312A1 - Cellule de memoire a transistors et reseau forme de telles cellules - Google Patents

Cellule de memoire a transistors et reseau forme de telles cellules

Info

Publication number
FR2343312A1
FR2343312A1 FR7702065A FR7702065A FR2343312A1 FR 2343312 A1 FR2343312 A1 FR 2343312A1 FR 7702065 A FR7702065 A FR 7702065A FR 7702065 A FR7702065 A FR 7702065A FR 2343312 A1 FR2343312 A1 FR 2343312A1
Authority
FR
France
Prior art keywords
transistors
cells
memory cell
network forming
network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7702065A
Other languages
English (en)
Other versions
FR2343312B1 (fr
Inventor
Irving T Ho
Jacob Riseman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2343312A1 publication Critical patent/FR2343312A1/fr
Application granted granted Critical
Publication of FR2343312B1 publication Critical patent/FR2343312B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0711—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
    • H01L27/0716—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/10—DRAM devices comprising bipolar components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
FR7702065A 1976-03-01 1977-01-18 Cellule de memoire a transistors et reseau forme de telles cellules Granted FR2343312A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/662,492 US4090254A (en) 1976-03-01 1976-03-01 Charge injector transistor memory

Publications (2)

Publication Number Publication Date
FR2343312A1 true FR2343312A1 (fr) 1977-09-30
FR2343312B1 FR2343312B1 (fr) 1979-03-09

Family

ID=24657943

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7702065A Granted FR2343312A1 (fr) 1976-03-01 1977-01-18 Cellule de memoire a transistors et reseau forme de telles cellules

Country Status (7)

Country Link
US (1) US4090254A (fr)
JP (1) JPS52106280A (fr)
CA (1) CA1097813A (fr)
DE (1) DE2708126A1 (fr)
FR (1) FR2343312A1 (fr)
GB (1) GB1571424A (fr)
IT (1) IT1079558B (fr)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4247861A (en) * 1979-03-09 1981-01-27 Rca Corporation High performance electrically alterable read-only memory (EAROM)
US4276616A (en) * 1979-04-23 1981-06-30 Fairchild Camera & Instrument Corp. Merged bipolar/field-effect bistable memory cell
JPS56163585A (en) * 1980-05-17 1981-12-16 Semiconductor Res Found Semiconductor memory
US4395723A (en) * 1980-05-27 1983-07-26 Eliyahou Harari Floating substrate dynamic RAM cell with lower punch-through means
DE3330013A1 (de) * 1983-08-19 1985-02-28 Siemens AG, 1000 Berlin und 8000 München Statische speicherzelle
JPS60136084A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd 半導体集積回路装置
US4598390A (en) * 1984-06-25 1986-07-01 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4578779A (en) * 1984-06-25 1986-03-25 International Business Machines Corporation Voltage mode operation scheme for bipolar arrays
US4596002A (en) * 1984-06-25 1986-06-17 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4791611A (en) * 1985-09-11 1988-12-13 University Of Waterloo VLSI dynamic memory
US5060194A (en) * 1989-03-31 1991-10-22 Kabushiki Kaisha Toshiba Semiconductor memory device having a bicmos memory cell
TW260816B (fr) * 1991-12-16 1995-10-21 Philips Nv
TW289168B (fr) * 1991-12-16 1996-10-21 Philips Nv
US5448513A (en) * 1993-12-02 1995-09-05 Regents Of The University Of California Capacitorless DRAM device on silicon-on-insulator substrate
US5835436A (en) * 1995-07-03 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
US5909400A (en) * 1997-08-22 1999-06-01 International Business Machines Corporation Three device BICMOS gain cell
US6229161B1 (en) * 1998-06-05 2001-05-08 Stanford University Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches
US6690038B1 (en) 1999-06-05 2004-02-10 T-Ram, Inc. Thyristor-based device over substrate surface
US6621725B2 (en) * 2000-08-17 2003-09-16 Kabushiki Kaisha Toshiba Semiconductor memory device with floating storage bulk region and method of manufacturing the same
US7456439B1 (en) 2001-03-22 2008-11-25 T-Ram Semiconductor, Inc. Vertical thyristor-based memory with trench isolation and its method of fabrication
US6727528B1 (en) 2001-03-22 2004-04-27 T-Ram, Inc. Thyristor-based device including trench dielectric isolation for thyristor-body regions
US6804162B1 (en) 2001-04-05 2004-10-12 T-Ram, Inc. Read-modify-write memory using read-or-write banks
US6583452B1 (en) 2001-12-17 2003-06-24 T-Ram, Inc. Thyristor-based device having extended capacitive coupling
US6832300B2 (en) 2002-03-20 2004-12-14 Hewlett-Packard Development Company, L.P. Methods and apparatus for control of asynchronous cache
KR100620658B1 (ko) * 2004-05-17 2006-09-14 주식회사 하이닉스반도체 나노 튜브 셀 및 그 나노 튜브 셀과 이중 비트라인 센싱구조를 갖는 셀 어레이 회로
US7638385B2 (en) * 2005-05-02 2009-12-29 Semiconductor Components Industries, Llc Method of forming a semiconductor device and structure therefor
US8014199B2 (en) * 2006-05-22 2011-09-06 Spansion Llc Memory system with switch element
US7781797B2 (en) * 2006-06-29 2010-08-24 International Business Machines Corporation One-transistor static random access memory with integrated vertical PNPN device
US8035126B2 (en) * 2007-10-29 2011-10-11 International Business Machines Corporation One-transistor static random access memory with integrated vertical PNPN device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3390273A (en) * 1966-08-08 1968-06-25 Fairchild Camera Instr Co Electronic shutter with gating and storage features
US3697962A (en) * 1970-11-27 1972-10-10 Ibm Two device monolithic bipolar memory array
US3699540A (en) * 1970-12-31 1972-10-17 Bell Telephone Labor Inc Two-terminal transistor memory utilizing collector-base avalanche breakdown
BE792293A (fr) * 1971-12-09 1973-03-30 Western Electric Co Dispositif de memoire a semi-conducteur
US3827034A (en) * 1972-09-14 1974-07-30 Ferranti Ltd Semiconductor information storage devices
US3949243A (en) * 1973-10-18 1976-04-06 Fairchild Camera And Instrument Corporation Bipolar memory circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
IEEE INTERNATIONAL SOLID STATE CIRCUITS CONFERENCE, 16-18 FEVRIER 1972, VOLUME 15, NEW-YORK, MAR: "TRANSIENT SELECTION GATES USING BREAKDOWN", PAGES 50 - 51) *
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME SC8, NO. 4, AOUT 1973, NEW-YORK *
KASPERKOVITZ: "A DYNAMIC DELAY LINE WITH A BIPOLAR OHE-TRANSISTOR CELL", PAGES 251 A 259 *

Also Published As

Publication number Publication date
US4090254A (en) 1978-05-16
JPS52106280A (en) 1977-09-06
CA1097813A (fr) 1981-03-17
FR2343312B1 (fr) 1979-03-09
IT1079558B (it) 1985-05-13
DE2708126A1 (de) 1977-09-15
GB1571424A (en) 1980-07-16

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