IT1064207B - Disposizione circuitale per regolare,nella sezione ricevente,la fase di un segnale di temporizzazione per la trasmissione di dati - Google Patents

Disposizione circuitale per regolare,nella sezione ricevente,la fase di un segnale di temporizzazione per la trasmissione di dati

Info

Publication number
IT1064207B
IT1064207B IT29145/76A IT2914576A IT1064207B IT 1064207 B IT1064207 B IT 1064207B IT 29145/76 A IT29145/76 A IT 29145/76A IT 2914576 A IT2914576 A IT 2914576A IT 1064207 B IT1064207 B IT 1064207B
Authority
IT
Italy
Prior art keywords
regulate
phase
data transmission
timing signal
receiving section
Prior art date
Application number
IT29145/76A
Other languages
English (en)
Italian (it)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19752551243 external-priority patent/DE2551243C2/de
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of IT1064207B publication Critical patent/IT1064207B/it

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/497—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by correlative coding, e.g. partial response coding or echo modulation coding transmitters and receivers for partial response systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Television Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)
IT29145/76A 1975-11-14 1976-11-09 Disposizione circuitale per regolare,nella sezione ricevente,la fase di un segnale di temporizzazione per la trasmissione di dati IT1064207B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752551243 DE2551243C2 (de) 1975-11-14 Verfahre n und Schaltungsanordnung zur empfangsseitigen Regelung der Phase eines Taktsignals bei der Datenübertragung

Publications (1)

Publication Number Publication Date
IT1064207B true IT1064207B (it) 1985-02-18

Family

ID=5961784

Family Applications (1)

Application Number Title Priority Date Filing Date
IT29145/76A IT1064207B (it) 1975-11-14 1976-11-09 Disposizione circuitale per regolare,nella sezione ricevente,la fase di un segnale di temporizzazione per la trasmissione di dati

Country Status (13)

Country Link
US (1) US4099023A (enExample)
AT (1) AT351610B (enExample)
AU (1) AU500982B2 (enExample)
BE (1) BE848302A (enExample)
BR (1) BR7607503A (enExample)
CA (1) CA1091784A (enExample)
DK (1) DK503476A (enExample)
FR (1) FR2334248A1 (enExample)
GB (1) GB1510400A (enExample)
IT (1) IT1064207B (enExample)
NL (1) NL7612625A (enExample)
NO (1) NO143009C (enExample)
SE (1) SE410135B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3036614A1 (de) * 1980-09-29 1982-05-13 Siemens AG, 1000 Berlin und 8000 München Verfahren zur erkennung von digitalinformation bei einer digitalen informationsuebertragung, insbesondere informationsuebertragung in mobilfunk-kommunikationssystemen

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL272023A (enExample) * 1960-12-05
US3716851A (en) * 1971-02-09 1973-02-13 Bell Telephone Labor Inc Self-synchronizing sequential encoding systems
US3806647A (en) * 1972-07-28 1974-04-23 Communications Satellite Corp Phase ambiguity resolution system using convolutional coding-threshold decoding

Also Published As

Publication number Publication date
FR2334248A1 (fr) 1977-07-01
DK503476A (da) 1977-05-15
SE7612239L (sv) 1977-05-15
NO143009B (no) 1980-08-18
CA1091784A (en) 1980-12-16
BR7607503A (pt) 1977-09-20
NL7612625A (nl) 1977-05-17
BE848302A (fr) 1977-05-12
AT351610B (de) 1979-08-10
DE2551243B1 (de) 1976-12-09
US4099023A (en) 1978-07-04
SE410135B (sv) 1979-09-24
NO763870L (enExample) 1977-05-18
AU500982B2 (en) 1979-06-07
DE2551243A1 (enExample) 1976-12-09
ATA744176A (de) 1979-01-15
GB1510400A (en) 1978-05-10
AU1914376A (en) 1978-05-04
FR2334248B1 (enExample) 1983-02-04
NO143009C (no) 1980-11-26

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