JPS5264260A - Synchronous data signal receiver - Google Patents

Synchronous data signal receiver

Info

Publication number
JPS5264260A
JPS5264260A JP51137862A JP13786276A JPS5264260A JP S5264260 A JPS5264260 A JP S5264260A JP 51137862 A JP51137862 A JP 51137862A JP 13786276 A JP13786276 A JP 13786276A JP S5264260 A JPS5264260 A JP S5264260A
Authority
JP
Japan
Prior art keywords
data signal
signal receiver
synchronous data
synchronous
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP51137862A
Other languages
Japanese (ja)
Inventor
De Yageru Furanku
Fuan Deru Burufu Petaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of JPS5264260A publication Critical patent/JPS5264260A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/152—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
JP51137862A 1975-11-21 1976-11-18 Synchronous data signal receiver Pending JPS5264260A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7513610A NL7513610A (en) 1975-11-21 1975-11-21 RECEIVER FOR SYNCHRONOUS SIGNALS WITH DOUBLE PHASE-LOCKED LOOP.

Publications (1)

Publication Number Publication Date
JPS5264260A true JPS5264260A (en) 1977-05-27

Family

ID=19824895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51137862A Pending JPS5264260A (en) 1975-11-21 1976-11-18 Synchronous data signal receiver

Country Status (8)

Country Link
JP (1) JPS5264260A (en)
AU (1) AU507254B2 (en)
CA (1) CA1066782A (en)
DE (1) DE2651043C3 (en)
FR (1) FR2332660A1 (en)
GB (1) GB1507638A (en)
NL (1) NL7513610A (en)
SE (1) SE410693B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2823343B1 (en) * 1978-05-29 1979-08-16 Siemens Ag Method and arrangement for clock signal recovery in digital signal transmission
FR2441298A1 (en) * 1978-11-07 1980-06-06 Cit Alcatel RHYTHM RECOVERY DEVICE
ZA805414B (en) * 1979-09-14 1981-08-26 Plessey Overseas Arrangements for data timing recovery from distorted signals for use in adaptive modems with multi-level coding
JP2804755B2 (en) * 1986-09-01 1998-09-30 株式会社日立製作所 FSK signal demodulation circuit
CN107037487B (en) * 2016-02-04 2023-06-20 中国石油化工集团有限公司 Interwell electromagnetic synchronous measurement system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device

Also Published As

Publication number Publication date
AU1976376A (en) 1978-05-25
GB1507638A (en) 1978-04-19
NL7513610A (en) 1977-05-24
SE7612875L (en) 1977-05-22
FR2332660A1 (en) 1977-06-17
CA1066782A (en) 1979-11-20
DE2651043C3 (en) 1981-07-30
AU507254B2 (en) 1980-02-07
DE2651043B2 (en) 1980-09-11
SE410693B (en) 1979-10-22
DE2651043A1 (en) 1977-05-26

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