IT1043512B - Apparecchiatura per provare matricicincassate - Google Patents

Apparecchiatura per provare matricicincassate

Info

Publication number
IT1043512B
IT1043512B IT28475/75A IT2847575A IT1043512B IT 1043512 B IT1043512 B IT 1043512B IT 28475/75 A IT28475/75 A IT 28475/75A IT 2847575 A IT2847575 A IT 2847575A IT 1043512 B IT1043512 B IT 1043512B
Authority
IT
Italy
Prior art keywords
serials
equipment
testing received
testing
received
Prior art date
Application number
IT28475/75A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1043512B publication Critical patent/IT1043512B/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
IT28475/75A 1974-12-20 1975-10-21 Apparecchiatura per provare matricicincassate IT1043512B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/534,605 US3961251A (en) 1974-12-20 1974-12-20 Testing embedded arrays

Publications (1)

Publication Number Publication Date
IT1043512B true IT1043512B (it) 1980-02-29

Family

ID=24130779

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28475/75A IT1043512B (it) 1974-12-20 1975-10-21 Apparecchiatura per provare matricicincassate

Country Status (5)

Country Link
US (1) US3961251A (it)
CA (1) CA1048646A (it)
DE (1) DE2555435C2 (it)
FR (1) FR2295529A1 (it)
IT (1) IT1043512B (it)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4063080A (en) * 1976-06-30 1977-12-13 International Business Machines Corporation Method of propagation delay testing a level sensitive array logic system
AU530415B2 (en) * 1978-06-02 1983-07-14 International Standard Electric Corp. Integrated circuits
FR2432175A1 (fr) * 1978-07-27 1980-02-22 Cii Honeywell Bull Procede pour tester un systeme logique et systeme logique pour la mise en oeuvre de ce procede
JPS5552581A (en) * 1978-10-11 1980-04-17 Advantest Corp Pattern generator
US4225957A (en) * 1978-10-16 1980-09-30 International Business Machines Corporation Testing macros embedded in LSI chips
DE3029883A1 (de) * 1980-08-07 1982-03-11 Ibm Deutschland Gmbh, 7000 Stuttgart Schieberegister fuer pruef- und test-zwecke
EP0059188A1 (en) * 1980-09-08 1982-09-08 Mostek Corporation Tape burn-in circuit
US4380805A (en) * 1980-09-08 1983-04-19 Mostek Corporation Tape burn-in circuit
US4441075A (en) * 1981-07-02 1984-04-03 International Business Machines Corporation Circuit arrangement which permits the testing of each individual chip and interchip connection in a high density packaging structure having a plurality of interconnected chips, without any physical disconnection
US4481627A (en) * 1981-10-30 1984-11-06 Honeywell Information Systems Inc. Embedded memory testing method and apparatus
US4556840A (en) * 1981-10-30 1985-12-03 Honeywell Information Systems Inc. Method for testing electronic assemblies
US4808915A (en) * 1981-10-30 1989-02-28 Honeywell Bull, Inc. Assembly of electronic components testable by a reciprocal quiescent testing technique
GB2114782B (en) * 1981-12-02 1985-06-05 Burroughs Corp Branched-spiral wafer-scale integrated circuit
US4503386A (en) * 1982-04-20 1985-03-05 International Business Machines Corporation Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks
DE3241412A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zum testen eines hochintegrierten mikroprogramm-gesteuerten elektronischen bauteiles
US4527115A (en) * 1982-12-22 1985-07-02 Raytheon Company Configurable logic gate array
US4608669A (en) * 1984-05-18 1986-08-26 International Business Machines Corporation Self contained array timing
US4644265A (en) * 1985-09-03 1987-02-17 International Business Machines Corporation Noise reduction during testing of integrated circuit chips
US4669081A (en) * 1986-02-04 1987-05-26 Raytheon Company LSI fault insertion
US4726023A (en) * 1986-05-14 1988-02-16 International Business Machines Corporation Determination of testability of combined logic end memory by ignoring memory
US5025210A (en) * 1986-07-18 1991-06-18 Kabushiki Kaisha Toshiba Evaluation facilitating circuit device
KR880014482A (ko) * 1987-05-27 1988-12-24 미다 가쓰시게 반도체 집적회로 장치
JP2659095B2 (ja) * 1987-06-30 1997-09-30 富士通株式会社 ゲートアレイ及びメモリを有する半導体集積回路装置
US4853628A (en) * 1987-09-10 1989-08-01 Gazelle Microcircuits, Inc. Apparatus for measuring circuit parameters of a packaged semiconductor device
JP2521774B2 (ja) * 1987-10-02 1996-08-07 株式会社日立製作所 メモリ内蔵型論理ｌｓｉ及びそのｌｓｉの試験方法
US4878174A (en) * 1987-11-03 1989-10-31 Lsi Logic Corporation Flexible ASIC microcomputer permitting the modular modification of dedicated functions and macroinstructions
US4878209A (en) * 1988-03-17 1989-10-31 International Business Machines Corporation Macro performance test
US4875209A (en) * 1988-04-04 1989-10-17 Raytheon Company Transient and intermittent fault insertion
DE3886038T2 (de) * 1988-07-13 1994-05-19 Philips Nv Speichergerät, das einen zur Ausführung einer Selbstprüfung adaptierten statischen RAM-Speicher enthält und integrierte Schaltung, die als eingebauten statischen RAM-Speicher ein solches Gerät enthält.
US5254940A (en) * 1990-12-13 1993-10-19 Lsi Logic Corporation Testable embedded microprocessor and method of testing same
US5331643A (en) * 1991-09-04 1994-07-19 International Business Machines Corporation Self-testing logic with embedded arrays
GB9417297D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Method and apparatus for testing an integrated circuit device
US5847561A (en) * 1994-12-16 1998-12-08 Texas Instruments Incorporated Low overhead input and output boundary scan cells
US5574692A (en) * 1995-06-07 1996-11-12 Lsi Logic Corporation Memory testing apparatus for microelectronic integrated circuit
DE69724318T2 (de) * 1996-04-02 2004-05-27 STMicroelectronics, Inc., Carrollton Prüfung und Reparatur einer eingebetteten Speicherschaltung
US5841784A (en) * 1996-04-02 1998-11-24 Stmicroelectronics, Inc. Testing and repair of embedded memory
DE19735406A1 (de) * 1997-08-14 1999-02-18 Siemens Ag Halbleiterbauelement und Verfahren zum Testen und Betreiben eines Halbleiterbauelementes
JP2000012639A (ja) * 1998-06-24 2000-01-14 Toshiba Corp モニターｔｅｇのテスト回路
DE19911939C2 (de) * 1999-03-17 2001-03-22 Siemens Ag Verfahren für den eingebauten Selbsttest einer elektronischen Schaltung
US6928581B1 (en) 1999-09-14 2005-08-09 International Business Machines Corporation Innovative bypass circuit for circuit testing and modification
US6857088B1 (en) * 2000-12-06 2005-02-15 Cypress Semiconductor Corporation Method and system for testing the logic of a complex digital circuit containing embedded memory arrays
US7103814B2 (en) * 2002-10-25 2006-09-05 International Business Machines Corporation Testing logic and embedded memory in parallel
US6961886B2 (en) * 2003-04-16 2005-11-01 International Business Machines Corporation Diagnostic method for structural scan chain designs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1315731A (fr) * 1960-07-29 1963-01-25 Ibm Dispositif de correction d'erreurs
US3387276A (en) * 1965-08-13 1968-06-04 Sperry Rand Corp Off-line memory test
US3772595A (en) * 1971-03-19 1973-11-13 Teradyne Inc Method and apparatus for testing a digital logic fet by monitoring currents the device develops in response to input signals
US3758761A (en) * 1971-08-17 1973-09-11 Texas Instruments Inc Self-interconnecting/self-repairable electronic systems on a slice
US3790885A (en) * 1972-03-27 1974-02-05 Ibm Serial test patterns for mosfet testing
US3789205A (en) * 1972-09-28 1974-01-29 Ibm Method of testing mosfet planar boards
US3761695A (en) * 1972-10-16 1973-09-25 Ibm Method of level sensitive testing a functional logic system
US3781670A (en) * 1972-12-29 1973-12-25 Ibm Ac performance test for large scale integrated circuit chips

Also Published As

Publication number Publication date
FR2295529A1 (fr) 1976-07-16
FR2295529B1 (it) 1978-04-07
CA1048646A (en) 1979-02-13
US3961251A (en) 1976-06-01
DE2555435C2 (de) 1982-04-08
DE2555435A1 (de) 1976-06-24

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