IL123749A0 - Capped interlayer dielectric for chemical mechanical polishing - Google Patents
Capped interlayer dielectric for chemical mechanical polishingInfo
- Publication number
- IL123749A0 IL123749A0 IL12374996A IL12374996A IL123749A0 IL 123749 A0 IL123749 A0 IL 123749A0 IL 12374996 A IL12374996 A IL 12374996A IL 12374996 A IL12374996 A IL 12374996A IL 123749 A0 IL123749 A0 IL 123749A0
- Authority
- IL
- Israel
- Prior art keywords
- capped
- mechanical polishing
- chemical mechanical
- interlayer dielectric
- interlayer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US53600795A | 1995-09-29 | 1995-09-29 | |
| PCT/US1996/015201 WO1997012393A1 (en) | 1995-09-29 | 1996-09-23 | Capped interlayer dielectric for chemical mechanical polishing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IL123749A0 true IL123749A0 (en) | 1998-10-30 |
Family
ID=24136721
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IL12374996A IL123749A0 (en) | 1995-09-29 | 1996-09-23 | Capped interlayer dielectric for chemical mechanical polishing |
Country Status (8)
| Country | Link |
|---|---|
| EP (1) | EP1008175A4 (ja) |
| JP (1) | JPH11512877A (ja) |
| KR (1) | KR19990063743A (ja) |
| CN (1) | CN1203697A (ja) |
| AU (1) | AU7164596A (ja) |
| IL (1) | IL123749A0 (ja) |
| TW (1) | TW304297B (ja) |
| WO (1) | WO1997012393A1 (ja) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6153935A (en) * | 1999-09-30 | 2000-11-28 | International Business Machines Corporation | Dual etch stop/diffusion barrier for damascene interconnects |
| US7316972B2 (en) | 2002-08-30 | 2008-01-08 | Matsushita Electric Industrial Co., Ltd. | Contact hole formation method |
| US7394088B2 (en) | 2005-11-15 | 2008-07-01 | Macronix International Co., Ltd. | Thermally contained/insulated phase change memory device and method (combined) |
| US7521364B2 (en) * | 2005-12-02 | 2009-04-21 | Macronix Internation Co., Ltd. | Surface topology improvement method for plug surface areas |
| US8067762B2 (en) | 2006-11-16 | 2011-11-29 | Macronix International Co., Ltd. | Resistance random access memory structure for enhanced retention |
| DE102007063271B4 (de) * | 2007-12-31 | 2009-11-26 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines dielektrischen Zwischenschichtmaterials mit unterschiedlichen Abtragsraten während eines CMP-Prozesses |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01293632A (ja) * | 1988-05-23 | 1989-11-27 | Nec Corp | 半導体装置 |
| JPH0680638B2 (ja) * | 1990-07-05 | 1994-10-12 | 株式会社東芝 | 半導体装置の製造方法 |
| EP0469214A1 (en) * | 1990-07-31 | 1992-02-05 | International Business Machines Corporation | Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom |
| US5164340A (en) * | 1991-06-24 | 1992-11-17 | Sgs-Thomson Microelectronics, Inc | Structure and method for contacts in cmos devices |
| KR940009599B1 (ko) * | 1991-10-30 | 1994-10-15 | 삼성전자 주식회사 | 반도체 장치의 층간 절연막 형성방법 |
| US5244837A (en) * | 1993-03-19 | 1993-09-14 | Micron Semiconductor, Inc. | Semiconductor electrical interconnection methods |
| US5409858A (en) * | 1993-08-06 | 1995-04-25 | Micron Semiconductor, Inc. | Method for optimizing thermal budgets in fabricating semiconductors |
| US5340370A (en) * | 1993-11-03 | 1994-08-23 | Intel Corporation | Slurries for chemical mechanical polishing |
-
1996
- 1996-08-14 TW TW085109890A patent/TW304297B/zh active
- 1996-09-23 EP EP96933088A patent/EP1008175A4/en not_active Withdrawn
- 1996-09-23 CN CN96198689A patent/CN1203697A/zh active Pending
- 1996-09-23 JP JP9513527A patent/JPH11512877A/ja active Pending
- 1996-09-23 KR KR1019980702210A patent/KR19990063743A/ko not_active Ceased
- 1996-09-23 AU AU71645/96A patent/AU7164596A/en not_active Abandoned
- 1996-09-23 IL IL12374996A patent/IL123749A0/xx unknown
- 1996-09-23 WO PCT/US1996/015201 patent/WO1997012393A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| AU7164596A (en) | 1997-04-17 |
| TW304297B (ja) | 1997-05-01 |
| JPH11512877A (ja) | 1999-11-02 |
| EP1008175A1 (en) | 2000-06-14 |
| WO1997012393A1 (en) | 1997-04-03 |
| KR19990063743A (ko) | 1999-07-26 |
| CN1203697A (zh) | 1998-12-30 |
| EP1008175A4 (en) | 2000-10-18 |
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