IE50697B1 - High-voltage solid-state switch - Google Patents
High-voltage solid-state switchInfo
- Publication number
- IE50697B1 IE50697B1 IE2604/80A IE260480A IE50697B1 IE 50697 B1 IE50697 B1 IE 50697B1 IE 2604/80 A IE2604/80 A IE 2604/80A IE 260480 A IE260480 A IE 260480A IE 50697 B1 IE50697 B1 IE 50697B1
- Authority
- IE
- Ireland
- Prior art keywords
- region
- regions
- anode
- semiconductor body
- type
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 239000012535 impurity Substances 0.000 description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7391—Gated diode structures
- H01L29/7392—Gated diode structures with PN junction gate, e.g. field controlled thyristors (FCTh), static induction thyristors (SITh)
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thyristors (AREA)
- Bipolar Transistors (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Hartman-16 HIGH VOLTAGE SOLID-STATE SWITCH A high voltage solid-state switch utilizes a dielectrically isolated lightly doped n type semiconductor body with a heavily doped p type anode region, a heavily doped n type first gate region, a moderately doped p type second gate region, and a heavily doped n type cathode region. The second gate region surrounds the cathode region. The first gate region is located directly between the anode region and the second gate region. The doping levels of the regions and the location of the first gate region between the anode and cathode regions facilitates a current break feature of the switch.
[CA1145057A]
Description
This invention relates to solid-state switches and, in particular, to those capable of blocking high 5 voltages.
In an article entitled Development of Integrated Semiconductor Crosspoint Switches and a Fully Electronic Switching System by Michio Tokunaga et al, International Switching Symposium, October 26, 1976, at Kyoto, Japan, Paper 221-4, there is illustrated a dielectrically isolated all solid-state high voltage switch having an n type bulk semiconductor body. A p+ type conductivity anode region is separated from a p+ type conductivity first gate region only by portions of the bulk of the body. The first gate region surrounds and contacts an n+ type conductivity cathode region. A second p+ type conductivity gate region exists in the semiconductor body and is located in a portion of the semiconductor body other than between the anode and first gate regions. The switch is turned on by injecting or extracting current from one of the gate regions. Once current flow between anode and cathode ceases, then the switch reverts to its normally off blocking state. One deficiency of this structure is that it is unable conveniently to interrupt existing substantial current flow between anode and cathode (the output terminals).
It is desirable to have an all solid-state - 2 switch much like the one described hereinabove, but in which it is possible readily to interrupt (cut off) existing substantial current flow between the output terminals thereof.
According to the present invention there is provided a solid-state switching device comprising: a semiconductor body having a major surface and a bulk portion of a first conductivity type; first, second, and third mutually separated regions of the semiconductor body which each have a portion thereof common with the major surface; a fourth region of the semiconductor body which separates the third region from the bulk portion; the second and third regions being of the first conductivity type and being of lower resistivity than the bulk portion of the semiconductor body; the first and fourth regions being of a second conductivity type which is opposite of the first conductivity type and being of lower resistivity than the bulk portion of the semiconductor body; and the second region being located in between the first and fourth regions.
An embodiment of the invention will now be described by way of example with reference to the single Figure which illustrates a high voltage switch in accordance with the invention.
In the Figure there is illustrated a perspective view of a structure 10 having a planar surface 11 and comprising a polycrystalline Bemiconductive member 12 supporting a monocrystalline semiconductor body 16 whose bulk is of n type conductivity, and which is separated from support member^tiy a dielectric layer 14.
A localized anode region 18, which is of p+ type conductivity, is included in body 16 and has a portion which forms a part of surface 11. A localized gate region 20, which is of n+ type conductivity, is also included in body 16 and has a portion which forms a part of surface 11. A localized cathode region 24, which is of n+ type conductivity, is included in body 16 and has a portion which forms a part of surface 11. A region 22, 697 - 3 which is of p type conductivity closely surrounds cathode region 24 and acts as a depletion layer punch-through shield. In addition it acts to inhibit inversion of the portions of body 16 at or near surface 11 between regions 20 and 24. Gate region 20 is located between anode region 18 and region 22 and is separated from both by n- type bulk portions of body 16. The resistivities of regions 18, 20, and 24 are low compared to that of the bulk portions of body 16. The resistivity of region 22 is intermediate between that of cathode region 24 and that of the bulk portions of body 16.
Electrodes 28, 30, and 32 are conductors which make low resistance contact to the surface portions of regions 18, 20, and 24, respectively. An apertured dielectric covers major surafce 11 so as to isolate electrodes 28, 30, and 32 from all regions other than those intended to be electrically contacted. An electrode 36 provides a low resistance contact to support 12 by way of a highly doped region 34 which is of the same n type conductivity type as support 12.
The support 12 and the body 16 are each of silicon and the support 12 can alternatively be of £ type conductivity in which case the region 34 must also be.
As shown, electrodes 28, 30, and 32 overlap the edges of the semiconductor regions to which they make low resistance contact, although separated from the edges by portions of layer 26. Electrode 32 also completely overlaps region 22. This overlapping, which is known as field plating, facilitates high voltage operation because it increases the voltage at which breakdown occurs.
Xn the illustrative embodiment, support 12 and body 16 and regions 18, 20, 22, 24, and 34 are all silicon and are of η-, η-, p+, n+, £, n+, and n+ type conductivity, respectively, where the + designates relatively low resistivity and designates relatively high resistivity. Dielectric layer 14 is silicon dioxide and electrodes 28, 30, 32, and 36 are all aluminum layers. 50687 - 4 A plurality of separate bodies 36 ean be formed in a common support 1? to provide in one integrated structure a plurality of switches.
Structure 10 is typically operated as a switch 5 which has a low impedance path bewteen anode region 18 and cathode region 24 when in the ON (conducting) state and has a high impedance between these two regions when in the OFF (blocking) state. The potential applied to the gate region 20 determines the state of the switch when appropriate operating voltages are maintained on the other electrodes. Conduction between anode region 18 and cathode region 24 occurs if the potential of anode region 18 is sufficiently greater than that of cathode region 24 and if the potential of gate region 20 is below that of anode region 18. During the ON state holes are injected into body 16 from anode region 18 and electrons are injected into body 16 from cathode region 24. These holes and electrons are in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when structure 10 is operating in the ON state. This type of operation is denoted as dual carrier injection, Region 22 helps limit the punch-through of a depletion layer formed during operation between gate region 20 and cathode region 24 and helps inhibit formation of a surface inversion layer between these two regions. In addition, it facilitates gate region 20 and cathode region 24 being relatively closely spaced apart. This facilitates relatively low resistance between anode region 18 and cathode region 24 during the ON state.
Support 12 is typically held at the most positive potential level available. Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate region 20 is sufficiently more positive than that of anode region 18, cathode region 24 and region 22. The amount of excess positive potential - 5 needed to inhibit or cut off conduction depends on the geometry and impurity concentration (doping) levels of structure 10. This positive gate potential causes a portion of body 16 between gate region 20 and the dielectric layer 14 to be more positive in potential than anode region 18, cathode region 24 and/or region 22. This positive potential barrier inhibits the conduction of holes from anode region 18 to cathode region 24. In addition, depletion regions are formed at the junctions of anode region 18 and body 16 and between region 22 and body 16. The electric field within the depletion regions serves to retain holes within anode region 18 and region 22 and thus limits current flow between the anode and cathode regions (18 and 24). Gate region 20 collects electrons emitted at cathode region 24 before they can reach anode region 18.
During the ON state of structure 10, the junction diode comprising anode region 18 and semiconductor body 16 becomes forward-biased. Current limiting means such as a load (not illustrated) are normally included to limit the conduction through the forward-biased diode. While structure 10 is in the ON state the potential of the gate region 20 can be raised above the anode region 18 potential and current flow will continue between anode region 18 and cathode region 24 until the portion of semiconductor body 16 below gate region 20 and down to dielectric layer 14 is more positive in potential than anode region 18, cathode region 24, and region 22.
One typical embodiment has the following design.
Support member 12 is an n type silicon substrate, 18 to 22 mils (0.45 to 0.55mm) thick to provide mechanical support, with an impurity concentration of approximately 13 3 x 10 impurities/cm corresponding to a resistivity greater than 100 ohm-centimetres. The other dimensions are dictated by the size and number of bodies 16 to be included. Dielectric layer 14 is a silicon dioxide layer that is 2 to 4 microns thick. Body 16 is typically 30 to microns thick, approximately 430 microns long, 300 50687 - 6 microns wide, and is of n- type conductivity with an impurity concentration in the range of approximately 59 x 1013 impurities/cm3, Anode region 18 is of p+ type conductivity, is typically 2 to 4 microns thick, 44 microns wide, 52 microns long, and has an impurity concentration of approximately 1014 impurities/cm3 or larger. Electrode 28 is typically aluminum, with a thickness of li microns, a width of 84 microns, and a length of 105 microns. Region 20 is of n+ type conductivity and is typically 2 to 20 microns thick, 15 microns wide, 300 microns long, and has an impurity concentration of approximately 10^4 impurities/cm3 or larger. Electrode 30 is aluminum, li microns thick, 50 microns wide, and 340 microns long. The spacing between adjacent edges of electrodes 28 and 30 and between adjacent edges of electrodes 30 and 32 is typically 40 microns in both cases. Region 22 is £ type conductivity and is typically 3-6 microns thick, 64 microns wide, 60 microns long, and hae an impurity concentration of approximately 10^ to 10^® impurities/em3. Cathode region 24 is n+ type conductivity and is typically 2 microns thick, 48 microns wide, 44 microns long, and has an impurity concentration of approximately ^ impurities/cm3 or larger. Electrode 32 is aluminum, li microns thick, 104 microns wide, and 104 microns long. The spacing between the ends of regions 18 and 22 and the respective ends of body 16 is typically 55 microns. The spacing between anode regions 18 and gate region 20 is typically 74 microns as is the spacing between gate region 20 and region 22. Region 34 is n+ type conductivity and is typically 2 microns thick, 26 microns wide, 26 microns long, and has an impurity concentration of 10 impurities/cm or larger. Electrode 36 is aluminum which is lj microns thick, 26 microns wide, and 26 microns long. 697 - 7 The embodiment described herein is intended to be illustrative of the general principles of the invention. Various modifications are possible consistent with the invention. Por example, support member 12 can alternatively be £ type conductivity silicon, gallium arsenide, sapphire, a conductor, or an electrically inactive material. If region 12 is an electrically inactive material, then dielectric layer 14 can he eliminated. Still further, body 16 can he fabricated as an air isolated structure. This allows for the elimination of support member 12. Further, the electrodes can be doped polysilicon, gold, titanium, or other types of conductors. Still further, the impurity concentration levels, spacings between different regions, and other dimensions of the regions can he adjusted to allow significantly different operating voltages and currents than are described. Additionally, other types of dielectric materials, such as silicon nitride, can be substituted for silicon dioxide. Still further, the conductivity type of all regions within the dielectric layer can be reversed provided the voltage polarities are appropriately changed. Still further, an electrical contact can be made to region 22. Dependent on the resistivity of region 22, the electrical contact thereto could he made directly to region 22 or through a more highly doped semiconductor contact region added into a portion of region 22. Region 22 could then be used as a second gate region of structure 10. It is to be appreciated that the use of two of the structures of the present invention with the cathode of one coupled to the anode of the other and the first gates 20 heing common provides a bidirectional switch which allows alternating or direct current operation.
Claims (7)
1. A solid-state switching device comprising! a semiconductor body having a major surface and a bulk portion of a first conductivity type; first, second, and third mutually separated regions of the semiconductor body which each have a portion thereof common with the major surface; a fourth region of the semiconductor body which separates the third region from the bulk portion; the second and third regions being of the first conductivity type and being of lower resistivity than the bulk portion of the semiconductor body; the first and fourth regions being of a second conductivity type which is opposite of the first conductivity type and being of lower resistivity than the bulk portion of the semiconductor body; and the second region being located in between the first and fourth regions.
2. A device as claimed in claim 1 wherein the resistivity of the fourth region is intermediate between that of the third region and that of the bulk portion of the semiconductor body.
3. A device as claimed in claim 1 or claim 2 including separate electrical contacts to the first, second and third regions.
4. A device as claimed in any of the preceding claims wherein the semiconductor body is supported by a semiconductor support member and electrically insulated therefrom by a dielectric layer.
5. A structure comprising a plurality of devices as claimed in claim 4 sharing a common semiconductor support member.
6. A device as claimed in claim 4 or a structure as claimed in claim 5 including a separate electrode coupled to the semiconductor support member.
7. A solid-state switching device substantially as herein described with reference to the accompanying drawing.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10777579A | 1979-12-28 | 1979-12-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
IE802604L IE802604L (en) | 1981-06-28 |
IE50697B1 true IE50697B1 (en) | 1986-06-25 |
Family
ID=22318408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IE2604/80A IE50697B1 (en) | 1979-12-28 | 1980-12-12 | High-voltage solid-state switch |
Country Status (21)
Country | Link |
---|---|
JP (1) | JPS56103467A (en) |
KR (1) | KR840002413B1 (en) |
AU (1) | AU534874B2 (en) |
BE (1) | BE886821A (en) |
CA (1) | CA1145057A (en) |
CH (1) | CH652863A5 (en) |
DD (1) | DD156039A5 (en) |
DE (1) | DE3048702A1 (en) |
DK (1) | DK549780A (en) |
ES (1) | ES498097A0 (en) |
FR (1) | FR2473790A1 (en) |
GB (1) | GB2066569B (en) |
HK (1) | HK69684A (en) |
HU (1) | HU181246B (en) |
IE (1) | IE50697B1 (en) |
IL (1) | IL61780A (en) |
IT (1) | IT1134896B (en) |
NL (1) | NL8007051A (en) |
PL (1) | PL228665A1 (en) |
SE (1) | SE453621B (en) |
SG (1) | SG35184G (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4467344A (en) * | 1981-12-23 | 1984-08-21 | At&T Bell Telephone Laboratories, Incorporated | Bidirectional switch using two gated diode switches in a single dielectrically isolated tub |
US4573065A (en) * | 1982-12-10 | 1986-02-25 | At&T Bell Laboratories | Radial high voltage switch structure |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1039915A (en) * | 1964-05-25 | 1966-08-24 | Standard Telephones Cables Ltd | Improvements in or relating to semiconductor devices |
US3417393A (en) * | 1967-10-18 | 1968-12-17 | Texas Instruments Inc | Integrated circuit modular radar antenna |
DE2102103A1 (en) * | 1970-01-22 | 1971-07-29 | Rca Corp | Field effect controlled diode |
JPS5135114B1 (en) * | 1970-12-28 | 1976-09-30 | ||
US3725683A (en) * | 1971-02-03 | 1973-04-03 | Wescom | Discrete and integrated-type circuit |
DE2133430A1 (en) * | 1971-07-05 | 1973-01-18 | Siemens Ag | PLANAR FOUR-LAYER DIODE |
DE2241600A1 (en) * | 1971-08-26 | 1973-03-01 | Dionics Inc | HIGH VOLTAGE P-N TRANSITION AND ITS APPLICATION IN SEMICONDUCTOR SWITCHING ELEMENTS, AND THE PROCESS FOR ITS MANUFACTURING |
JPS5032942U (en) * | 1973-07-23 | 1975-04-10 | ||
JPS5210061A (en) * | 1975-07-15 | 1977-01-26 | Hitachi Ltd | Thyristor circuit |
US4130827A (en) * | 1976-12-03 | 1978-12-19 | Bell Telephone Laboratories, Incorporated | Integrated circuit switching network using low substrate leakage current thyristor construction |
JPS5412682A (en) * | 1977-06-30 | 1979-01-30 | Nec Corp | Thyristor |
GB1587540A (en) * | 1977-12-20 | 1981-04-08 | Philips Electronic Associated | Gate turn-off diodes and arrangements including such diodes |
GB2049283B (en) * | 1978-12-20 | 1983-07-27 | Western Electric Co | High voltage dielectrically isolated solid-state switch |
-
1980
- 1980-10-30 CA CA000363569A patent/CA1145057A/en not_active Expired
- 1980-12-12 IE IE2604/80A patent/IE50697B1/en unknown
- 1980-12-16 GB GB8040186A patent/GB2066569B/en not_active Expired
- 1980-12-16 SE SE8008851A patent/SE453621B/en not_active IP Right Cessation
- 1980-12-17 AU AU65449/80A patent/AU534874B2/en not_active Ceased
- 1980-12-19 CH CH9424/80A patent/CH652863A5/en not_active IP Right Cessation
- 1980-12-19 DD DD80226369A patent/DD156039A5/en unknown
- 1980-12-22 IL IL61780A patent/IL61780A/en unknown
- 1980-12-22 PL PL22866580A patent/PL228665A1/xx unknown
- 1980-12-23 DK DK549780A patent/DK549780A/en not_active Application Discontinuation
- 1980-12-23 BE BE0/203288A patent/BE886821A/en not_active IP Right Cessation
- 1980-12-23 DE DE19803048702 patent/DE3048702A1/en not_active Withdrawn
- 1980-12-23 ES ES498097A patent/ES498097A0/en active Granted
- 1980-12-23 HU HU80803113A patent/HU181246B/en unknown
- 1980-12-24 FR FR8027441A patent/FR2473790A1/en active Granted
- 1980-12-24 NL NL8007051A patent/NL8007051A/en not_active Application Discontinuation
- 1980-12-24 IT IT26947/80A patent/IT1134896B/en active
- 1980-12-26 KR KR1019800004953A patent/KR840002413B1/en active
- 1980-12-27 JP JP18942880A patent/JPS56103467A/en active Pending
-
1984
- 1984-05-04 SG SG351/84A patent/SG35184G/en unknown
- 1984-09-06 HK HK696/84A patent/HK69684A/en unknown
Also Published As
Publication number | Publication date |
---|---|
HU181246B (en) | 1983-06-28 |
SE453621B (en) | 1988-02-15 |
IT1134896B (en) | 1986-08-20 |
CH652863A5 (en) | 1985-11-29 |
DK549780A (en) | 1981-06-29 |
NL8007051A (en) | 1981-07-16 |
IE802604L (en) | 1981-06-28 |
IL61780A0 (en) | 1981-01-30 |
IT8026947A0 (en) | 1980-12-24 |
CA1145057A (en) | 1983-04-19 |
KR830004678A (en) | 1983-07-16 |
GB2066569B (en) | 1983-09-14 |
ES8201376A1 (en) | 1981-12-16 |
ES498097A0 (en) | 1981-12-16 |
BE886821A (en) | 1981-04-16 |
FR2473790B1 (en) | 1985-03-08 |
DD156039A5 (en) | 1982-07-21 |
AU6544980A (en) | 1981-07-02 |
HK69684A (en) | 1984-09-14 |
AU534874B2 (en) | 1984-02-16 |
IL61780A (en) | 1983-07-31 |
FR2473790A1 (en) | 1981-07-17 |
JPS56103467A (en) | 1981-08-18 |
GB2066569A (en) | 1981-07-08 |
SG35184G (en) | 1985-02-08 |
SE8008851L (en) | 1981-06-29 |
DE3048702A1 (en) | 1981-09-10 |
PL228665A1 (en) | 1981-09-04 |
KR840002413B1 (en) | 1984-12-27 |
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