CA1142265A - High voltage dielectrically isolated solid-state switch - Google Patents
High voltage dielectrically isolated solid-state switchInfo
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- CA1142265A CA1142265A CA000342165A CA342165A CA1142265A CA 1142265 A CA1142265 A CA 1142265A CA 000342165 A CA000342165 A CA 000342165A CA 342165 A CA342165 A CA 342165A CA 1142265 A CA1142265 A CA 1142265A
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Abstract
HIGH VOLTAGE DIELECTRICALLY
ISOLATED SOLID STATE SWITCH
Abstract of the Disclosure The present invention relates to a structure comprising a semiconductor body whose bulk is of one conductivity type and which has a major surface. A first localized region is formed thereon having one conductivity type. Second and third localized regions are formed thereon both of which have the opposite conductivity type. Each of the first, second and third regions have a relatively low resistivity as compared to the bulk portion of the semiconductor body. The localized regions are spaced apart from each other and separate electrodes are connected to each of the first, second and third regions.
The localized first, second and third regions each have a portion thereof which forms a part of the major surface of the semiconductor body.
ISOLATED SOLID STATE SWITCH
Abstract of the Disclosure The present invention relates to a structure comprising a semiconductor body whose bulk is of one conductivity type and which has a major surface. A first localized region is formed thereon having one conductivity type. Second and third localized regions are formed thereon both of which have the opposite conductivity type. Each of the first, second and third regions have a relatively low resistivity as compared to the bulk portion of the semiconductor body. The localized regions are spaced apart from each other and separate electrodes are connected to each of the first, second and third regions.
The localized first, second and third regions each have a portion thereof which forms a part of the major surface of the semiconductor body.
Description
Hartman-6 " 1~42265 1.
HIGH VOLTAGE DIELECTRICALLY
ISOLATED SOLID-STATE SWITCH
l'echnical Field This învention relates to solid-state structures and, in particular, to high voltage solid-state structures useful in telephone switching systems and many other applications.
Background of the Inv'ention -In an article entitled "A Field Terminated Diode" by Douglas F. Houston et al, published in IEEE Trans'act'ions-on'E'l'e'ctron'Devic'es, Vol. ED-23, No. 8, August 1976, there is described a discrete s~lid-state high voltage switch that has a vertical geometry and which includes a region which can be pinched off to provide an "OF~" state or which can be made highly conductive with dual carrier in~ection to provide an "ON" state. One p~oblem with this switch is that it is not easily manufacturable with other like switching devices on a common substrate.
Another problem is that the spacing between the grids and the cathode should be small to limit the magnitude of the control grid voltage; however, this limits the useful voltage range because it decreases grid-to-cathode breakdown voltage. This limitation effectivelylimits the use of two of the devices with the cathode of each coupled to the anode of the other to relatively low voltageS- Such a dual device structure would be useful as a high voltage bidirectional solid-state switch. An additional problem is that the base region should ideally be highly doped to avoid punch-through from the anode to the grid; however, this leads to a low voltage breakdown between anode and cathode. Widening of the base region limits the punch-through effect; however, it also increases the resistance of the device in the "ON" state.
It is desirable to have a solid-state switch which is easily integratable such that two or more " ~
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switches can be simultaneously fabricated on a common substrate and wherein each switch is capable of bilateral blocking of relatively high voltages.
Summary of the Invention In accordance with an aspect of the invention there is provided a solid-state switching device comprising a semiconductor body a bulk portion of which is of a first conductivity type, a first region of the first conductivity type, a second region of a second conductivity type opposite that of the first conductivity type, a gate region of the second conductivity type, the first, second, and gate regions being mutually separated by portions of the bulk portion, the resistivities of the first, second and gate regions being lower than the resistivity of the hulk portion, the parameters of the device being such that, with a first voltage applied to the gate region, a depletion region is formed in the semiconductor body which substantially prevents current flow between the first and second regions, and that, with a second voltage applied to the gate region and with appropriate voltages applied to the first and second regions, a relatively low resistance current path is established between the first and second regions by dual carrier injection, characterized in that the first and second regions and the gate region each have a surface contained on a first major surface of the semiconductor body.
One embodiment of the present invention is a structure comprising a semiconductor body whose bulk is of one conductivity type and which has a major surface within which semiconductor body is a localized first region which is of the one conductivity type, and localized second and third regions which are both of the opposite conductivity type. The first, second and third regions are spaced apart from each other, have separate electrode connections thereto, and are of relatively low resistivity compared to C
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114~2265 the bulk of the semiconductor body. The structure is so adapted that during operation there is dual carrier injection and is further charactecized in that each o~ the three regions has a portion which ~orms part of the major sur~ace of the semiconductor body.
In a preferred embodiment the semiconductor body is isolated from a semiconductor support by a dielectric layer and a plurality of said bodies are formed in said support and are separated from each other by at least a dielectric layer. The first, second and third regions serve as the anode, gate and cathode respectively, of the structure.
The structure of the present invention, when suitably designed, can be operated as a switch that is characterized by a low impedance path between anode and cathode when in the ON (conducting) state and a high impedance path between anode and cathode when in the OFF
(blocking) state. The potential applied to the gate region determines the state of the switch. During the O~
state there is dual carrier injection that results in the resistance between anode and cathode being relatively low.
This structure, which is to be denoted as a gated diode switch (GDS), when suitably designed, is ~ .
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capable in the OFF state of blocking relatively large potential differences between anode and cathode regions, independent of polarity, and is capable in the ON state of conducting relatively large amounts of current with a relatively low voltage drop between anode and cathode.
Arrays of these GDSs can be fabricated on a single integrated circuit chip together with other high voltage circuit csmponents. ~he bilateral blocking characteristic of the structure acilitates its use in a bidirectional switch formed by two of the structures of the present invention with the cathode of each coupled to the anode of the other and the gates being coupled together.
These and other novel features and advantages of the present invention are better understood from consideration of the following de*ailed description taken in conjunction with the accompanying drawings.
Brie Description of the Drawings FIG. 1 illustrates a structure in accordance with one embodiment of the invention;
FIG. 2 illustrates a proposed electrical circuit symbol for the structure of FIG. l;
FIG. 3 illustrates a bidirectional switch circuit in accordance with another embodiment o the invention;
FIG. 4 illustrates a structure in accordance with another embodiment of the invention;
FIG. 5 illustrates a structure in accordance with still another embodiment of the invention; and ~ IG. 6 illustrates a structure in accordance with still another embodiment of the invention.
Detailed Description Referring now to FIG. 1, there is illustrated a structure 10 comprising a support member 12 having a major surface 11 and a monocrystalline semiconductor body 16 whose bulk is of one conductivity type and .
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which is separated from support member 12 by a di-electric layer 14. The monocrystalline semiconductor body 16 has a portion that is common with surface 11.
A localized first anode region 18, which is S of the one type conductivity, is included in body 16 and has a portion thereof that extends to surface 11.
A localized second gate region 20, which is of the opposite conductivity, also is included in body 16 and has a portion thereof which extends to surface 11.
A localized third cathode region 24, which is of the opposite type conductivity, is included in body 16 and has a portion which extends to surface 11. A
region 22, which is of the one type conductivity and has a portion which extends to surface 11, encircles region 24 and acts as a depletion layer punch-through shield. rn addition it acts to inhibit inversion of the portions of body 16 at or near surface 11 between regions 20 and 24. Gate region 20 exists between anode region 18 and region 22 and is separated from both by bulk portions of body 16. The resistivities of regions 18, 20, and 24 are low compared to that of the bulk portions of body 16. The resistivity of region 22 is intermediate between that of cathode region 24 and that of the bulk portions of body 16.
Electrodes 28, 30, and 32 are conductors which make low resistance contact to the surface portions of regions 18, 20, and 24, respectively. A
dielectric layer 26 covers major surface 11 so as to isolate electrodes 28, 30, and 32 from all regions other than those intended to be electrically contacted.
An electrode 36 provides a low resistance contact to support 12 by way of a highly doped region 34 which is of the same conductivity type as support 12.
Advantageously, the support 12 and the body 16 are each of silicon and the support 12 may be either of _ or _ type conductivity. Each of electrodes 28, 30 and 32 advantageously overlaps the semiconductor region to which they make low resistance contact.
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Electrode 32 also overlaps region 22. This overlapping, ~hich is known as field plating, acilitates high voltage operation because it increases the voltage at which breakdown occurs.
In one illustrative embodiment, substrate 12 and body 16 and regions 18, 20, 22, 24 and 34 are of n-, p-, p~, n+, p, n~ and n~ type conductivity, respectively. Dielectric layer 14 is silicon dioxide and electrodes 28, 30, 32, and 36 are all aluminum.
A plurality of separate bodies 16 can be formed in a common support 12 to provide a plurality of switches.
Structure 10 is typically operated as a switch which is characterized by a low impedance path between anode region 18 and cathode region 24 when in the ON ~conducting) state and as a high impedance between said two regions when in the OFF Cblocking~
state. The potential applied to gate region 20 determines the state of the suitch. Conduction between anode region 18 and cathode region 24 occurs i the potential of gate region 20 is below that of the potential of anode region 18 and cathode region 24.
During the ON state holes are injected into body 16 from anode region 18 and electrons are injected into body 16 from cathode region 24. These holes and electrons can be in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when structure 10 is operating in the ON state. This type of operation is denoted as dual carrier injection. The type of structure described herein is denoted as a gated diode switch ~GDS).
Region 22 helps limit the punch-through of a depletion layer formed during operation between gate region 20 and cathode region 24 and helps inhibit . -: ~
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formation of a surface inversion layer between those t~o regions. In addition, it facilitates gate region 20 and cathode region 24 being relatively closely spaced apart. This facilitates in relatively low resistance between anode region 18 and cathode region 22 during the ON state.
Substrate 12 is typically held at the most positive potential level available. Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate region 20 is sufficiently more positive than that of anode region 18 and cathode region 24. The amount of excess positive potential needed to inhibit or cut off conduction is a unction Or the geometry and impurity concentration ~doping) le~els of structure 10. This positive gate potential causes the portion of body 16 between gate region 20 and the portion of dielectric layer 14 therebelow to be depleted such that the potential of this portion of body 16 is more`positive than that of anode region 18 and cathode region 24.
This positive potential barrier inhibits the conduction of holes from an~de region 18 to cathode region 24. It essentially pinches off body 16 against dielectric layer 14 in the bulk portion thereof below gate region 20 and extending down to dielectric layer 14. It also serves to collect electrons emitted at cathode region 24 before they can reach anode region 18. Control circuitry capable of supplying thc needed gate potentials and absorbing the electrons is illustrated and described in copending Canadian Patent P~?plication Serial No. 342,165 which was filed in the names of A. R. ~lart~an, et al on ~ecemker 18, 1979.
During the ON state of structure 10, the junction diode comprising body 16 and region 20 becomes forward-biased. Current limiting means (not illustrated) .
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are normally included to limit the conduction through the forward-biased diode. One example of such c.urrent limiting means is illustrated and described in the above identified Canadian Patent ~p~llcation Serial No. 342,165.
A proposed electrical symbol adopted for this type o switch is illustrated in FIG. 2. The anode, gate, and cathode electrodes of the GDS are denoted as terminals, 28, 30, and 32, respectively.
One embodiment of structure 10 has been fabricated with the following design. Support member 12 is an n type silicon substrate, 18 to 22 mils thick, with an i~purity concentration of approx-imately 2 x 10l3 impurities/cm3, and has a resistivity greater than 100 ohm-centimeters. Dielectric layer 14 is a silicon dioxide layer 14 that is 2 to 4 microns thick. Body 16 is typically 30 to 50 microns thick, approximately 430 microns long, 300 microns wide, and is of p type conductivity with an impurity concentration in the range of approximately 5-9 x 1013 impurities/cm3. Anode region 18 is of p~ type conductivity, is typically 2 to 4 microns thick, 44 microns wide, 52 microns long, and has an impurity concentration of approximately 1019 impurities/cm3.
Electrode 28 is typically aluminum, with a thickness ~ 25 of 1 1/2 microns, a width of 84 microns, and a - length of 105 microns. Region 20 is of n+ type conductivity and is typically 2 to 4 microns thick, 15 microns wide, 300 microns long, and has an impurity concentration of approximately 1019 impuritiestcm3.
Electrode 30 is aluminum, 1 1/2 microns thick, 50 microns wide, and 210 microns long. The spa~ing between adjacent edges of electrodes 28 and 30 and between adjacent edges of electrodes 30 and 32 is typically 40 microns in both cases. Region 22 is ~
type conductivity and is typically 3-6 microns thick, 64 microns wide, 60 microns long, and has an impurity ';
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concentration o approximately 1017 to 1018 impurities/cm3.
Cathode region 24 is n~ type conductivity and is typically 2 microns thick, 48 microns wide, 44 microns long, and has an impurity concentration of approximately 1019 impurities/cm3. Electrode 32 is aluminum, 1 1/2 microns thick, 104 microns wide, and 104 microns long.
The spacing between the ends of regions 18 and 22 and the respective ends of region 16 is typically 55 microns. Region 34 is n~ type conductivity and is typically 2 microns thick, 26 microns wide, 25 microns long, and has an impurity concentration of 1019 impurities/cm3. Electrode 36 is aluminum which is 1 1/2 microns thick, 26 microns wide, and 26 microns long.
Structure 10, using the parameters denoted above, has been operated as a gated diode switch ~GDS~
with 500 volts between anode and cathode. A layer of silicon nitride tnot illustrated) was deposited by chemical vapor deposition on top of silicon dioxide layer 26 to provide a sodium barrier. Electrodes 28, 30, 32, and 36 were then formed and thereafter a coating of radio frequency plasma deposited silicon nitride ~not illustrated) was applied to the entire surface of structure 10 except where electrical contact is made. The layers of silicon nitride serve to help prevent high voltage breakdown in the air between adjacent electrodes.
Typically the anode had f250 volts applied thereto, the cathode had -250 volts applied thereto, and substrate 12 had ~280 volts applied thereto.
These applied potentials result in the anode and cathode being essentially electrically isolated rom each other and little or no current flow between anode and cathode. The -250 volts can also be applied to the anode and the ~250 volts applied to the cathode without damage to structure 10. The anode and cathode remain essentially electrically isolated from each other and there is little or no current 1OW between ..~.
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~artman-6 il422~;5 anode and cathode. Thus, structure 10 bilaterally blocks voltage be~ween anode and cathode. A
potential of ~280 ~olts applied to gate conductor 30 interrupted ~broke) 350 mA of current flow between 5 anode region 18 and cathode region 24. The ON
resistance of the GDS with 100 mA flowing between anode and cathode is approximately 15 ohms and the voltage drop between anode and cathode is typically 2.2 volts.
Referring now to FIG. 3, there is illustrated a bidirectional switch combination comprising two GDSs (GDSl and GD~2) in accordance with the prese-nt invention with electrode 28 ~the anode electrode of GDSl) electrically coupled to electrode 32a ~the cathode electrode of GDS2~, and electrode 32 ~the cathode electrode of GDSl) electrically coupled to electrode 28a ~the anode electrode of GDS2). This s~itch combination is capable o~ conducting signals from electrodes 28 and 32a to electrodes 28a and 32 or ~ice versa. The bilateral blocking characteristic of structure 10 facilitates this bilateral switch combination. Two separate bodies 16 can be formed in a common support 12 and the appropriate electrical connections can be made to form the above-described bidirectional switch. A plurality of separate bodies 16 can be formed in a common support 12 to form an array of switches.
Referring now to FIG. 4, there is illustrated a structure 100. Structure 100 is very similar to structure 10 and all components thereof which are essentially identical or very similar to those of structure 10 are denoted by the sa~e reerence number with the addition of one "0" at the end. The basic difference between struct~res 100 and 10 is the elimination from structure 100 of semiconductor region like region 22 of FIG. l. Appropriately increasing the spacing of region 240 from region 200 provides sufficient protection against depletion layer punch-. .;
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through to reglon 240 and facilitates the use of structure lnO as a high voltage swi*ch.
Referring now to FIG. 5, there is illustrated a structure 1000. Structure 1000 is very similar to structure 10 and all components thereof which are essentially identical or similar to those of structure 10 are denoted by the same reference number with the addition of two "Os" at the end. The basic difference between structures 1000 and 10 is the use of a semi-conductor guard ring region 40 encircling region2400 and being separated therefrom by portions o region 1600. In addition, there is no equivalent of a semiconductor region like region 22 of FIG. 1.
Guard ring 40 provides protection against inversion of body 1600, particularly between gate region 2000 and cathode region 2400. Guard ring 40 is of the same conductivity as body 1600 but o lowe2 resistivity.
The protection afforded is adequate in particular instances. As is illustrated by the dashed lines, region 40 can be extended so as to contact region 2400. Typically the impurity concentration of region 40 is 1019/cm3.
Referring now to FIG. 6, there is illustrated a structure lO,000. Structure 10,000 is very similar to structure 10 and all components which are essentially the same or very similar are denoted by the same reference number with the addition of three "Os"
at the end. The main difference between structure 10,000 and structure 10 is the use of a semiconductor ` 30 guard ring region 400 which encircles cathode region 2400. Guard ring 400 is similar to guard ring region 40 of structure 1000 of FIG. 5. The dashed line portion of guard ring 400 illustrates that it can be extended so as to contact cathode region 24,000. The combi-nation of region 22,000 and guard ring 400 provides protection against inversion of portions of region 18,000 at or near surface 11,000, particularly between , .~ .. . . ~ .
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gate region 20,000 and cathode region 24,000, and provides protection against depletion layer punch-through to cathode region 2400. Guard ring 400 is of the same conductivity as region 22,000, but is o lower resistivity. This type of dual protection structure encircling cathode region 24,000 is the preferred protection structure.
The embodiments described herein are intended to be illustrative o the general principles of the invention. Various modifications are possible consistent with the spirit of the invention. For example, for the designs described, support members 12, 120, 1200, and 12,000 can alternatively be p-type conductivity silicon, gallium arsenide, sapphire, a conductor, or an electrically inactive material. If regions 12, 120, 1200 and 12,000 are electrically inactive materials then dielectric layers 14, 140, 140Q, 14,000 can be eliminated. Still further, bodies 16, 160, 1600, 16,000 can be fabricated as air isolated type structures. This allows for the elimination of support members 12, 120, 1200, and 12,000 and dielectric layers 14, 140, 1400, and 14,000. Further, the electrodes can be doped poly-silicon, gold, titanium, or other types of conductors.
Still further, the impurity concentration levels, spacings between different regions, and other dimensions of the regions can be adjusted to allow significantly different operating voltages and currents than are described. Additionally, other types of dielectric ~aterials, such as silicon nitride, can be substituted for silicon dioxide. Still further, the conductivity type of all regions within the dielectric layer can be reversed provided the voltage polarities are appropriately changed in the manner well known in the art. It is to be appreciated that the structure of the prese~t invention allows alternating or direct current operation.
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HIGH VOLTAGE DIELECTRICALLY
ISOLATED SOLID-STATE SWITCH
l'echnical Field This învention relates to solid-state structures and, in particular, to high voltage solid-state structures useful in telephone switching systems and many other applications.
Background of the Inv'ention -In an article entitled "A Field Terminated Diode" by Douglas F. Houston et al, published in IEEE Trans'act'ions-on'E'l'e'ctron'Devic'es, Vol. ED-23, No. 8, August 1976, there is described a discrete s~lid-state high voltage switch that has a vertical geometry and which includes a region which can be pinched off to provide an "OF~" state or which can be made highly conductive with dual carrier in~ection to provide an "ON" state. One p~oblem with this switch is that it is not easily manufacturable with other like switching devices on a common substrate.
Another problem is that the spacing between the grids and the cathode should be small to limit the magnitude of the control grid voltage; however, this limits the useful voltage range because it decreases grid-to-cathode breakdown voltage. This limitation effectivelylimits the use of two of the devices with the cathode of each coupled to the anode of the other to relatively low voltageS- Such a dual device structure would be useful as a high voltage bidirectional solid-state switch. An additional problem is that the base region should ideally be highly doped to avoid punch-through from the anode to the grid; however, this leads to a low voltage breakdown between anode and cathode. Widening of the base region limits the punch-through effect; however, it also increases the resistance of the device in the "ON" state.
It is desirable to have a solid-state switch which is easily integratable such that two or more " ~
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switches can be simultaneously fabricated on a common substrate and wherein each switch is capable of bilateral blocking of relatively high voltages.
Summary of the Invention In accordance with an aspect of the invention there is provided a solid-state switching device comprising a semiconductor body a bulk portion of which is of a first conductivity type, a first region of the first conductivity type, a second region of a second conductivity type opposite that of the first conductivity type, a gate region of the second conductivity type, the first, second, and gate regions being mutually separated by portions of the bulk portion, the resistivities of the first, second and gate regions being lower than the resistivity of the hulk portion, the parameters of the device being such that, with a first voltage applied to the gate region, a depletion region is formed in the semiconductor body which substantially prevents current flow between the first and second regions, and that, with a second voltage applied to the gate region and with appropriate voltages applied to the first and second regions, a relatively low resistance current path is established between the first and second regions by dual carrier injection, characterized in that the first and second regions and the gate region each have a surface contained on a first major surface of the semiconductor body.
One embodiment of the present invention is a structure comprising a semiconductor body whose bulk is of one conductivity type and which has a major surface within which semiconductor body is a localized first region which is of the one conductivity type, and localized second and third regions which are both of the opposite conductivity type. The first, second and third regions are spaced apart from each other, have separate electrode connections thereto, and are of relatively low resistivity compared to C
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114~2265 the bulk of the semiconductor body. The structure is so adapted that during operation there is dual carrier injection and is further charactecized in that each o~ the three regions has a portion which ~orms part of the major sur~ace of the semiconductor body.
In a preferred embodiment the semiconductor body is isolated from a semiconductor support by a dielectric layer and a plurality of said bodies are formed in said support and are separated from each other by at least a dielectric layer. The first, second and third regions serve as the anode, gate and cathode respectively, of the structure.
The structure of the present invention, when suitably designed, can be operated as a switch that is characterized by a low impedance path between anode and cathode when in the ON (conducting) state and a high impedance path between anode and cathode when in the OFF
(blocking) state. The potential applied to the gate region determines the state of the switch. During the O~
state there is dual carrier injection that results in the resistance between anode and cathode being relatively low.
This structure, which is to be denoted as a gated diode switch (GDS), when suitably designed, is ~ .
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capable in the OFF state of blocking relatively large potential differences between anode and cathode regions, independent of polarity, and is capable in the ON state of conducting relatively large amounts of current with a relatively low voltage drop between anode and cathode.
Arrays of these GDSs can be fabricated on a single integrated circuit chip together with other high voltage circuit csmponents. ~he bilateral blocking characteristic of the structure acilitates its use in a bidirectional switch formed by two of the structures of the present invention with the cathode of each coupled to the anode of the other and the gates being coupled together.
These and other novel features and advantages of the present invention are better understood from consideration of the following de*ailed description taken in conjunction with the accompanying drawings.
Brie Description of the Drawings FIG. 1 illustrates a structure in accordance with one embodiment of the invention;
FIG. 2 illustrates a proposed electrical circuit symbol for the structure of FIG. l;
FIG. 3 illustrates a bidirectional switch circuit in accordance with another embodiment o the invention;
FIG. 4 illustrates a structure in accordance with another embodiment of the invention;
FIG. 5 illustrates a structure in accordance with still another embodiment of the invention; and ~ IG. 6 illustrates a structure in accordance with still another embodiment of the invention.
Detailed Description Referring now to FIG. 1, there is illustrated a structure 10 comprising a support member 12 having a major surface 11 and a monocrystalline semiconductor body 16 whose bulk is of one conductivity type and .
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which is separated from support member 12 by a di-electric layer 14. The monocrystalline semiconductor body 16 has a portion that is common with surface 11.
A localized first anode region 18, which is S of the one type conductivity, is included in body 16 and has a portion thereof that extends to surface 11.
A localized second gate region 20, which is of the opposite conductivity, also is included in body 16 and has a portion thereof which extends to surface 11.
A localized third cathode region 24, which is of the opposite type conductivity, is included in body 16 and has a portion which extends to surface 11. A
region 22, which is of the one type conductivity and has a portion which extends to surface 11, encircles region 24 and acts as a depletion layer punch-through shield. rn addition it acts to inhibit inversion of the portions of body 16 at or near surface 11 between regions 20 and 24. Gate region 20 exists between anode region 18 and region 22 and is separated from both by bulk portions of body 16. The resistivities of regions 18, 20, and 24 are low compared to that of the bulk portions of body 16. The resistivity of region 22 is intermediate between that of cathode region 24 and that of the bulk portions of body 16.
Electrodes 28, 30, and 32 are conductors which make low resistance contact to the surface portions of regions 18, 20, and 24, respectively. A
dielectric layer 26 covers major surface 11 so as to isolate electrodes 28, 30, and 32 from all regions other than those intended to be electrically contacted.
An electrode 36 provides a low resistance contact to support 12 by way of a highly doped region 34 which is of the same conductivity type as support 12.
Advantageously, the support 12 and the body 16 are each of silicon and the support 12 may be either of _ or _ type conductivity. Each of electrodes 28, 30 and 32 advantageously overlaps the semiconductor region to which they make low resistance contact.
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Electrode 32 also overlaps region 22. This overlapping, ~hich is known as field plating, acilitates high voltage operation because it increases the voltage at which breakdown occurs.
In one illustrative embodiment, substrate 12 and body 16 and regions 18, 20, 22, 24 and 34 are of n-, p-, p~, n+, p, n~ and n~ type conductivity, respectively. Dielectric layer 14 is silicon dioxide and electrodes 28, 30, 32, and 36 are all aluminum.
A plurality of separate bodies 16 can be formed in a common support 12 to provide a plurality of switches.
Structure 10 is typically operated as a switch which is characterized by a low impedance path between anode region 18 and cathode region 24 when in the ON ~conducting) state and as a high impedance between said two regions when in the OFF Cblocking~
state. The potential applied to gate region 20 determines the state of the suitch. Conduction between anode region 18 and cathode region 24 occurs i the potential of gate region 20 is below that of the potential of anode region 18 and cathode region 24.
During the ON state holes are injected into body 16 from anode region 18 and electrons are injected into body 16 from cathode region 24. These holes and electrons can be in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when structure 10 is operating in the ON state. This type of operation is denoted as dual carrier injection. The type of structure described herein is denoted as a gated diode switch ~GDS).
Region 22 helps limit the punch-through of a depletion layer formed during operation between gate region 20 and cathode region 24 and helps inhibit . -: ~
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formation of a surface inversion layer between those t~o regions. In addition, it facilitates gate region 20 and cathode region 24 being relatively closely spaced apart. This facilitates in relatively low resistance between anode region 18 and cathode region 22 during the ON state.
Substrate 12 is typically held at the most positive potential level available. Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate region 20 is sufficiently more positive than that of anode region 18 and cathode region 24. The amount of excess positive potential needed to inhibit or cut off conduction is a unction Or the geometry and impurity concentration ~doping) le~els of structure 10. This positive gate potential causes the portion of body 16 between gate region 20 and the portion of dielectric layer 14 therebelow to be depleted such that the potential of this portion of body 16 is more`positive than that of anode region 18 and cathode region 24.
This positive potential barrier inhibits the conduction of holes from an~de region 18 to cathode region 24. It essentially pinches off body 16 against dielectric layer 14 in the bulk portion thereof below gate region 20 and extending down to dielectric layer 14. It also serves to collect electrons emitted at cathode region 24 before they can reach anode region 18. Control circuitry capable of supplying thc needed gate potentials and absorbing the electrons is illustrated and described in copending Canadian Patent P~?plication Serial No. 342,165 which was filed in the names of A. R. ~lart~an, et al on ~ecemker 18, 1979.
During the ON state of structure 10, the junction diode comprising body 16 and region 20 becomes forward-biased. Current limiting means (not illustrated) .
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are normally included to limit the conduction through the forward-biased diode. One example of such c.urrent limiting means is illustrated and described in the above identified Canadian Patent ~p~llcation Serial No. 342,165.
A proposed electrical symbol adopted for this type o switch is illustrated in FIG. 2. The anode, gate, and cathode electrodes of the GDS are denoted as terminals, 28, 30, and 32, respectively.
One embodiment of structure 10 has been fabricated with the following design. Support member 12 is an n type silicon substrate, 18 to 22 mils thick, with an i~purity concentration of approx-imately 2 x 10l3 impurities/cm3, and has a resistivity greater than 100 ohm-centimeters. Dielectric layer 14 is a silicon dioxide layer 14 that is 2 to 4 microns thick. Body 16 is typically 30 to 50 microns thick, approximately 430 microns long, 300 microns wide, and is of p type conductivity with an impurity concentration in the range of approximately 5-9 x 1013 impurities/cm3. Anode region 18 is of p~ type conductivity, is typically 2 to 4 microns thick, 44 microns wide, 52 microns long, and has an impurity concentration of approximately 1019 impurities/cm3.
Electrode 28 is typically aluminum, with a thickness ~ 25 of 1 1/2 microns, a width of 84 microns, and a - length of 105 microns. Region 20 is of n+ type conductivity and is typically 2 to 4 microns thick, 15 microns wide, 300 microns long, and has an impurity concentration of approximately 1019 impuritiestcm3.
Electrode 30 is aluminum, 1 1/2 microns thick, 50 microns wide, and 210 microns long. The spa~ing between adjacent edges of electrodes 28 and 30 and between adjacent edges of electrodes 30 and 32 is typically 40 microns in both cases. Region 22 is ~
type conductivity and is typically 3-6 microns thick, 64 microns wide, 60 microns long, and has an impurity ';
~3 .
''` ' , ' , '" ~ ' ~ .' ' :
: ~ - - . , . ~ :
..
: : . :' ' . : ' .
,: ~
Hartman-6 ~ 42~
concentration o approximately 1017 to 1018 impurities/cm3.
Cathode region 24 is n~ type conductivity and is typically 2 microns thick, 48 microns wide, 44 microns long, and has an impurity concentration of approximately 1019 impurities/cm3. Electrode 32 is aluminum, 1 1/2 microns thick, 104 microns wide, and 104 microns long.
The spacing between the ends of regions 18 and 22 and the respective ends of region 16 is typically 55 microns. Region 34 is n~ type conductivity and is typically 2 microns thick, 26 microns wide, 25 microns long, and has an impurity concentration of 1019 impurities/cm3. Electrode 36 is aluminum which is 1 1/2 microns thick, 26 microns wide, and 26 microns long.
Structure 10, using the parameters denoted above, has been operated as a gated diode switch ~GDS~
with 500 volts between anode and cathode. A layer of silicon nitride tnot illustrated) was deposited by chemical vapor deposition on top of silicon dioxide layer 26 to provide a sodium barrier. Electrodes 28, 30, 32, and 36 were then formed and thereafter a coating of radio frequency plasma deposited silicon nitride ~not illustrated) was applied to the entire surface of structure 10 except where electrical contact is made. The layers of silicon nitride serve to help prevent high voltage breakdown in the air between adjacent electrodes.
Typically the anode had f250 volts applied thereto, the cathode had -250 volts applied thereto, and substrate 12 had ~280 volts applied thereto.
These applied potentials result in the anode and cathode being essentially electrically isolated rom each other and little or no current flow between anode and cathode. The -250 volts can also be applied to the anode and the ~250 volts applied to the cathode without damage to structure 10. The anode and cathode remain essentially electrically isolated from each other and there is little or no current 1OW between ..~.
, - - . ~ ~ . .
~artman-6 il422~;5 anode and cathode. Thus, structure 10 bilaterally blocks voltage be~ween anode and cathode. A
potential of ~280 ~olts applied to gate conductor 30 interrupted ~broke) 350 mA of current flow between 5 anode region 18 and cathode region 24. The ON
resistance of the GDS with 100 mA flowing between anode and cathode is approximately 15 ohms and the voltage drop between anode and cathode is typically 2.2 volts.
Referring now to FIG. 3, there is illustrated a bidirectional switch combination comprising two GDSs (GDSl and GD~2) in accordance with the prese-nt invention with electrode 28 ~the anode electrode of GDSl) electrically coupled to electrode 32a ~the cathode electrode of GDS2~, and electrode 32 ~the cathode electrode of GDSl) electrically coupled to electrode 28a ~the anode electrode of GDS2). This s~itch combination is capable o~ conducting signals from electrodes 28 and 32a to electrodes 28a and 32 or ~ice versa. The bilateral blocking characteristic of structure 10 facilitates this bilateral switch combination. Two separate bodies 16 can be formed in a common support 12 and the appropriate electrical connections can be made to form the above-described bidirectional switch. A plurality of separate bodies 16 can be formed in a common support 12 to form an array of switches.
Referring now to FIG. 4, there is illustrated a structure 100. Structure 100 is very similar to structure 10 and all components thereof which are essentially identical or very similar to those of structure 10 are denoted by the sa~e reerence number with the addition of one "0" at the end. The basic difference between struct~res 100 and 10 is the elimination from structure 100 of semiconductor region like region 22 of FIG. l. Appropriately increasing the spacing of region 240 from region 200 provides sufficient protection against depletion layer punch-. .;
; . .
' ~ ' :- ~ ': . ,' :
Hartman-6 10 .
through to reglon 240 and facilitates the use of structure lnO as a high voltage swi*ch.
Referring now to FIG. 5, there is illustrated a structure 1000. Structure 1000 is very similar to structure 10 and all components thereof which are essentially identical or similar to those of structure 10 are denoted by the same reference number with the addition of two "Os" at the end. The basic difference between structures 1000 and 10 is the use of a semi-conductor guard ring region 40 encircling region2400 and being separated therefrom by portions o region 1600. In addition, there is no equivalent of a semiconductor region like region 22 of FIG. 1.
Guard ring 40 provides protection against inversion of body 1600, particularly between gate region 2000 and cathode region 2400. Guard ring 40 is of the same conductivity as body 1600 but o lowe2 resistivity.
The protection afforded is adequate in particular instances. As is illustrated by the dashed lines, region 40 can be extended so as to contact region 2400. Typically the impurity concentration of region 40 is 1019/cm3.
Referring now to FIG. 6, there is illustrated a structure lO,000. Structure 10,000 is very similar to structure 10 and all components which are essentially the same or very similar are denoted by the same reference number with the addition of three "Os"
at the end. The main difference between structure 10,000 and structure 10 is the use of a semiconductor ` 30 guard ring region 400 which encircles cathode region 2400. Guard ring 400 is similar to guard ring region 40 of structure 1000 of FIG. 5. The dashed line portion of guard ring 400 illustrates that it can be extended so as to contact cathode region 24,000. The combi-nation of region 22,000 and guard ring 400 provides protection against inversion of portions of region 18,000 at or near surface 11,000, particularly between , .~ .. . . ~ .
.
:, . `
Hartman-6 :~i4226S
11 .
gate region 20,000 and cathode region 24,000, and provides protection against depletion layer punch-through to cathode region 2400. Guard ring 400 is of the same conductivity as region 22,000, but is o lower resistivity. This type of dual protection structure encircling cathode region 24,000 is the preferred protection structure.
The embodiments described herein are intended to be illustrative o the general principles of the invention. Various modifications are possible consistent with the spirit of the invention. For example, for the designs described, support members 12, 120, 1200, and 12,000 can alternatively be p-type conductivity silicon, gallium arsenide, sapphire, a conductor, or an electrically inactive material. If regions 12, 120, 1200 and 12,000 are electrically inactive materials then dielectric layers 14, 140, 140Q, 14,000 can be eliminated. Still further, bodies 16, 160, 1600, 16,000 can be fabricated as air isolated type structures. This allows for the elimination of support members 12, 120, 1200, and 12,000 and dielectric layers 14, 140, 1400, and 14,000. Further, the electrodes can be doped poly-silicon, gold, titanium, or other types of conductors.
Still further, the impurity concentration levels, spacings between different regions, and other dimensions of the regions can be adjusted to allow significantly different operating voltages and currents than are described. Additionally, other types of dielectric ~aterials, such as silicon nitride, can be substituted for silicon dioxide. Still further, the conductivity type of all regions within the dielectric layer can be reversed provided the voltage polarities are appropriately changed in the manner well known in the art. It is to be appreciated that the structure of the prese~t invention allows alternating or direct current operation.
" ' '": ' ' '. , : ' ~ :
Claims (17)
1. A solid-state switching device comprising a semiconductor body a bulk portion of which is of a first conductivity type, a first region of the first conductivity type, a second region of a second conductivity type opposite that of the first conductivity type, a gate region of the second conductivity type, the first, second, and gate regions being mutually separated by portions of the bulk portion, the resistivities of the first, second and gate regions being lower than the resistivity of the bulk portion, the parameters of the device being such that, with a first voltage applied to the gate region, a depletion region is formed in the semiconductor body which substantially prevents current flow between the first and second regions, and that, with a second voltage applied to the gate region and with appropriate voltages applied to the first and second regions, a relatively low resistance current path is established between the first and second regions by dual carrier injection, CHARACTERIZED IN THAT
the first and second regions and the gate region each have a surface contained on a first major surface of the semiconductor body.
the first and second regions and the gate region each have a surface contained on a first major surface of the semiconductor body.
2. The structure of claim 1 further characterized in that the semiconductor body includes a fourth region of the one conductivity type and of resistivity intermediate between that of the bulk of the semiconductor body and the first region, the fourth region encircling the third region.
3. The structure of claim 1 further characterized by a plurality of the semiconductor bodies separated from one another and included within a common support member and being separated therefrom by a dielectric layer.
4. The structure of claim 1 characterized in that the semiconductor body, the first region, the second region, and the third region are of p-, p+, n+, and n+ type conductivity, respectively.
5. The structure of claim 3 characterized in that the support member is n- type conductivity silicon.
6. The structure of claim 3 characterized in that the support member is p- type conductivity silicon.
7. The structure of claim 4 further characterized in that the semiconductor body includes a fourth region of the one conductivity type, the fourth region encircling the third region.
8. The structure of claim 7 further characterized in that the fourth region comprises a guard ring portion and another portion which encircles the guard ring portion and the third region.
9. The structure of claim 8 characterized in that the support member is silicon and is adapted to facilitate electrical contact thereto.
10. A switching element comprising a semiconductor body whose bulk is of one conductivity type Hartman-6 14.
and relatively high resistivity and which includes anode, gate, and cathode regions spaced apart and localized along a common planar surface of the body, each being of relatively low resistivity, the cathode and gate regions being of the opposite conductivity type as the bulk and the anode region being of the same conductivity type as the bulk, and separate cathode, anode, and gate electrodes, the parameters of the various portions of the body being such that with the potential of the anode region being greater than that of the cathode region and the potential of the gate region being insufficient to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated a sub-stantial current flow between the anode and cathode regions via the bulk, and with the potential of the gate region being sufficiently more positive than that of the anode region to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated an interrupting or inhibiting of current flow between the anode and cathode regions.
and relatively high resistivity and which includes anode, gate, and cathode regions spaced apart and localized along a common planar surface of the body, each being of relatively low resistivity, the cathode and gate regions being of the opposite conductivity type as the bulk and the anode region being of the same conductivity type as the bulk, and separate cathode, anode, and gate electrodes, the parameters of the various portions of the body being such that with the potential of the anode region being greater than that of the cathode region and the potential of the gate region being insufficient to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated a sub-stantial current flow between the anode and cathode regions via the bulk, and with the potential of the gate region being sufficiently more positive than that of the anode region to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated an interrupting or inhibiting of current flow between the anode and cathode regions.
11. A switching element in accordance with claim 10 in which the gate region is localized on the common surface intermediate between the cathode and anode regions.
12. A switching element in accordance with claim 10 in which the cathode region is surrounded by a region of the same conductivity type as the bulk but of lower resistivity.
13. A plurality of switching elements in accordance with claim 10 each included in a semi-conductor support and dielectrically isolated from one another.
14. A pair of switching elements each in accordance with claim 10 with the gate electrodes of the pair connected to one another and the anode Hartman-6 15.
electrode of each connected to the cathode electrode of the other to provide a bilateral switch.
electrode of each connected to the cathode electrode of the other to provide a bilateral switch.
15. A structure comprising a semiconductor body whose bulk is of one conductivity type and which has a major surface, a localized first region which is of the one conductivity type, and a localized second region and a localized third region which are both of the opposite conductivity type, each of the localized first, second, and third regions being of relatively low resistivity as compared to the bulk portion of the semiconductor body and being spaced apart from each other, and separate electrodes being connected to each of the first, second, and third regions, the semiconductor body being separated from a semiconductor support member by a dielectric layer, the semiconductor support member haying a separate electrode coupled thereto, and the localized first, second, and third regions each have a portion thereof which forms a part of the major surface of the semiconductor body.
16. A switching element comprising a semiconductor body those bulk is of one conductivity type and relatively high resistivity and which in-cludes anode, gate, and cathode regions spaced apart and localized along a common planar surface of the body, each being of relatively low resistivity, the cathode and gate regions being of the opposite conductivity type as the bulk and the anode region being of the same conductivity type as the bulk, and separate cathode, anode, and gate electrodes, the semiconductor body being separated from a semi-conductor support member by a dielectric layer, the semiconductor support member having a separate electrode coupled thereto which is adapted to be held at the most positive potential used with a structure, the parameters of the various portions of the body being such that with the potential of the anode region being greater than that of the cathode region and the potential of the gate region being insufficient to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated a substantial current flow between the anode and cathode regions via the bulk, and with the potential of the gate region being sufficiently more positive than that of the anode region to deplete the portion of the bulk of the semiconductor body between the anode and cathode regions there is facilitated an interrupting or inhibiting of current flow between the anode and cathode regions.
17. A structure comprising:
a semiconductor body whose bulk is of one conductivity type and which has a major surface;
a localized first region which is of the one conductivity type;
a localized second region which is of the opposite conductivity type;
the localized first and second regions are of relatively low resistivity as compared to the bulk of the semiconductor body and are separated by portions of the bulk of the semiconductor body;
each of the first and second regions having a portion that forms part of the major surface and having a separate electrode coupled thereto;
a third region which is conductive and contacts the semiconductor body, said third region having a separate electrode coupled thereto and being separated from the first and second regions by portions of the bulk of the semiconductor body;
the structure being adapted to selectively facilitate current flow between the first and second regions or to divert a sufficient portion of said current into the third region so as to substantially interrupt (cut off) said current flow between the first and second regions;
the structure being also adapted to selectively substantially inhibit current from flowing between the first and second regions; and the third region is separated from the first and second regions by portions of the bulk of the semiconductor body.
a semiconductor body whose bulk is of one conductivity type and which has a major surface;
a localized first region which is of the one conductivity type;
a localized second region which is of the opposite conductivity type;
the localized first and second regions are of relatively low resistivity as compared to the bulk of the semiconductor body and are separated by portions of the bulk of the semiconductor body;
each of the first and second regions having a portion that forms part of the major surface and having a separate electrode coupled thereto;
a third region which is conductive and contacts the semiconductor body, said third region having a separate electrode coupled thereto and being separated from the first and second regions by portions of the bulk of the semiconductor body;
the structure being adapted to selectively facilitate current flow between the first and second regions or to divert a sufficient portion of said current into the third region so as to substantially interrupt (cut off) said current flow between the first and second regions;
the structure being also adapted to selectively substantially inhibit current from flowing between the first and second regions; and the third region is separated from the first and second regions by portions of the bulk of the semiconductor body.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US97205678A | 1978-12-20 | 1978-12-20 | |
US972,056 | 1978-12-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1142265A true CA1142265A (en) | 1983-03-01 |
Family
ID=25519106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000342165A Expired CA1142265A (en) | 1978-12-20 | 1979-12-18 | High voltage dielectrically isolated solid-state switch |
Country Status (1)
Country | Link |
---|---|
CA (1) | CA1142265A (en) |
-
1979
- 1979-12-18 CA CA000342165A patent/CA1142265A/en not_active Expired
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