ID28538A - Tata letak (arsitektur) memori untuk memetakan dekoder - Google Patents
Tata letak (arsitektur) memori untuk memetakan dekoderInfo
- Publication number
- ID28538A ID28538A IDW20010597A ID20010597A ID28538A ID 28538 A ID28538 A ID 28538A ID W20010597 A IDW20010597 A ID W20010597A ID 20010597 A ID20010597 A ID 20010597A ID 28538 A ID28538 A ID 28538A
- Authority
- ID
- Indonesia
- Prior art keywords
- state metric
- symbol estimates
- decoders
- mapping
- architecture
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3972—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6566—Implementations concerning memory access contentions
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Detection And Correction Of Errors (AREA)
- Navigation (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9648998P | 1998-08-14 | 1998-08-14 | |
US09/259,665 US6381728B1 (en) | 1998-08-14 | 1999-02-26 | Partitioned interleaver memory for map decoder |
US09/283,013 US6434203B1 (en) | 1999-02-26 | 1999-03-31 | Memory architecture for map decoder |
Publications (1)
Publication Number | Publication Date |
---|---|
ID28538A true ID28538A (id) | 2001-05-31 |
Family
ID=27378195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IDW20010597A ID28538A (id) | 1998-08-14 | 1999-08-13 | Tata letak (arsitektur) memori untuk memetakan dekoder |
Country Status (12)
Country | Link |
---|---|
EP (1) | EP1118158B1 (de) |
JP (2) | JP4405676B2 (de) |
CN (1) | CN1211931C (de) |
AT (1) | ATE476016T1 (de) |
AU (1) | AU766116B2 (de) |
BR (1) | BR9912990B1 (de) |
CA (1) | CA2340366C (de) |
DE (1) | DE69942634D1 (de) |
ES (1) | ES2347309T3 (de) |
HK (1) | HK1040842B (de) |
ID (1) | ID28538A (de) |
WO (1) | WO2000010254A1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3450788B2 (ja) * | 2000-03-06 | 2003-09-29 | 松下電器産業株式会社 | 復号化装置および復号化処理方法 |
DE10012873A1 (de) | 2000-03-16 | 2001-09-27 | Infineon Technologies Ag | Optimierter Turbo-Decodierer |
FI109162B (fi) | 2000-06-30 | 2002-05-31 | Nokia Corp | Menetelmä ja järjestely konvoluutiokoodatun koodisanan dekoodaamiseksi |
US6662331B1 (en) * | 2000-10-27 | 2003-12-09 | Qualcomm Inc. | Space-efficient turbo decoder |
KR20040069344A (ko) | 2001-12-28 | 2004-08-05 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 데이터 디코딩 방법, 수신기 및 컴퓨터 프로그램 제품 |
JP4554366B2 (ja) * | 2002-09-18 | 2010-09-29 | エヌエックスピー ビー ヴィ | データウィンドウを使用してデータを復号化するための方法 |
US7702968B2 (en) * | 2004-02-27 | 2010-04-20 | Qualcomm Incorporated | Efficient multi-symbol deinterleaver |
CN102571107B (zh) * | 2010-12-15 | 2014-09-17 | 展讯通信(上海)有限公司 | LTE系统中高速并行Turbo码的解码系统及方法 |
US9128888B2 (en) * | 2012-08-30 | 2015-09-08 | Intel Deutschland Gmbh | Method and apparatus for turbo decoder memory collision resolution |
US10014026B1 (en) * | 2017-06-20 | 2018-07-03 | Seagate Technology Llc | Head delay calibration and tracking in MSMR systems |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5862190A (en) * | 1995-12-29 | 1999-01-19 | Motorola, Inc. | Method and apparatus for decoding an encoded signal |
-
1999
- 1999-08-13 BR BRPI9912990-6A patent/BR9912990B1/pt not_active IP Right Cessation
- 1999-08-13 ID IDW20010597A patent/ID28538A/id unknown
- 1999-08-13 EP EP99942209A patent/EP1118158B1/de not_active Expired - Lifetime
- 1999-08-13 JP JP2000565607A patent/JP4405676B2/ja not_active Expired - Lifetime
- 1999-08-13 WO PCT/US1999/018550 patent/WO2000010254A1/en active IP Right Grant
- 1999-08-13 AU AU55638/99A patent/AU766116B2/en not_active Ceased
- 1999-08-13 AT AT99942209T patent/ATE476016T1/de not_active IP Right Cessation
- 1999-08-13 CA CA002340366A patent/CA2340366C/en not_active Expired - Lifetime
- 1999-08-13 ES ES99942209T patent/ES2347309T3/es not_active Expired - Lifetime
- 1999-08-13 DE DE69942634T patent/DE69942634D1/de not_active Expired - Lifetime
- 1999-08-13 CN CNB998121525A patent/CN1211931C/zh not_active Expired - Lifetime
-
2002
- 2002-03-22 HK HK02102210.8A patent/HK1040842B/zh not_active IP Right Cessation
-
2009
- 2009-09-10 JP JP2009209398A patent/JP5129216B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1118158A1 (de) | 2001-07-25 |
DE69942634D1 (de) | 2010-09-09 |
CN1323462A (zh) | 2001-11-21 |
ATE476016T1 (de) | 2010-08-15 |
BR9912990B1 (pt) | 2012-10-02 |
ES2347309T3 (es) | 2010-10-27 |
CA2340366A1 (en) | 2000-02-24 |
BR9912990A (pt) | 2001-12-11 |
CN1211931C (zh) | 2005-07-20 |
JP5129216B2 (ja) | 2013-01-30 |
JP2002523914A (ja) | 2002-07-30 |
AU5563899A (en) | 2000-03-06 |
AU766116B2 (en) | 2003-10-09 |
HK1040842B (zh) | 2005-12-30 |
HK1040842A1 (en) | 2002-06-21 |
CA2340366C (en) | 2008-08-05 |
EP1118158B1 (de) | 2010-07-28 |
WO2000010254A1 (en) | 2000-02-24 |
JP2010016861A (ja) | 2010-01-21 |
JP4405676B2 (ja) | 2010-01-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ID29610A (id) | Memori de-interleaver partisi untuk dekoder map | |
ID28538A (id) | Tata letak (arsitektur) memori untuk memetakan dekoder | |
TW431097B (en) | Method and system for decoding convolutionally encoded codewords and soft decision output decoder | |
BR0016728A (pt) | Processo para codificar e decodificar dados em um sistema de comunicação de dados, processo para codificação de canal concatenada de dados em um sistema de transmissão de dados, codificador de canal concatenado, aparelho de codificação de canal concatenada, codificador / decodificador de dados adaptado para uso em um sistema de comunicação de dados, e, aparelho para codificar e decodificar dados em um sistema de comunicação de dados | |
EP0924863A3 (de) | Viterbi-Dekodierungsanlage und -verfahren | |
DE69201443D1 (de) | Verschlussanordnung für tragbaren rechner. | |
EP2326013A3 (de) | Verfahren und Anordnung zur arithmetischen Enkodierung und Dekodierung mit Verwendung mehrerer Tabellen | |
GB2418822A (en) | Unified viterbi/turbo decoder for mobile communication systems | |
ATE237888T1 (de) | Verallgemeinerter faltungsver- und - entschachteler | |
EP0938043A3 (de) | Multiplizierer mit niedriger Leistung für CPU und DSP | |
EP1261139A3 (de) | Simultane Speicherkontrolle für Turbodekoder | |
KR960020503A (ko) | 비터비 복호기의 연판정 메트릭 산출방법 및 장치 | |
ATE392745T1 (de) | Linear-approximation der max*-operation für log- map-decodierung | |
BR9815072A (pt) | Palavra de código para uso em mìdias ópticas digitais e método para a sua geração | |
AU2002222493A8 (en) | Decoder, system and method for decoding turbo block codes | |
AU2003293162A1 (en) | System and method of digital system performance enhancement | |
DE602004015643D1 (de) | Tab-system für eine elektrochemische metall-luft-zelle | |
FR2838549B1 (fr) | Module a anche unique duale, notamment pour instrument du type accordeon | |
Kwak et al. | Reverse tracing of forward state metric in log-MAP and max-log-MAP decoders | |
Cheong | Environmental Impact Assessment Policy in Korea | |
KR970055629A (ko) | 비터비 디코더의 디코딩 방법 | |
DE60111853D1 (de) | Verlustbehaftete datenkompression von zustandsmetrikvektoren für turbo decoder | |
Fodor et al. | An evaluation of the systolic stack sequential decoder | |
Denecke et al. | Contributions to general Algebra 10 | |
KR940002844A (ko) | 오류 정정 시스템 |