HU193521B - Circuit arrangement for maximum utilization of real-time operated computers - Google Patents

Circuit arrangement for maximum utilization of real-time operated computers Download PDF

Info

Publication number
HU193521B
HU193521B HU239782A HU239782A HU193521B HU 193521 B HU193521 B HU 193521B HU 239782 A HU239782 A HU 239782A HU 239782 A HU239782 A HU 239782A HU 193521 B HU193521 B HU 193521B
Authority
HU
Hungary
Prior art keywords
time
real
circuit arrangement
programs
maximum utilization
Prior art date
Application number
HU239782A
Other languages
German (de)
English (en)
Hungarian (hu)
Inventor
Ruediger Haufert
Wolfgang Hoffmann
Joerg Hofmann
Bernd Hunger
Haralad Kessler
Reiner Ebert
Original Assignee
Numerik Karl Marx Veb
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Numerik Karl Marx Veb filed Critical Numerik Karl Marx Veb
Publication of HU193521B publication Critical patent/HU193521B/hu

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Executing Machine-Instructions (AREA)
  • Control By Computers (AREA)
HU239782A 1981-07-27 1982-07-26 Circuit arrangement for maximum utilization of real-time operated computers HU193521B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DD23212181A DD209367A3 (de) 1981-07-27 1981-07-27 Schaltungsanordnung zur maximalen auslastung von recheneinheiten bei zeitscheibengesteuerter mehrprogrammbearbeitung

Publications (1)

Publication Number Publication Date
HU193521B true HU193521B (en) 1987-10-28

Family

ID=5532609

Family Applications (1)

Application Number Title Priority Date Filing Date
HU239782A HU193521B (en) 1981-07-27 1982-07-26 Circuit arrangement for maximum utilization of real-time operated computers

Country Status (3)

Country Link
DD (1) DD209367A3 (enExample)
DE (1) DE3223678A1 (enExample)
HU (1) HU193521B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19527541A1 (de) * 1995-07-27 1997-01-30 Siemens Ag Vorrichtung zur Erzeugung von Steuersignalen

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3913070A (en) * 1973-02-20 1975-10-14 Memorex Corp Multi-processor data processing system
DE2555963C2 (de) * 1975-12-12 1982-10-28 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Funktionsmodifizierung

Also Published As

Publication number Publication date
DE3223678A1 (de) 1983-02-17
DE3223678C2 (enExample) 1991-10-02
DD209367A3 (de) 1984-04-25

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Legal Events

Date Code Title Description
HU90 Patent valid on 900628
HMM4 Cancellation of final prot. due to non-payment of fee