HK46292A - High throughput circuit tester and test technique avoiding overdriving damage - Google Patents
High throughput circuit tester and test technique avoiding overdriving damage Download PDFInfo
- Publication number
- HK46292A HK46292A HK462/92A HK46292A HK46292A HK 46292 A HK46292 A HK 46292A HK 462/92 A HK462/92 A HK 462/92A HK 46292 A HK46292 A HK 46292A HK 46292 A HK46292 A HK 46292A
- Authority
- HK
- Hong Kong
- Prior art keywords
- test
- circuit
- damage
- junction
- cool down
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31915—In-circuit Testers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Claims (5)
- Verfahren zum Testen von Schaltkreisen, bei dem Testsignale (96,97) an einen im Test befindlichen Schaltkreis (98) angelegt werden, der Schaltkreis einzelne Halbleiter-Komponenten aufweist und Ausgangssignale (99,96) von dem im Test befindlichen Schaltkreis überwacht werden, gekennzeichnet durch den Verfahrensschritt (92), während des Tests Abkühlintervalle minimaler Dauer einzufügen, die ausreicht, Beschädigungen des Schaltkreises durch Überhitzen der Halbleiterbestandteile des Schaltkreises zu verhindern, wobei die Dauer unter Verwendung der thermischen Eigenschaften der Verbindungen und Bonddrähte der Komponenten berechnet wird.
- Verfahren nach Anspruch 1, bei dem jedes Abkühlintervall in den Test vor demjenigen Teil des Testes eingefügt wird, für welchen die Länge des Abkühlintervalls bestimmt worden ist.
- Schaltkreistestgerät zum Testen von Schaltkreisen mit einzelnen Halbleiterkomponenten mit: Vorrichtungen (96,97) zum Anlegen eines Testsignales an Knotenpunkte des im Test befindlichen Schaltkreises (98), Vorrichtungen (99,96) zum Überwachen der Signale an den Knotenpunkten des im Test befindlichen Schaltkreises, gekennzeichnet durch eine Vorrichtung (92) zum Einfügen von Abkühlintervallen in die Schaltkreistests, Dateien (91) mit Informationen über Schaltkreis-Topologie und über thermische Verbindungs- und Bonddraht-Eigenschaften der Halbleiter-Komponenten des Schaltkreises, einen Schadenanalysator (95), der abhängig von den Informationen über Schaltkreis-Topologie und thermisches Verhalten der Übergänge und Bonddrähte in den Dateien die kürzeste Dauer von Abkühlintervallen berechnet, die ausreicht, um Überhitzungsschäden an den Halbleiterkomponenten zu verhindern, und eine Steuereinrichtung (96), die abhängig von den Signalen des Schadenanalysators die Länge jedes Abkühlintervalles steuert.
- Schaltkreistestgerät nach Anspruch 3, bei dem die Einfügevorrichtung jedes Abkühlintervall in den Test vor dem Teil des Testes, für welchen seine Länge bestimmt worden ist, einfügt.
- Schaltkreistestgerät nach Anspruch 3 oder 4, bei dem der Verlauf der Testsignale veränderlich ist.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/503,465 US4588945A (en) | 1983-06-13 | 1983-06-13 | High throughput circuit tester and test technique avoiding overdriving damage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HK46292A true HK46292A (en) | 1992-07-03 |
Family
ID=24002208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| HK462/92A HK46292A (en) | 1983-06-13 | 1992-06-25 | High throughput circuit tester and test technique avoiding overdriving damage |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4588945A (de) |
| EP (1) | EP0128774B1 (de) |
| JP (2) | JPS6013267A (de) |
| DE (1) | DE3485280D1 (de) |
| HK (1) | HK46292A (de) |
| SG (1) | SG34092G (de) |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3543699A1 (de) * | 1985-12-11 | 1987-06-19 | Rohde & Schwarz | Verfahren zum pruefen der einzelnen bauelemente einer leiterplatte (in-circuit-test) |
| GB2186701B (en) * | 1986-02-14 | 1990-03-28 | Membrain Ltd | Circuit testers |
| SE461939B (sv) * | 1988-09-12 | 1990-04-09 | Kjell Moum | Instrument foer kontroll av ic-kretsar |
| US4947113A (en) * | 1989-03-31 | 1990-08-07 | Hewlett-Packard Company | Driver circuit for providing pulses having clean edges |
| US4998026A (en) * | 1989-04-19 | 1991-03-05 | Hewlett-Packard Company | Driver circuit for in-circuit overdrive/functional tester |
| US5027064A (en) * | 1989-04-19 | 1991-06-25 | Celeritek, Inc. | Method and means for measuring operating temperature of semiconductor devices by monitoring RF characteristics |
| US5005008A (en) * | 1989-04-20 | 1991-04-02 | Hewlett Packard Company | Method and apparatus for providing thermodynamic protection of a driver circuit used in an in-circuit tester |
| JP2584673B2 (ja) * | 1989-06-09 | 1997-02-26 | 株式会社日立製作所 | テストデータ変更回路を有する論理回路テスト装置 |
| US5032789A (en) * | 1989-06-19 | 1991-07-16 | Hewlett-Packard Company | Modular/concurrent board tester |
| US5127009A (en) * | 1989-08-29 | 1992-06-30 | Genrad, Inc. | Method and apparatus for circuit board testing with controlled backdrive stress |
| US5111137A (en) * | 1990-10-29 | 1992-05-05 | Hewlett-Packard Company | Method and apparatus for the detection of leakage current |
| US5321701A (en) * | 1990-12-06 | 1994-06-14 | Teradyne, Inc. | Method and apparatus for a minimal memory in-circuit digital tester |
| US5144229A (en) * | 1991-08-30 | 1992-09-01 | Hewlett-Packard Company | Method for selectively conditioning integrated circuit outputs for in-circuit test |
| US5184029A (en) * | 1991-10-15 | 1993-02-02 | Hewlett-Packard Company | Driver circuit for circuit tester |
| US5448166A (en) * | 1992-01-03 | 1995-09-05 | Hewlett-Packard Company | Powered testing of mixed conventional/boundary-scan logic |
| US5260649A (en) * | 1992-01-03 | 1993-11-09 | Hewlett-Packard Company | Powered testing of mixed conventional/boundary-scan logic |
| US5761214A (en) * | 1992-10-16 | 1998-06-02 | International Business Machines Corporation | Method for testing integrated circuit devices |
| US5808919A (en) * | 1993-11-23 | 1998-09-15 | Hewlett-Packard Company | Diagnostic system |
| US5502390A (en) * | 1994-03-15 | 1996-03-26 | International Business Machines Corporation | Adiabatic conductor analyzer method and system |
| US5682337A (en) * | 1995-04-13 | 1997-10-28 | Synopsys, Inc. | High speed three-state sampling |
| WO1999023700A1 (en) | 1997-11-05 | 1999-05-14 | Martin Robert A | Chip housing, methods of making same and methods for mounting chips therein |
| US6175230B1 (en) | 1999-01-14 | 2001-01-16 | Genrad, Inc. | Circuit-board tester with backdrive-based burst timing |
| US7078924B2 (en) * | 2002-09-20 | 2006-07-18 | Lsi Logic Corporation | Methodology to accurately test clock to signal valid and slew rates of PCI signals |
| US8227929B2 (en) | 2009-09-25 | 2012-07-24 | General Electric Company | Multi-use energy storage for renewable sources |
| CA2879578A1 (en) * | 2012-08-03 | 2014-02-06 | Abb Technology Ag | Overload limitation in peak power operation |
| JP6633949B2 (ja) * | 2016-03-14 | 2020-01-22 | ヤマハファインテック株式会社 | 基板検査装置及び基板検査方法 |
| US10972192B2 (en) * | 2018-05-11 | 2021-04-06 | Teradyne, Inc. | Handler change kit for a test system |
| JP7089440B2 (ja) * | 2018-08-28 | 2022-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその自己診断の制御方法 |
| CN109765479B (zh) * | 2019-01-28 | 2021-10-01 | 合肥京东方视讯科技有限公司 | 一种电路板缺件检测装置和方法 |
| KR102784150B1 (ko) * | 2020-08-04 | 2025-03-21 | 주식회사 아도반테스토 | 양방향 전용 실시간 인터페이스를 사용하여 피시험 디바이스를 테스트하기 위한 자동 테스트 장비, 핸들러 및 방법 |
| US12066483B2 (en) * | 2022-11-11 | 2024-08-20 | Texas Instruments Incorporated | Method for testing an integrated circuit (IC) device at a testing temperature |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3870953A (en) * | 1972-08-01 | 1975-03-11 | Roger Boatman & Associates Inc | In circuit electronic component tester |
| JPS57113377A (en) * | 1981-01-07 | 1982-07-14 | Hitachi Ltd | Semiconductor testing device |
| US4507576A (en) * | 1982-10-28 | 1985-03-26 | Tektronix, Inc. | Method and apparatus for synthesizing a drive signal for active IC testing including slew rate adjustment |
| JPS59221679A (ja) * | 1983-05-31 | 1984-12-13 | Advantest Corp | 論理回路試験装置 |
-
1983
- 1983-06-13 US US06/503,465 patent/US4588945A/en not_active Expired - Lifetime
-
1984
- 1984-06-13 EP EP84303974A patent/EP0128774B1/de not_active Expired - Lifetime
- 1984-06-13 JP JP59122893A patent/JPS6013267A/ja active Pending
- 1984-06-13 DE DE8484303974T patent/DE3485280D1/de not_active Expired - Lifetime
-
1991
- 1991-05-21 JP JP3145649A patent/JP2723382B2/ja not_active Expired - Fee Related
-
1992
- 1992-03-19 SG SG340/92A patent/SG34092G/en unknown
- 1992-06-25 HK HK462/92A patent/HK46292A/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| US4588945A (en) | 1986-05-13 |
| JPS6013267A (ja) | 1985-01-23 |
| EP0128774A3 (en) | 1987-08-05 |
| SG34092G (en) | 1992-06-12 |
| EP0128774A2 (de) | 1984-12-19 |
| JPH05188110A (ja) | 1993-07-30 |
| JP2723382B2 (ja) | 1998-03-09 |
| DE3485280D1 (de) | 1992-01-02 |
| EP0128774B1 (de) | 1991-11-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0128774B1 (de) | Hochdurchsatz-Schaltkreisprüfgerät und Prüftechnik zur Vermeidung von Übersteuerungsschaden | |
| Rajsuman | Iddq testing for CMOS VLSI | |
| US6801870B2 (en) | Apparatus and method for determining effect of on-chip noise on signal propagation | |
| US9285417B2 (en) | Low-voltage IC test for defect screening | |
| WO2002054094A1 (en) | Tester with independent control of devices under test | |
| US5489851A (en) | Identification of pin-open faults by measuring current or voltage change resulting from temperature change | |
| KR20160145107A (ko) | 테스트 기기 보호 회로 | |
| EP0438705B1 (de) | Verfahren zur Treibersteuerung integrierter Schaltungen während der Prüfung | |
| US20020050813A1 (en) | Burn-in test method for a semiconductor chip and burn-in test apparatus therefor | |
| US5101152A (en) | Integrated circuit transfer test device system utilizing lateral transistors | |
| US6788095B1 (en) | Method for gross input leakage functional test at wafer sort | |
| Amerasekera et al. | ESD in integrated circuits | |
| US6433567B1 (en) | CMOS integrated circuit and timing signal generator using same | |
| US5196787A (en) | Test circuit for screening parts | |
| Singh et al. | Incorporating IDDQ testing in BIST: Improved coverage through test diversity | |
| Hamilton | Thermal aspects of burn-in of high power semiconductor devices | |
| SUTO | backdriving | |
| Peters et al. | Realistic defect coverages of voltage and current tests | |
| JPH06324105A (ja) | 半導体試験装置 | |
| JPH06201765A (ja) | 集積回路素子のテスト方法 | |
| Malandruccolo et al. | A new built-in screening methodology to achieve zero defects in the automotive environment | |
| CA1311564C (en) | Method and circuit for testing the reliability of integrated circuit chips | |
| Pineda | Fault Localization of Temperature-Dependent Digital Circuit Functional Failures Utilizing the Scan-based Bench Testing and the Dynamic Analysis by Laser Simulation (DALS) | |
| KR20010061382A (ko) | 입력 보호회로 | |
| Malandruccolo et al. | Novel solution for the built-in gate oxide stress test of LDMOS in integrated circuits for automotive applications |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PE | Patent expired |
Effective date: 20040612 |
|
| PE | Patent expired |