HK1099095A1 - An apparatus and a system for performing operations of multimedia applications and a method for performing the same - Google Patents
An apparatus and a system for performing operations of multimedia applications and a method for performing the sameInfo
- Publication number
- HK1099095A1 HK1099095A1 HK07105278.5A HK07105278A HK1099095A1 HK 1099095 A1 HK1099095 A1 HK 1099095A1 HK 07105278 A HK07105278 A HK 07105278A HK 1099095 A1 HK1099095 A1 HK 1099095A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- coupled
- storage area
- receive
- multiplier
- adder
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30109—Register structure having multiple operands in a single register
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3812—Devices capable of handling different types of numbers
- G06F2207/382—Reconfigurable for different fixed word lengths
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
- G06F7/4991—Overflow or underflow
- G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49994—Sign extension
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Computing Systems (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Discrete Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Containers And Plastic Fillers For Packaging (AREA)
- Complex Calculations (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Document Processing Apparatus (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US52136095A | 1995-08-31 | 1995-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1099095A1 true HK1099095A1 (en) | 2007-08-03 |
Family
ID=24076444
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK07105278.5A HK1099095A1 (en) | 1995-08-31 | 2007-05-18 | An apparatus and a system for performing operations of multimedia applications and a method for performing the same |
HK10111583.8A HK1144974A1 (en) | 1995-08-31 | 2010-12-13 | An apparatus for controlling bit correction of shifted packed data |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK10111583.8A HK1144974A1 (en) | 1995-08-31 | 2010-12-13 | An apparatus for controlling bit correction of shifted packed data |
Country Status (9)
Country | Link |
---|---|
EP (2) | EP0847551B1 (pt) |
JP (1) | JP3711147B2 (pt) |
KR (1) | KR19990044304A (pt) |
CN (23) | CN101794213B (pt) |
AU (1) | AU6677896A (pt) |
BR (2) | BR9612911B1 (pt) |
HK (2) | HK1099095A1 (pt) |
TW (1) | TW310406B (pt) |
WO (1) | WO1997008608A1 (pt) |
Families Citing this family (77)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6738793B2 (en) | 1994-12-01 | 2004-05-18 | Intel Corporation | Processor capable of executing packed shift operations |
CN101794213B (zh) * | 1995-08-31 | 2014-09-17 | 英特尔公司 | 控制移位分组数据的位校正的装置 |
US6145068A (en) * | 1997-09-16 | 2000-11-07 | Phoenix Technologies Ltd. | Data transfer to a non-volatile storage medium |
US7197625B1 (en) | 1997-10-09 | 2007-03-27 | Mips Technologies, Inc. | Alignment and ordering of vector elements for single instruction multiple data processing |
US5864703A (en) | 1997-10-09 | 1999-01-26 | Mips Technologies, Inc. | Method for providing extended precision in SIMD vector arithmetic operations |
EP0983557B1 (en) | 1998-03-18 | 2019-10-02 | Koninklijke Philips N.V. | Data processing device for executing in parallel additions and subtractions on packed data |
US6233671B1 (en) | 1998-03-31 | 2001-05-15 | Intel Corporation | Staggering execution of an instruction by dividing a full-width macro instruction into at least two partial-width micro instructions |
US7395302B2 (en) | 1998-03-31 | 2008-07-01 | Intel Corporation | Method and apparatus for performing horizontal addition and subtraction |
US6230253B1 (en) | 1998-03-31 | 2001-05-08 | Intel Corporation | Executing partial-width packed data instructions |
US6192467B1 (en) * | 1998-03-31 | 2001-02-20 | Intel Corporation | Executing partial-width packed data instructions |
US7392275B2 (en) | 1998-03-31 | 2008-06-24 | Intel Corporation | Method and apparatus for performing efficient transformations with horizontal addition and subtraction |
US6230257B1 (en) | 1998-03-31 | 2001-05-08 | Intel Corporation | Method and apparatus for staggering execution of a single packed data instruction using the same circuit |
US7114056B2 (en) | 1998-12-03 | 2006-09-26 | Sun Microsystems, Inc. | Local and global register partitioning in a VLIW processor |
US7117342B2 (en) * | 1998-12-03 | 2006-10-03 | Sun Microsystems, Inc. | Implicitly derived register specifiers in a processor |
JP3336986B2 (ja) * | 1999-02-03 | 2002-10-21 | 日本電気株式会社 | 信号処理プロセッサ及びそれに用いる丸め機能付き積和演算器 |
EP2267597A3 (en) * | 1999-05-12 | 2012-01-04 | Analog Devices, Inc. | Digital signal processor having a pipeline structure |
US6678810B1 (en) | 1999-12-30 | 2004-01-13 | Intel Corporation | MFENCE and LFENCE micro-architectural implementation method and system |
US6671795B1 (en) | 2000-01-21 | 2003-12-30 | Intel Corporation | Method and apparatus for pausing execution in a processor or the like |
US7039906B1 (en) * | 2000-09-29 | 2006-05-02 | International Business Machines Corporation | Compiler for enabling multiple signed independent data elements per register |
US7711763B2 (en) | 2001-02-21 | 2010-05-04 | Mips Technologies, Inc. | Microprocessor instructions for performing polynomial arithmetic operations |
US7162621B2 (en) | 2001-02-21 | 2007-01-09 | Mips Technologies, Inc. | Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentration |
US7685212B2 (en) | 2001-10-29 | 2010-03-23 | Intel Corporation | Fast full search motion estimation with SIMD merge instruction |
US7739319B2 (en) | 2001-10-29 | 2010-06-15 | Intel Corporation | Method and apparatus for parallel table lookup using SIMD instructions |
US20040054877A1 (en) | 2001-10-29 | 2004-03-18 | Macy William W. | Method and apparatus for shuffling data |
US7818356B2 (en) | 2001-10-29 | 2010-10-19 | Intel Corporation | Bitstream buffer manipulation with a SIMD merge instruction |
JP3857614B2 (ja) | 2002-06-03 | 2006-12-13 | 松下電器産業株式会社 | プロセッサ |
US6986023B2 (en) | 2002-08-09 | 2006-01-10 | Intel Corporation | Conditional execution of coprocessor instruction based on main processor arithmetic flags |
WO2004015563A1 (en) | 2002-08-09 | 2004-02-19 | Intel Corporation | Multimedia coprocessor control mechanism including alignment or broadcast instructions |
US7392368B2 (en) | 2002-08-09 | 2008-06-24 | Marvell International Ltd. | Cross multiply and add instruction and multiply and subtract instruction SIMD execution on real and imaginary components of a plurality of complex data elements |
US7293056B2 (en) * | 2002-12-18 | 2007-11-06 | Intel Corporation | Variable width, at least six-way addition/accumulation instructions |
US7139900B2 (en) | 2003-06-23 | 2006-11-21 | Intel Corporation | Data packet arithmetic logic devices and methods |
US7424501B2 (en) | 2003-06-30 | 2008-09-09 | Intel Corporation | Nonlinear filtering and deblocking applications utilizing SIMD sign and absolute value operations |
US7426749B2 (en) * | 2004-01-20 | 2008-09-16 | International Business Machines Corporation | Distributed computation in untrusted computing environments using distractive computational units |
US20060101244A1 (en) * | 2004-11-10 | 2006-05-11 | Nvidia Corporation | Multipurpose functional unit with combined integer and floating-point multiply-add pipeline |
US8024551B2 (en) * | 2005-10-26 | 2011-09-20 | Analog Devices, Inc. | Pipelined digital signal processor |
US8127117B2 (en) * | 2006-05-10 | 2012-02-28 | Qualcomm Incorporated | Method and system to combine corresponding half word units from multiple register units within a microprocessor |
US20080071851A1 (en) * | 2006-09-20 | 2008-03-20 | Ronen Zohar | Instruction and logic for performing a dot-product operation |
US7958181B2 (en) | 2006-09-21 | 2011-06-07 | Intel Corporation | Method and apparatus for performing logical compare operations |
US9069547B2 (en) | 2006-09-22 | 2015-06-30 | Intel Corporation | Instruction and logic for processing text strings |
CN100461095C (zh) * | 2007-11-20 | 2009-02-11 | 浙江大学 | 一种支持多模式的媒体增强流水线乘法单元设计方法 |
CN101685388B (zh) * | 2008-09-28 | 2013-08-07 | 北京大学深圳研究生院 | 执行比较运算的方法和装置 |
US9747105B2 (en) * | 2009-12-17 | 2017-08-29 | Intel Corporation | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
US8504807B2 (en) | 2009-12-26 | 2013-08-06 | Intel Corporation | Rotate instructions that complete execution without reading carry flag |
JP5853177B2 (ja) * | 2011-04-08 | 2016-02-09 | パナソニックIpマネジメント株式会社 | データ処理装置、及びデータ処理方法 |
CN104025024B (zh) * | 2011-12-22 | 2018-07-17 | 英特尔公司 | 打包数据操作掩码移位处理器、方法及系统 |
CN107741861B (zh) * | 2011-12-23 | 2022-03-15 | 英特尔公司 | 用于混洗浮点或整数值的装置和方法 |
WO2013095642A1 (en) * | 2011-12-23 | 2013-06-27 | Intel Corporation | Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate |
US9864602B2 (en) | 2011-12-30 | 2018-01-09 | Intel Corporation | Packed rotate processors, methods, systems, and instructions |
US9122475B2 (en) * | 2012-09-28 | 2015-09-01 | Intel Corporation | Instruction for shifting bits left with pulling ones into less significant bits |
US20140281418A1 (en) * | 2013-03-14 | 2014-09-18 | Shihjong J. Kuo | Multiple Data Element-To-Multiple Data Element Comparison Processors, Methods, Systems, and Instructions |
US9990202B2 (en) | 2013-06-28 | 2018-06-05 | Intel Corporation | Packed data element predication processors, methods, systems, and instructions |
US9405539B2 (en) * | 2013-07-31 | 2016-08-02 | Intel Corporation | Providing vector sub-byte decompression functionality |
US9513907B2 (en) * | 2013-08-06 | 2016-12-06 | Intel Corporation | Methods, apparatus, instructions and logic to provide vector population count functionality |
US9495155B2 (en) * | 2013-08-06 | 2016-11-15 | Intel Corporation | Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and alignment |
US10768930B2 (en) * | 2014-02-12 | 2020-09-08 | MIPS Tech, LLC | Processor supporting arithmetic instructions with branch on overflow and methods |
US10068652B2 (en) * | 2014-09-03 | 2018-09-04 | Micron Technology, Inc. | Apparatuses and methods for determining population count |
US9891913B2 (en) * | 2014-12-23 | 2018-02-13 | Intel Corporation | Method and apparatus for performing conflict detection using vector comparison operations |
CN104778147B (zh) * | 2015-04-14 | 2017-06-06 | 飞天诚信科技股份有限公司 | 一种基于协处理器的数据处理方法 |
US11204764B2 (en) * | 2016-03-31 | 2021-12-21 | Intel Corporation | Processors, methods, systems, and instructions to Partition a source packed data into lanes |
CN107766079B (zh) * | 2016-08-19 | 2022-03-11 | 北京百度网讯科技有限公司 | 处理器以及用于在处理器上执行指令的方法 |
US10296292B2 (en) * | 2016-10-20 | 2019-05-21 | Advanced Micro Devices, Inc. | Dynamic variable precision computation |
US10409603B2 (en) * | 2016-12-30 | 2019-09-10 | Intel Corporation | Processors, methods, systems, and instructions to check and store indications of whether memory addresses are in persistent memory |
US10162633B2 (en) * | 2017-04-24 | 2018-12-25 | Arm Limited | Shift instruction |
CN107145334B (zh) * | 2017-04-26 | 2020-10-09 | 龙芯中科技术有限公司 | 常量获取方法、装置、处理器及计算机可读存储介质 |
CN109388427A (zh) * | 2017-08-11 | 2019-02-26 | 龙芯中科技术有限公司 | 向量处理方法、向量处理单元和微处理器 |
US11243765B2 (en) * | 2017-09-29 | 2022-02-08 | Intel Corporation | Apparatus and method for scaling pre-scaled results of complex multiply-accumulate operations on packed real and imaginary data elements |
CN107861709B (zh) * | 2017-12-01 | 2021-04-02 | 中国兵器装备集团自动化研究所 | 适应前端高速处理的累加器和功率谱累加器及其累加方法 |
CN108595149B (zh) * | 2018-04-28 | 2021-05-04 | 天津芯海创科技有限公司 | 可重构乘加运算装置 |
CN110554886B (zh) * | 2018-05-30 | 2021-12-10 | 赛灵思公司 | 数据拆分结构、方法及其片上实现 |
JP7052874B2 (ja) * | 2018-08-22 | 2022-04-12 | 日本電気株式会社 | 情報処理装置、情報処理方法及びプログラム |
CN109783054B (zh) * | 2018-12-20 | 2021-03-09 | 中国科学院计算技术研究所 | 一种rsfq fft处理器的蝶形运算处理方法及系统 |
CN110221807B (zh) * | 2019-06-06 | 2021-08-03 | 龙芯中科(合肥)技术有限公司 | 数据移位方法、装置、设备及计算机可读存储介质 |
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CN112230886B (zh) * | 2020-09-11 | 2022-11-08 | 清华大学 | 免除Toom-Cook的处理装置和基于其的模乘获取方法 |
CN112181355B (zh) * | 2020-10-12 | 2021-08-06 | 上海芯旺微电子技术有限公司 | 一种移位饱和处理方法及其应用 |
CN112181354B (zh) * | 2020-10-12 | 2021-08-10 | 上海芯旺微电子技术有限公司 | 一种移位饱和同步处理的方法及其应用 |
US20230297371A1 (en) * | 2022-03-15 | 2023-09-21 | Intel Corporation | Fused multiple multiplication and addition-subtraction instruction set |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SE310008B (pt) * | 1965-06-30 | 1969-04-14 | Ericsson Telefon Ab L M | |
JPS5955546A (ja) * | 1982-09-24 | 1984-03-30 | Fujitsu Ltd | フア−ムウエア処理装置 |
JPS60134974A (ja) * | 1983-12-23 | 1985-07-18 | Hitachi Ltd | ベクトル処理装置 |
JPS6284335A (ja) * | 1985-10-09 | 1987-04-17 | Hitachi Ltd | 乗算回路 |
JPS6297060A (ja) * | 1985-10-23 | 1987-05-06 | Mitsubishi Electric Corp | デイジタルシグナルプロセツサ |
JP2634609B2 (ja) * | 1987-10-16 | 1997-07-30 | 富士通テン株式会社 | データ転送装置 |
US4985848A (en) * | 1987-09-14 | 1991-01-15 | Visual Information Technologies, Inc. | High speed image processing system using separate data processor and address generator |
US4933847A (en) * | 1987-11-17 | 1990-06-12 | International Business Machines Corporation | Microcode branch based upon operand length and alignment |
US5126964A (en) * | 1988-04-01 | 1992-06-30 | Digital Equipment Corporation | High performance bit-sliced multiplier circuit |
DE3886739D1 (de) * | 1988-06-02 | 1994-02-10 | Itt Ind Gmbh Deutsche | Einrichtung zur digitalen Signalverarbeitung. |
US5073969A (en) * | 1988-08-01 | 1991-12-17 | Intel Corporation | Microprocessor bus interface unit which changes scheduled data transfer indications upon sensing change in enable signals before receiving ready signal |
CA1311063C (en) * | 1988-12-16 | 1992-12-01 | Tokumichi Murakami | Digital signal processor |
US5047973A (en) * | 1989-04-26 | 1991-09-10 | Texas Instruments Incorporated | High speed numerical processor for performing a plurality of numeric functions |
US5001662A (en) * | 1989-04-28 | 1991-03-19 | Apple Computer, Inc. | Method and apparatus for multi-gauge computation |
JP2984463B2 (ja) * | 1991-06-24 | 1999-11-29 | 株式会社日立製作所 | マイクロコンピュータ |
CA2073516A1 (en) * | 1991-11-27 | 1993-05-28 | Peter Michael Kogge | Dynamic multi-mode parallel processor array architecture computer system |
US5257214A (en) * | 1992-06-16 | 1993-10-26 | Hewlett-Packard Company | Qualification of register file write enables using self-timed floating point exception flags |
US5295229A (en) * | 1992-06-17 | 1994-03-15 | Motorola, Inc. | Circuit and method for determining membership in a set during a fuzzy logic operation |
US5263125A (en) * | 1992-06-17 | 1993-11-16 | Motorola, Inc. | Circuit and method for evaluating fuzzy logic rules |
EP0581986A1 (de) * | 1992-08-04 | 1994-02-09 | Siemens Nixdorf Informationssysteme Aktiengesellschaft | Datenverarbeitungsanlage mit Verarbeitung von Aufbereitungsbefehlen |
JPH0682269A (ja) * | 1992-09-03 | 1994-03-22 | Matsushita Electric Ind Co Ltd | エンコーダ信号逓倍回路 |
US5268855A (en) * | 1992-09-14 | 1993-12-07 | Hewlett-Packard Company | Common format for encoding both single and double precision floating point numbers |
US5375080A (en) * | 1992-12-18 | 1994-12-20 | Xerox Corporation | Performing arithmetic on composite operands to obtain a binary outcome for each multi-bit component |
US5717616A (en) * | 1993-02-19 | 1998-02-10 | Hewlett-Packard Company | Computer hardware instruction and method for computing population counts |
US5717947A (en) * | 1993-03-31 | 1998-02-10 | Motorola, Inc. | Data processing system and method thereof |
DE69428466T2 (de) * | 1993-11-23 | 2002-05-23 | Hewlett-Packard Co. (N.D.Ges.D.Staates Delaware), Palo Alto | Parallele Datenverarbeitung in einem Einzelprozessor |
US5442581A (en) * | 1993-11-30 | 1995-08-15 | Texas Instruments Incorporated | Iterative division apparatus, system and method forming plural quotient bits per iteration |
CN1099081C (zh) * | 1994-01-29 | 2003-01-15 | 世嘉企业股份有限公司 | 信息处理装置 |
GB2287333B (en) * | 1994-03-11 | 1998-02-11 | Advanced Risc Mach Ltd | Data processing multiplier |
US5557734A (en) * | 1994-06-17 | 1996-09-17 | Applied Intelligent Systems, Inc. | Cache burst architecture for parallel processing, such as for image processing |
JP3579087B2 (ja) * | 1994-07-08 | 2004-10-20 | 株式会社日立製作所 | 演算器およびマイクロプロセッサ |
CN101794213B (zh) * | 1995-08-31 | 2014-09-17 | 英特尔公司 | 控制移位分组数据的位校正的装置 |
-
1996
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