HK1001935A1 - Method for programming a field programmable gate array - Google Patents

Method for programming a field programmable gate array Download PDF

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Publication number
HK1001935A1
HK1001935A1 HK98100998A HK98100998A HK1001935A1 HK 1001935 A1 HK1001935 A1 HK 1001935A1 HK 98100998 A HK98100998 A HK 98100998A HK 98100998 A HK98100998 A HK 98100998A HK 1001935 A1 HK1001935 A1 HK 1001935A1
Authority
HK
Hong Kong
Prior art keywords
voltage
sram
voltage level
application circuitry
level
Prior art date
Application number
HK98100998A
Other languages
German (de)
English (en)
French (fr)
Chinese (zh)
Other versions
HK1001935B (en
Inventor
Douglas Hill Dwight
Original Assignee
At&T Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At&T Corp. filed Critical At&T Corp.
Publication of HK1001935B publication Critical patent/HK1001935B/en
Publication of HK1001935A1 publication Critical patent/HK1001935A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
HK98100998A 1991-11-25 1998-02-10 Method for programming a field programmable gate array HK1001935A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/797,648 US5239510A (en) 1991-11-25 1991-11-25 Multiple voltage supplies for field programmable gate arrays and the like
US797648 1991-11-25

Publications (2)

Publication Number Publication Date
HK1001935B HK1001935B (en) 1998-07-17
HK1001935A1 true HK1001935A1 (en) 1998-07-17

Family

ID=25171434

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98100998A HK1001935A1 (en) 1991-11-25 1998-02-10 Method for programming a field programmable gate array

Country Status (7)

Country Link
US (1) US5239510A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0544461B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3355443B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR0171613B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE69221827T2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
HK (1) HK1001935A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
SG (1) SG43685A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5512765A (en) * 1994-02-03 1996-04-30 National Semiconductor Corporation Extendable circuit architecture
US5448525A (en) * 1994-03-10 1995-09-05 Intel Corporation Apparatus for configuring a subset of an integrated circuit having boundary scan circuitry connected in series and a method thereof
JP3494469B2 (ja) * 1994-05-26 2004-02-09 株式会社ルネサステクノロジ フィールドプログラマブルゲートアレイ
US5525814A (en) * 1995-01-19 1996-06-11 Texas Instruments Incorporated Three dimensional integrated latch and bulk pass transistor for high density field reconfigurable architecture
US5646544A (en) * 1995-06-05 1997-07-08 International Business Machines Corporation System and method for dynamically reconfiguring a programmable gate array
US5970255A (en) 1995-10-16 1999-10-19 Altera Corporation System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly
US6836151B1 (en) 1999-03-24 2004-12-28 Altera Corporation I/O cell configuration for multiple I/O standards
US6271679B1 (en) 1999-03-24 2001-08-07 Altera Corporation I/O cell configuration for multiple I/O standards
US7081875B2 (en) 2000-09-18 2006-07-25 Sanyo Electric Co., Ltd. Display device and its driving method
US6563339B2 (en) * 2001-01-31 2003-05-13 Micron Technology, Inc. Multiple voltage supply switch
US6920076B2 (en) * 2003-02-28 2005-07-19 Union Semiconductor Technology Corporation Interlayered power bus for semiconductor device
US6912171B2 (en) * 2003-02-28 2005-06-28 Union Semiconductor Technology Corporation Semiconductor device power bus system and method
JP4147480B2 (ja) * 2003-07-07 2008-09-10 ソニー株式会社 データ転送回路及びフラットディスプレイ装置
GB0414622D0 (en) * 2004-06-30 2004-08-04 Ibm Data integrity checking in data storage devices
FR2877143A1 (fr) * 2004-10-25 2006-04-28 St Microelectronics Sa Cellule de memoire volatile preenregistree
JP2012128816A (ja) * 2010-12-17 2012-07-05 Toshiba Corp メモリシステム

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5577088A (en) * 1978-12-07 1980-06-10 Toshiba Corp Nonvolatile semiconductor memory unit
US4271487A (en) * 1979-11-13 1981-06-02 Ncr Corporation Static volatile/non-volatile ram cell
JPS581884A (ja) * 1981-06-29 1983-01-07 Fujitsu Ltd スタティックｒａｍの電源供給方式
US4821233A (en) * 1985-09-19 1989-04-11 Xilinx, Incorporated 5-transistor memory cell with known state on power-up
US5065362A (en) * 1989-06-02 1991-11-12 Simtek Corporation Non-volatile ram with integrated compact static ram load configuration

Also Published As

Publication number Publication date
EP0544461B1 (en) 1997-08-27
SG43685A1 (en) 1997-11-14
KR930011436A (ko) 1993-06-24
JPH05243973A (ja) 1993-09-21
EP0544461A2 (en) 1993-06-02
JP3355443B2 (ja) 2002-12-09
DE69221827T2 (de) 1998-01-02
US5239510A (en) 1993-08-24
DE69221827D1 (de) 1997-10-02
EP0544461A3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1994-02-02
KR0171613B1 (ko) 1999-03-30

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)