HK1000738A1 - Method and apparatus for explicitly evaluating conditions in a data processor - Google Patents

Method and apparatus for explicitly evaluating conditions in a data processor

Info

Publication number
HK1000738A1
HK1000738A1 HK97102290A HK97102290A HK1000738A1 HK 1000738 A1 HK1000738 A1 HK 1000738A1 HK 97102290 A HK97102290 A HK 97102290A HK 97102290 A HK97102290 A HK 97102290A HK 1000738 A1 HK1000738 A1 HK 1000738A1
Authority
HK
Hong Kong
Prior art keywords
data processor
evaluating conditions
explicitly evaluating
explicitly
conditions
Prior art date
Application number
HK97102290A
Other languages
English (en)
Inventor
Yoav Talgam
Mitch Kirkpatrick Alsup
James A Klingshirn
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of HK1000738A1 publication Critical patent/HK1000738A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
HK97102290A 1987-10-26 1997-12-01 Method and apparatus for explicitly evaluating conditions in a data processor HK1000738A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/112,597 US4914581A (en) 1987-10-26 1987-10-26 Method and apparatus for explicitly evaluating conditions in a data processor

Publications (1)

Publication Number Publication Date
HK1000738A1 true HK1000738A1 (en) 1998-04-24

Family

ID=22344793

Family Applications (1)

Application Number Title Priority Date Filing Date
HK97102290A HK1000738A1 (en) 1987-10-26 1997-12-01 Method and apparatus for explicitly evaluating conditions in a data processor

Country Status (6)

Country Link
US (1) US4914581A (xx)
EP (1) EP0313817B1 (xx)
JP (1) JP2663287B2 (xx)
KR (1) KR970004474B1 (xx)
DE (1) DE3855124T2 (xx)
HK (1) HK1000738A1 (xx)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0365188B1 (en) * 1988-10-18 1996-09-18 Hewlett-Packard Company Central processor condition code method and apparatus
US6000028A (en) * 1996-01-29 1999-12-07 Digital Equipment Corporation Means and apparatus for maintaining condition codes in an unevaluated state
US6223278B1 (en) * 1998-11-05 2001-04-24 Intel Corporation Method and apparatus for floating point (FP) status word handling in an out-of-order (000) Processor Pipeline

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434730A (en) * 1977-08-24 1979-03-14 Mitsubishi Electric Corp Arithmetic unit
US4348722A (en) * 1980-04-03 1982-09-07 Motorola, Inc. Bus error recognition for microprogrammed data processor
US4509116A (en) * 1982-04-21 1985-04-02 Digital Equipment Corporation Special instruction processing unit for data processing system
JPS5979350A (ja) * 1982-10-29 1984-05-08 Toshiba Corp 浮動小数点演算装置
JPS59125441A (ja) * 1982-12-30 1984-07-19 Fujitsu Ltd デ−タ処理装置
JPS6043751A (ja) * 1983-08-18 1985-03-08 Hitachi Ltd 情報処理装置
JPH0789314B2 (ja) * 1984-01-03 1995-09-27 モトローラ・インコーポレーテッド 浮動小数点条件符号生成方式
US4683546A (en) * 1984-01-03 1987-07-28 Motorola, Inc. Floating point condition code generation
US4779218A (en) * 1985-09-04 1988-10-18 Jauch Jeremy P Complex arithmetic unit
US4777613A (en) * 1986-04-01 1988-10-11 Motorola Inc. Floating point numeric data processor

Also Published As

Publication number Publication date
US4914581A (en) 1990-04-03
EP0313817A2 (en) 1989-05-03
KR970004474B1 (ko) 1997-03-28
KR890007164A (ko) 1989-06-19
EP0313817A3 (en) 1991-02-06
DE3855124D1 (de) 1996-04-25
EP0313817B1 (en) 1996-03-20
DE3855124T2 (de) 1996-10-02
JPH01163836A (ja) 1989-06-28
JP2663287B2 (ja) 1997-10-15

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)